Abstract: A process to ameliorate scoreboard aliasing in multi-threaded data processors whereby, in response to executing at least one long-latency instruction in a first thread, a shared hardware scoreboard is incremented. A shared software register is incremented and the shared software register is spilled to a first per-thread register, and execution is switched to a second thread. After execution switches back to the first thread, execution of the first thread is suspended until the shared hardware scoreboard reaches a value at or below a difference between a value in the shared software register and the value spilled into the first per-thread register.

Abstract: Various embodiments include a parallel processing computer system that enables parallel instances of a program to synchronize at disparate addresses in memory. When the parallel program instances need to exchange data, the program instances synchronize based on a mask that identifies the program instances that are synchronizing. As each program instance reaches the point of synchronization, the program instance blocks and waits for all other program instances to reach the point of synchronization. When all program instances have reached the point of synchronization, at least one program instance executes a synchronous operation to exchange data. The program instances then continue execution at respective and disparate return addresses.

Abstract: A tool for implanting a medical lead includes a body having distal region including a distal end, a proximal region including a proximal end, a central axis extending from the distal end to the proximal end, and a midpoint between the distal end and the proximal end. The distal region includes a rounded tip, and a distal lip surrounding a distal opening leading to a distal cavity dimensioned to receive and frictionally engage a connector component of the implantable lead. The proximal region includes a proximal lip surrounding a proximal opening leading to a proximal cavity. A chamber is located between the distal cavity and the proximal cavity. The tool includes a first window. A pair of resilient arms define at least a portion of the chamber and configured to frictionally engage a terminal pin of the implantable lead. The first window, chamber, and pair of resilient arms are located distal of the midpoint.

Abstract: A mulling system includes a first joining plate with a first plate member, a second plate member, and a first thermal breaker that extend longitudinally along a mulling axis with the first thermal breaker attaching the first and second plate members. The mulling system includes a second joining plate that includes a third plate member, a fourth plate member, and a second thermal breaker that extend longitudinally along the mulling axis with the second thermal breaker attaching the third and fourth plate members. The second joining plate attaches to the first joining plate to join together first and second fenestration units with the mulling axis extending between the first and second joining plates. The first joining plate matches the second joining plate to define a corresponding rotated and engaged arrangement of the first joining plate and the second joining plate across the mulling axis.

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.

Abstract: An apparatus for use in manufacturing a component of an implantable medical device comprises a fixture comprising a first fixture member having a plurality of semi-circular recesses in a lower surface thereof, and a second fixture member having a plurality of semi-circular recesses in an upper surface thereof, the first and second fixture members being configured to be selectively fastened together via a plurality of fasteners, wherein in an assembled state of the fixture, each of the semi-circular recesses of the first fixture member lower surface is aligned with an opposing semi-circular recess in the second fixture member upper surface to define a plurality of workpiece openings each dimensioned to receive and secure a respective work piece to be machined to the fixture.

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.

Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.

Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.

Abstract: A mulling system includes a first joining plate with a first plate member, a second plate member, and a first thermal breaker that extend longitudinally along a mulling axis with the first thermal breaker attaching the first and second plate members. The mulling system includes a second joining plate that includes a third plate member, a fourth plate member, and a second thermal breaker that extend longitudinally along the mulling axis with the second thermal breaker attaching the third and fourth plate members. The second joining plate is configured to attach to the first joining plate to join together first and second fenestration units with the mulling axis extending between the first and second joining plates. The first joining plate substantially matches the second joining plate to define a corresponding rotated and engaged arrangement of the first joining plate and the second joining plate across the mulling axis.

Abstract: A disposable pacemaker comprises a housing including a stylet port, a pulse generator printed circuit board assembly situated in the housing, and a pacing lead secured to the housing. The pacing lead includes a lumen aligned with the stylet port, such that the stylet port and the lumen of the pacing lead are configured to receive a stylet.

Abstract: A retention device for use with an implantable medical device (IMD) may comprise an elongate body including a configured to receive the lead of the IMD. The retention device may also include securing mechanisms coupled to the elongate body and configured to push against tissue of a patient. The securing mechanisms may also include linking elements coupled to the elongate body and a portion of the securing mechanisms.

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.

Abstract: A new transaction barrier synchronization primitive enables executing threads and asynchronous transactions to synchronize across parallel processors. The asynchronous transactions may include transactions resulting from, for example, hardware data movement units such as direct memory units, etc. A hardware synchronization circuit may provide for the synchronization primitive to be stored in a cache memory so that barrier operations may be accelerated by the circuit. A new wait mechanism reduces software overhead associated with waiting on a barrier.

Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.

Abstract: Various embodiments include a parallel processing computer system that enables parallel instances of a program to synchronize at disparate addresses in memory. When the parallel program instances need to exchange data, the program instances synchronize based on a mask that identifies the program instances that are synchronizing. As each program instance reaches the point of synchronization, the program instance blocks and waits for all other program instances to reach the point of synchronization. When all program instances have reached the point of synchronization, at least one program instance executes a synchronous operation to exchange data. The program instances then continue execution at respective and disparate return addresses.

Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.

Abstract: The APPARATUSES, METHODS AND SYSTEMS FOR A DIGITAL CONVERSATION MANAGEMENT PLATFORM (“DCM-Platform”) transforms digital dialogue from consumers, client demands and, Internet search inputs via DCM-Platform components into tradable digital assets, and client needs based artificial intelligence campaign plan outputs. In one implementation, The DCM-Platform may capture and examine conversations between individuals and artificial intelligence conversation agents. These agents may be viewed as assets. One can measure the value and performance of these agents by assessing their performance and ability to generate revenue from prolonging conversations and/or ability to effect sales through conversations with individuals.

Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.