Patents by Inventor Peter Nelson

Peter Nelson has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210287106
    Abstract: The APPARATUSES, METHODS AND SYSTEMS FOR A DIGITAL CONVERSATION MANAGEMENT PLATFORM (“DCM-Platform”) transforms digital dialogue from consumers, client demands and, Internet search inputs via DCM-Platform components into tradable digital assets, and client needs based artificial intelligence campaign plan outputs. In one implementation, The DCM-Platform may capture and examine conversations between individuals and artificial intelligence conversation agents. These agents may be viewed as assets. One can measure the value and performance of these agents by assessing their performance and ability to generate revenue from prolonging conversations and/or ability to effect sales through conversations with individuals.
    Type: Application
    Filed: March 30, 2021
    Publication date: September 16, 2021
    Inventors: Andrew Peter Nelson Jerram, Frederick Francis McMahon
  • Patent number: 11072546
    Abstract: A process for removing metals and chelators from SAGD liner flowback that can be implemented at the wellhead using temporary tankage and equipment. In the first step, caustic is added to the flowback until the concentration of hydroxyl ion is high enough for the metals (Fe, Ca, Mg) to dissociate from the metal-chelate complexes and precipitate as hydroxides. In the second step, hydrogen peroxide is added and allowed to react until all of the chelator molecules are oxidized and decomposed. Once treated, the flowback can proceed to the CPF.
    Type: Grant
    Filed: March 28, 2019
    Date of Patent: July 27, 2021
    Assignee: CONOCOPHILLIPS COMPANY
    Inventor: Peter Nelson Slater
  • Publication number: 20210213284
    Abstract: A disposable pacemaker comprises a housing including a stylet port, a pulse generator printed circuit board assembly situated in the housing, and a pacing lead secured to the housing. The pacing lead includes a lumen aligned with the stylet port, such that the stylet port and the lumen of the pacing lead are configured to receive a stylet.
    Type: Application
    Filed: December 15, 2020
    Publication date: July 15, 2021
    Inventors: Thomas Lee Williams, James Michael English, Geordie T. Alfson, Bryan Peter Nelson
  • Patent number: 11061741
    Abstract: Techniques are disclosed for reducing the latency associated with performing data reductions in a multithreaded processor. In response to a single instruction associated with a set of threads executing in the multithreaded processor, a warp reduction unit acquires register values stored in source registers, where each register value is associated with a different thread included in the set of threads. The warp reduction unit performs operation(s) on the register values to compute an aggregate value. The warp reduction unit stores the aggregate value in a destination register that is accessible to at least one of the threads in the set of threads. Because the data reduction is performed via a single instruction using hardware specialized for data reductions, the number of cycles required to perform the data reduction is decreased relative to prior-art techniques that are performed via multiple instructions using hardware that is not specialized for data reductions.
    Type: Grant
    Filed: July 16, 2019
    Date of Patent: July 13, 2021
    Assignee: NVIDIA Corporation
    Inventors: Peter Nelson, Olivier Giroux, Ajay Sudarshan Tirumala
  • Patent number: 10984327
    Abstract: The APPARATUSES, METHODS AND SYSTEMS FOR A DIGITAL CONVERSATION MANAGEMENT PLATFORM (“DCM-Platform”) transforms digital dialogue from consumers, client demands and, Internet search inputs via DCM-Platform components into tradable digital assets, and client needs based artificial intelligence campaign plan outputs. In one implementation, The DCM-Platform may capture and examine conversations between individuals and artificial intelligence conversation agents. These agents may be viewed as assets. One can measure the value and performance of these agents by assessing their performance and ability to generate revenue from prolonging conversations and/or ability to effect sales through conversations with individuals.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: April 20, 2021
    Assignee: NEW VALUEXCHANGE LTD.
    Inventors: Andrew Peter Nelson Jerram, Frederick Francis McMahon
  • Patent number: 10984326
    Abstract: The APPARATUSES, METHODS AND SYSTEMS FOR A DIGITAL CONVERSATION MANAGEMENT PLATFORM (“DCM-Platform”) transforms digital dialogue from consumers, client demands and, Internet search inputs via DCM-Platform components into tradable digital assets, and client needs based artificial intelligence campaign plan outputs. In one implementation, The DCM-Platform may capture and examine conversations between individuals and artificial intelligence conversation agents. These agents may be viewed as assets. One can measure the value and performance of these agents by assessing their performance and ability to generate revenue from prolonging conversations and/or ability to effect sales through conversations with individuals.
    Type: Grant
    Filed: August 19, 2016
    Date of Patent: April 20, 2021
    Assignee: NEWVALUEXCHANGE LTD.
    Inventors: Andrew Peter Nelson Jerram, Frederick Francis McMahon
  • Patent number: 10977037
    Abstract: In one embodiment, a synchronization instruction causes a processor to ensure that specified threads included within a warp concurrently execute a single subsequent instruction. The specified threads include at least a first thread and a second thread. In operation, the first thread arrives at the synchronization instruction. The processor determines that the second thread has not yet arrived at the synchronization instruction and configures the first thread to stop executing instructions. After issuing at least one instruction for the second thread, the processor determines that all the specified threads have arrived at the synchronization instruction. The processor then causes all the specified threads to execute the subsequent instruction. Advantageously, unlike conventional approaches to synchronizing threads, the synchronization instruction enables the processor to reliably and properly execute code that includes complex control flows and/or instructions that presuppose that threads are converged.
    Type: Grant
    Filed: October 7, 2019
    Date of Patent: April 13, 2021
    Assignee: NVIDIA Corporation
    Inventors: Ajay Sudarshan Tirumala, Olivier Giroux, Peter Nelson, Jack Choquette
  • Publication number: 20210090319
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Application
    Filed: December 4, 2020
    Publication date: March 25, 2021
    Inventors: Greg Muthler, Ronald Charles Babich, JR., William Parsons Newhall, JR., Peter Nelson, James Robertson, John Burgess
  • Publication number: 20210019198
    Abstract: Techniques are disclosed for reducing the latency associated with performing data reductions in a multithreaded processor. In response to a single instruction associated with a set of threads executing in the multithreaded processor, a warp reduction unit acquires register values stored in source registers, where each register value is associated with a different thread included in the set of threads. The warp reduction unit performs operation(s) on the register values to compute an aggregate value. The warp reduction unit stores the aggregate value in a destination register that is accessible to at least one of the threads in the set of threads. Because the data reduction is performed via a single instruction using hardware specialized for data reductions, the number of cycles required to perform the data reduction is decreased relative to prior-art techniques that are performed via multiple instructions using hardware that is not specialized for data reductions.
    Type: Application
    Filed: July 16, 2019
    Publication date: January 21, 2021
    Inventors: Peter NELSON, Olivier GIROUX, Ajay Sudarshan TIRUMALA
  • Publication number: 20210012552
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
    Type: Application
    Filed: September 25, 2020
    Publication date: January 14, 2021
    Inventors: Samuli LAINE, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, JR., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
  • Patent number: 10885698
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: January 5, 2021
    Assignee: NVIDIA Corporation
    Inventors: Greg Muthler, Ronald Charles Babich, Jr., William Parsons Newhall, Jr., Peter Nelson, James Robertson, John Burgess
  • Patent number: 10825230
    Abstract: A hardware-based traversal coprocessor provides acceleration of tree traversal operations searching for intersections between primitives represented in a tree data structure and a ray. The primitives may include triangles used in generating a virtual scene. The hardware-based traversal coprocessor is configured to properly handle numerically challenging computations at or near edges and/or vertices of primitives and/or ensure that a single intersection is reported when a ray intersects a surface formed by primitives at or near edges and/or vertices of the primitives.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: November 3, 2020
    Assignee: NVIDIA Corporation
    Inventors: Samuli Laine, Tero Karras, Timo Aila, Robert Ohannessian, William Parsons Newhall, Jr., Greg Muthler, Ian Kwong, Peter Nelson, John Burgess
  • Patent number: 10817295
    Abstract: A streaming multiprocessor (SM) includes a nanosleep (NS) unit configured to cause individual threads executing on the SM to sleep for a programmer-specified interval of time. For a given thread, the NS unit parses a NANOSLEEP instruction and extracts a sleep time. The NS unit then maps the sleep time to a single bit of a timer and causes the thread to sleep. When the timer bit changes, the sleep time expires, and the NS unit awakens the thread. The thread may then continue executing. The SM also includes a nanotrap (NT) unit configured to issue traps using a similar timing mechanism to that described above. For a given thread, the NT unit parses a NANOTRAP instruction and extracts a trap time. The NT unit then maps the trap time to a single bit of a timer. When the timer bit changes, the NT unit issues a trap.
    Type: Grant
    Filed: April 28, 2017
    Date of Patent: October 27, 2020
    Assignee: NVIDIA Corporation
    Inventors: Olivier Giroux, Peter Nelson, Jack Choquette, Ajay Sudarshan Tirumala
  • Patent number: 10810785
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Grant
    Filed: August 10, 2018
    Date of Patent: October 20, 2020
    Assignee: NVIDIA CORPORATION
    Inventors: Greg Muthler, Ronald Charles Babich, Jr., William Parsons Newhall, Jr., Peter Nelson, James Robertson, John Burgess
  • Patent number: 10723980
    Abstract: Described herein are cleaning compositions comprising fermented fruit solutions and builders, methods for making the same, and methods for using the same. The fermented fruit solutions can contain fruit, sugar and water. The builder can be selected from the group consisting of a non-phosphate builder, such as sodium citrate and sodium bicarbonate, boric acid and mixtures thereof. The cleaning compositions can be used to clean articles, launder articles, clean stains from articles, and clean surfaces.
    Type: Grant
    Filed: June 5, 2018
    Date of Patent: July 28, 2020
    Assignee: EQUATOR GLOBAL LIMITED
    Inventors: Peter Nelson Wainman, Sirilak Narongtanupone, Sungworn Sangsri
  • Patent number: 10607141
    Abstract: The APPARATUSES, METHODS AND SYSTEMS FOR A DIGITAL CONVERSATION MANAGEMENT PLATFORM (“DCM-Platform”) transforms digital dialogue from consumers, client demands and, Internet search inputs via DCM-Platform components into tradable digital assets, and client needs based artificial intelligence campaign plan outputs. In one implementation, The DCM-Platform may capture and examine conversations between individuals and artificial intelligence conversation agents. These agents may be viewed as assets. One can measure the value and performance of these agents by assessing their performance and ability to generate revenue from prolonging conversations and/or ability to effect sales through conversations with individuals.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: March 31, 2020
    Assignee: NEWVALUEXCHANGE LTD.
    Inventors: Andrew Peter Nelson Jerram, Frederick Francis McMahon
  • Patent number: 10607140
    Abstract: The APPARATUSES, METHODS AND SYSTEMS FOR A DIGITAL CONVERSATION MANAGEMENT PLATFORM (“DCM-Platform”) transforms digital dialogue from consumers, client demands and, Internet search inputs via DCM-Platform components into tradable digital assets, and client needs based artificial intelligence campaign plan outputs. In one implementation, The DCM-Platform may capture and examine conversations between individuals and artificial intelligence conversation agents. These agents may be viewed as assets. One can measure the value and performance of these agents by assessing their performance and ability to generate revenue from prolonging conversations and/or ability to effect sales through conversations with individuals.
    Type: Grant
    Filed: September 20, 2017
    Date of Patent: March 31, 2020
    Assignee: NEWVALUEXCHANGE LTD.
    Inventors: Andrew Peter Nelson Jerram, Frederick Francis McMahon
  • Publication number: 20200051317
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 13, 2020
    Inventors: Greg MUTHLER, Ronald Charles BABICH, JR., William Parsons NEWHALL, JR., Peter NELSON, Jim ROBERTSON, John BURGESS
  • Publication number: 20200051318
    Abstract: In a ray tracer, to prevent any long-running query from hanging the graphics processing unit, a traversal coprocessor provides a preemption mechanism that will allow rays to stop processing or time out early. The example non-limiting implementations described herein provide such a preemption mechanism, including a forward progress guarantee, and additional programmable timeout options that can be time or cycle based. Those programmable options provide a means for quality of service timing guarantees for applications such as virtual reality (VR) that have strict timing requirements.
    Type: Application
    Filed: August 10, 2018
    Publication date: February 13, 2020
    Inventors: Greg MUTHLER, Ronald Charles BABICH, JR., William Parsons NEWHALL, JR., Peter NELSON, James ROBERTSON, John BURGESS
  • Patent number: D879071
    Type: Grant
    Filed: November 10, 2017
    Date of Patent: March 24, 2020
    Inventors: Edward Thomas Rose, Liberty Scarlett Fearns, Morten Villiers Warren, Peter Nelson, Bjorn H. Hovland, Jason Nims