Patents by Inventor Peter Richard
Peter Richard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10982239Abstract: The present invention relates to a field of genetically modified fungal cells and converting galacturonic acid to meso-galactaric acid, more precisely to a method of producing meso-galactaric acid. The invention further relates to recombinant fungal cells having a specific combination of modifications including but not limited to expression of uronate dehydrogenase enzyme, reduced D-galacturonic acid reductase activity, and furthermore reduced meso-galactaric acid catabolism, as well as uses and methods related thereto.Type: GrantFiled: May 19, 2017Date of Patent: April 20, 2021Assignee: TEKNOLOGIAN TUTKIMUSKESKUS VTT OYInventors: Joosu Kuivanen, Peter Richard, Ying-Mong Jasmin Wang
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Publication number: 20210101887Abstract: The invention relates to processes for preparing isoindolin-1-one derivatives, and in particular processes for preparing (2S,3S)-3-(4-chlorophenyl)-3-[(1R)-1-(4-chlorophenyl)-7-fluoro-5-[(1S)-1-hydroxy-1-(oxan-4-yl)propyl]-1-methoxy-3-oxo-2,3-dihydro-1H-isoindol-2-yl]-2-methylpropanoic acid. The invention also relates to crystalline forms of the compound (2S,3S)-3-(4-chlorophenyl)-3-[(1R)-1-(4-chlorophenyl)-7-fluoro-5-[(1S)-1-hydroxy-1-(oxan-4-yl)propyl]-1-methoxy-3-oxo-2,3-dihydro-1H-isoindol-2-yl]-2-methylpropanoic acid and its salts.Type: ApplicationFiled: March 28, 2018Publication date: April 8, 2021Applicants: ASTEX THERAPEUTICS LIMITED, CANCER RESEARCH TECHNOLOGY LIMITEDInventors: Steven HOWARD, Benjamin David CONS, Jeffrey David ST. DENIS, Charlotte Mary GRIFFITHS-JONES, Steven Douglas HISCOCK, Rhian Sara HOLVEY, Alan Richard BURNS, David COUSIN, Hannah Louise DEXTER, Guillaume François PARRA, John Paul WATTS, Robert JEWELL, Jennifer Ann STOCKWELL, Kim Louise HIRST, Isabelle Anne LEMASSON, David John NASH, James Daniel OSBORNE, Jonas Calleja PRIEDE, Nicholas Paul RICHARDS, Aaron Michael DUMAS, Brian Christopher BISHOP, David PARRY-JONES, Jeremy Peter SCOTT, Meenakshi Sundaram SHANMUGHAM, Peter Richard MULLENS, David Charles LATHBURY, Darren James DIXON, Matthew James GAUNT
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Patent number: 10967371Abstract: Methods and apparatus for controlling flow in a microfluidic arrangement are disclosed. In one arrangement, a microfluidic arrangement comprises a first liquid held predominantly by surface tension in a shape defining a microfluidic pattern on a surface of a substrate. The microfluidic pattern comprises at least an elongate conduit and a first reservoir. A second liquid is in direct contact with the first liquid and covers the microfluidic pattern. A flow of liquid is driven through the elongate conduit into the first reservoir.Type: GrantFiled: August 16, 2017Date of Patent: April 6, 2021Assignee: OXFORD UNIVERSITY INNOVATION LIMITEDInventors: Edmond Walsh, Alexander Feuerborn, Peter Richard Cook
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Patent number: 10963252Abstract: A method to compare first and second source data in a processor in response to a vector maximum with indexing instruction includes specifying first and second source registers containing first and second source data, a destination register storing compared data, and a predicate register. Each of the registers includes a plurality of lanes. The method includes executing the instruction by, for each lane in the first and second source register, comparing a value in the lane of the first source register to a value in the corresponding lane of the second source register to identify a maximum value, storing the maximum value in a corresponding lane of the destination register, asserting a corresponding lane of the predicate register if the maximum value is from the first source register, and de-asserting the corresponding lane of the predicate register if the maximum value is from the second source register.Type: GrantFiled: May 24, 2019Date of Patent: March 30, 2021Assignee: Texas Instruments IncorporatedInventors: Duc Bui, Peter Richard Dent, Timothy D. Anderson
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Publication number: 20210071889Abstract: Systems and techniques are described for alerting individuals of HVAC system issues in their home. In some implementations, a monitoring system monitors a property that includes sensors located throughout the property and generates sensor data. A monitor control unit receives thermostat data from a thermostat that indicates activity of the HVAC system and temperature history of the property. The monitor control unit applies the thermostat and the sensor data to an HVAC model that is trained using past sensor data, past thermostat data, past errors of the HVAC system. The monitor control unit determines an error of the HVAC system from the HVAC model output. The monitor control unit determines an action for likely correcting the error of the HVAC system. The monitor control unit provides, for output, data identifying the error of the HVAC system and the action for likely correcting the error of the HVAC system.Type: ApplicationFiled: November 18, 2020Publication date: March 11, 2021Inventors: Robert Nathan Picardi, Peter Richard Williams, Zachary William Seid, Kyle Rankin Johnson, Daniel Marc Goodman, Craig Carl Heffernan, Caspar John Anderegg, Harrison Wayne Donahue, Gustaf Nicolaus Maxwell Lonaeus
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Publication number: 20210042227Abstract: Coherency control circuitry (10) supports processing of a safe-speculative-read transaction received from a requesting master device (4). The safe-speculative-read transaction is of a type requesting that target data is returned to a requesting cache (11) of the requesting master device (4) while prohibiting any change in coherency state associated with the target data in other caches (12) in response to the safe-speculative-read transaction. In response, at least when the target data is cached in a second cache associated with a second master device, at least one of the coherency control circuitry (10) and the second cache (12) is configured to return a safe-speculative-read response while maintaining the target data in the same coherency state within the second cache. This helps to mitigate against speculative side-channel attacks.Type: ApplicationFiled: March 12, 2019Publication date: February 11, 2021Inventors: Andreas Lars SANDBERG, Stephan DIESTELHORST, Nikos NIKOLERIS, Ian Michael CAULFIELD, Peter Richard GREENHALGH, Frederic Claude Marie PIRY, Albin Pierrick TONNERRE
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Patent number: 10909678Abstract: A method and apparatus for monitoring a human or animal subject in a room using video imaging of the subject and analysis of the video image to derive an estimate of vital signs such as heart rate or breathing rate. The method includes determination of whether the subject in the images is still or moving, and whether any of the regions from which vital signs are being detected are not on the subject. The subject's movement may be manually or automatically detected, and the determination of whether regions from which vital signs are being detected are not on the subject can be input manually, by displaying the regions to the user in a visually distinguishable manner, or automatically. Vital signs measurements are only displayed if the subject is determined as being still and if there are no regions in the image which are returning vital signs signals but are not determined as being on the subject.Type: GrantFiled: March 4, 2019Date of Patent: February 2, 2021Assignee: OXEHEALTH LIMITEDInventors: Nicholas Dunkley Hutchinson, Oliver John Gibson, Peter Richard Dodds
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AN APPARATUS AND METHOD FOR CONTROLLING ALLOCATION OF INSTRUCTIONS INTO AN INSTRUCTION CACHE STORAGE
Publication number: 20210026635Abstract: An apparatus and method are provided for controlling allocation of instructions into an instruction cache storage. The apparatus comprises processing circuitry to execute instructions, fetch circuitry to fetch instructions from memory for execution by the processing circuitry, and an instruction cache storage to store instructions fetched from the memory by the fetch circuitry. Cache control circuitry is responsive to the fetch circuitry fetching a target instruction from a memory address determined as a target address of an instruction flow changing instruction, at least when the memory address is within a specific address range, to prevent allocation of the fetched target instruction into the instruction cache storage unless the fetched target instruction is at least one specific type of instruction. It has been found that such an approach can inhibit the performance of speculation-based caching timing side-channel attacks.Type: ApplicationFiled: March 20, 2019Publication date: January 28, 2021Inventors: Frederic Claude Marie PIRY, Peter Richard GREENHALGH, Ian Michael CAULFIELD, Albin Pierrick TONNERRE -
Publication number: 20210027000Abstract: Methods, systems, computer-readable media, and apparatuses for performing, providing, managing, executing, and/or running a spatially-optimized simulation are presented. In one or more embodiments, the spatially-optimized simulation may comprise a plurality of worker modules performing the simulation, a plurality of entities being simulated among the plurality of worker modules, a plurality of bridge modules facilitating communication between workers and an administrative layer including a plurality of chunk modules, at least one receptionist module, and at least one oracle module. The spatially-optimized simulation may be configured to provide a distributed, persistent, fault-tolerate and spatially-optimized simulation environment. In some embodiments, load balancing and fault tolerance may be performed using transfer scores and/or tensile energies determined among the candidates for transferring simulation entities among workers.Type: ApplicationFiled: October 14, 2020Publication date: January 28, 2021Inventors: Robert James Frederick Whitehead, Peter Richard Lipka, Matthew John Reveley Lewis, Hanying Tang
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Publication number: 20210026641Abstract: An apparatus and method of operating a data processing apparatus are disclosed. The apparatus comprises data processing circuitry to perform data processing operations in response to a sequence of instructions, wherein the data processing circuitry is capable of performing speculative execution of at least some of the sequence of instructions. A cache structure comprising entries stores temporary copies of data items which are subjected to the data processing operations and speculative execution tracking circuitry monitors correctness of the speculative execution and responsive to indication of incorrect speculative execution to cause entries in the cache structure allocated by the incorrect speculative execution to be evicted from the cache structure.Type: ApplicationFiled: March 21, 2019Publication date: January 28, 2021Inventors: Ian Michael CAULFIELD, Peter Richard GREENHALGH, Frederic Claude Marie PIRY, Albin Pierrick TONNERRE
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Publication number: 20210019148Abstract: Examples of the present disclosure relate to an apparatus comprising execution circuitry to execute instructions defining data processing operations on data items. The apparatus comprises cache storage to store temporary copies of the data items. The apparatus comprises prefetching circuitry to a) predict that a data item will be subject to the data processing operations by the execution circuitry by determining that the data item is consistent with an extrapolation of previous data item retrieval by the execution circuitry, and identifying that at least one control flow element of the instructions indicates that the data item will be subject to the data processing operations by the execution circuitry; and b) prefetch the data item into the cache storage.Type: ApplicationFiled: March 14, 2019Publication date: January 21, 2021Inventors: Ian Michael CAULFIELD, Peter Richard GREENHALGH, Frederic Claude Marie PIRY, Albin Pierrick TONNERRE
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Publication number: 20200410088Abstract: An apparatus (2) has processing circuitry to process micro-operations, the processing circuitry supporting speculative processing of read micro-operations for reading data from a memory system. A cache (6, 8) is provided to cache the micro-operations or instructions decoded to generate the micro-operations. Profiling circuitry (40) annotates at least one cached micro-operation or instruction with annotation information depending on analysis of whether a read micro-operation satisfies a speculative side-channel condition indicative of a risk of information leakage if the read micro-operation is processed speculatively. The processing circuitry (12, 14) determines whether to trigger a speculative side-channel mitigation measure depending on the annotation information stored in the cache (6, 8).Type: ApplicationFiled: March 12, 2019Publication date: December 31, 2020Inventors: Peter Richard GREENHALGH, Frederic Claude Marie PIRY, Ian Michael CAULFIELD, Albin Pierrick TONNERRE
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Publication number: 20200413497Abstract: An electrical heating cable with a first power supply conductor, a second power supply conductor, and a third power supply conductor. Each of the first, second and third power supply conductors extend along a length of the cable. The electrical heating cable also includes an electrically conductive heating element body, wherein the first, second and third power supply conductors are electrically coupled to each other via the electrically conductive heating element body. The second power supply conductor is provided with a layer of electrically insulating material which covers only a part of a surface of the second power supply conductor. The layer is provided between the surface of the second power supply conductor and the electrically conductive heating element body.Type: ApplicationFiled: February 25, 2019Publication date: December 31, 2020Applicant: Heat Trace LimitedInventors: Neil Malone, Jason Daniel Harold O'Connor, Peter Richard Howe, lan James Scott
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Publication number: 20200410110Abstract: An apparatus comprises processing circuitry 14 to perform data processing in response to instructions, the processing circuitry supporting speculative processing of read operations for reading data from a memory system 20, 22; and control circuitry 12, 14, 20 to identify whether a sequence of instructions to be processed by the processing circuitry includes a speculative side-channel hint instruction indicative of whether there is a risk of information leakage if at least one subsequent read operation is processed speculatively, and to determine whether to trigger a speculative side-channel mitigation measure depending on whether the instructions include the speculative side-channel hint instruction. This can help to reduce the performance impact of measures taken to protect against speculative side-channel attacks.Type: ApplicationFiled: March 12, 2019Publication date: December 31, 2020Inventors: Peter Richard GREENHALGH, Frederic Claude Marie PIRY, Ian Michael CAULFIELD, Albin Pierrick TONNERRE
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Publication number: 20200378860Abstract: Methods, systems, and apparatus, including computer programs encoded on a storage device, for performing leak detection. In one aspect, the method includes actions of obtaining water consumption data that is based on first sensor data generated by a connected water meter that is installed at a property, determining, based on the obtained water consumption data, (i) that a water leak is occurring at the property and (ii) a type of water leak that is occurring at the property, in response to determining (i) that a water leak is occurring at the property and (ii) a type of water leak that is occurring at the property, determining, based on a type of water leak that is determined to be occurring at the property, an operation to mitigate potential damages caused by the water leak, and initiating performance of the operation in order to mitigate potential damages caused by the water leak.Type: ApplicationFiled: August 18, 2020Publication date: December 3, 2020Inventors: Robert Nathan Picardi, Matthew Daniel Correnti, Daniel Marc Goodman, Craig Carl Heffernan, Peter Richard Williams, Harrison Wayne Donahue
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Publication number: 20200376486Abstract: Methods and apparatus for manufacturing a microfluidic arrangement are disclosed. In one arrangement, a continuous body of a first liquid is provided in direct contact with a first substrate. A second liquid covers the first liquid. A separation fluid, immiscible with the first liquid, is propelled through at least the first liquid and into contact with the first substrate along all of a selected path on the surface of the first substrate. First liquid that was initially in contact with all of the selected path is displaced away from the selected path. The first liquid is divided to form sub-bodies of first liquid that are separated from each other. For each of one or more of the sub-bodies, a sub-body footprint represents an area of contact between the sub-body and the first substrate, and all of a boundary of the sub-body footprint is in contact with a closed loop of the selected path surrounding the sub-body footprint.Type: ApplicationFiled: February 5, 2019Publication date: December 3, 2020Inventors: Edmond Walsh, Alexander Feuerborn, Peter Richard Cook, Cristian Soitu
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Publication number: 20200371788Abstract: A method to compare first and second source data in a processor in response to a vector maximum with indexing instruction includes specifying first and second source registers containing first and second source data, a destination register storing compared data, and a predicate register. Each of the registers includes a plurality of lanes. The method includes executing the instruction by, for each lane in the first and second source register, comparing a value in the lane of the first source register to a value in the corresponding lane of the second source register to identify a maximum value, storing the maximum value in a corresponding lane of the destination register, asserting a corresponding lane of the predicate register if the maximum value is from the first source register, and de-asserting the corresponding lane of the predicate register if the maximum value is from the second source register.Type: ApplicationFiled: May 24, 2019Publication date: November 26, 2020Inventors: Duc BUI, Peter Richard DENT, Timothy D. ANDERSON
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Patent number: 10845079Abstract: Systems and techniques are described for alerting individuals of HVAC system issues in their home. In some implementations, a monitoring system monitors a property that includes sensors located throughout the property and generates sensor data. A monitor control unit receives thermostat data from a thermostat that indicates activity of the HVAC system and temperature history of the property. The monitor control unit applies the thermostat and the sensor data to an HVAC model that is trained using past sensor data, past thermostat data, past errors of the HVAC system. The monitor control unit determines an error of the HVAC system from the HVAC model output. The monitor control unit determines an action for correcting the error of the HVAC system. The monitor control unit provides, for output, data identifying the error of the HVAC system and the action for correcting the error of the HVAC system.Type: GrantFiled: June 28, 2018Date of Patent: November 24, 2020Assignee: Alarm.com IncorporatedInventors: Robert Nathan Picardi, Peter Richard Williams, Zachary William Seid, Kyle Rankin Johnson, Daniel Marc Goodman, Craig Carl Heffernan, Caspar John Anderegg, Harrison Wayne Donahue, Gustaf Nicolaus Maxwell Lonaeus
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Patent number: 10839116Abstract: Methods, systems, computer-readable media, and apparatuses for performing, providing, managing, executing, and/or running a spatially-optimized simulation are presented. In one or more embodiments, the spatially-optimized simulation may comprise a plurality of worker modules performing the simulation, a plurality of entities being simulated among the plurality of worker modules, a plurality of bridge modules facilitating communication between workers and an administrative layer including a plurality of chunk modules, at least one receptionist module, and at least one oracle module. The spatially-optimized simulation may be configured to provide a distributed, persistent, fault-tolerate and spatially-optimized simulation environment. In some embodiments, load balancing and fault tolerance may be performed using transfer scores and/or tensile energies determined among the candidates for transferring simulation entities among workers.Type: GrantFiled: June 14, 2018Date of Patent: November 17, 2020Assignee: Improbable Worlds LtdInventors: Robert James Frederick Whitehead, Peter Richard Lipka, Matthew John Reveley Lewis, Hanying Tang
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Publication number: 20200343930Abstract: A radio frequency (RF) circuit is provided. The RF circuit may include a variety of RF filters organized into a number of filter banks and configured to support carrier aggregation (CA) in a variety of band combinations. In examples discussed herein, the RF circuit is configured to utilize separate receive and transmit filters for filtering an RF receive signal and an RF transmit signal in a time-division duplex (TDD) band, respectively. By employing separate receive and transmit filters for the TDD band, as opposed to using an integrated receive-transmit filter, it may be possible to implement the receive and transmit filters in the RF circuit with improved impedance matching, interference rejection, and insertion loss without increasing a footprint of the RF circuit.Type: ApplicationFiled: April 26, 2019Publication date: October 29, 2020Inventors: Vincenzo DiTommaso, Peter Richard Molnar, Jean Briot, Mudar AlJoumayly