Patents by Inventor Peter Richard

Peter Richard has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10782204
    Abstract: Methods, systems, and apparatus, including computer programs encoded on a storage device, for performing leak detection. In one aspect, the method includes actions of obtaining water consumption data that is based on first sensor data generated by a connected water meter that is installed at a property, determining, based on the obtained water consumption data, (i) that a water leak is occurring at the property and (ii) a type of water leak that is occurring at the property, in response to determining (i) that a water leak is occurring at the property and (ii) a type of water leak that is occurring at the property, determining, based on a type of water leak that is determined to be occurring at the property, an operation to mitigate potential damages caused by the water leak, and initiating performance of the operation in order to mitigate potential damages caused by the water leak.
    Type: Grant
    Filed: July 23, 2018
    Date of Patent: September 22, 2020
    Assignee: Alarm.com Incorporated
    Inventors: Robert Nathan Picardi, Matthew Daniel Correnti, Daniel Marc Goodman, Craig Carl Heffernan, Peter Richard Williams, Harrison Wayne Donahue
  • Publication number: 20200257531
    Abstract: A processing pipeline may have first and second execution circuits having different performance or energy consumption characteristics. Instruction supply circuitry may support different instruction supply schemes with different energy consumption or performance characteristics. This can allow a further trade-off between performance and energy efficiency. Architectural state storage can be shared between the execute units to reduce the overhead of switching between the units. In a parallel execution mode, groups of instructions can be executed on both execute units in parallel.
    Type: Application
    Filed: May 1, 2020
    Publication date: August 13, 2020
    Inventors: Peter Richard GREENHALGH, Simon John CRASKE, Ian Michael CAULFIELD, Max John BATLEY, Allan John SKILLMAN, Antony John PENTON
  • Patent number: 10705587
    Abstract: Apparatus for processing data is provided with fetch circuitry for fetching program instructions for execution from one or more active threads of instructions having respective program counter values. Pipeline circuitry has a first operating mode and a second operating mode. Mode switching circuitry switches the pipeline circuitry, between the first operating mode and the second operating mode in dependence upon a number of active threads of program instructions having program instructions available to be executed. The first operating mode has a lower average energy consumption per instruction executed than the second operating mode and the second operating mode has a higher average rate of instruction execution for a single thread than the first operating mode. The first operating mode may utilise a barrel processing pipeline to perform interleaved multiple thread processing. The second operating mode may utilise an out-of-order processing pipeline for performing out-of-order processing.
    Type: Grant
    Filed: April 20, 2016
    Date of Patent: July 7, 2020
    Assignee: ARM Limited
    Inventors: Peter Richard Greenhalgh, Simon John Craske, Ian Michael Caulfield, Max John Batley, Allan John Skillman, Antony John Penton
  • Patent number: 10700976
    Abstract: A method for detecting a fraudulent attempt to activate a new PIN, SIM Card or mobile device includes monitoring, at a first processing node associated with a network interconnecting a first network point and a second network point, a mirrored live-data flow of a live data flow passing through the first processing node in a non-intrusive manner that does not affect the first live-data flow passing through the first processing node. The live-data flow comprises data that is in active transmission between the first network point and the second network point and prior to storage of the data in a database. The first processing node detects that a transaction within the monitored live-data flow relates to an activation of the new PIN, SIM card or mobile device and compares the detected transaction to a list of known fraud situations stored in the first processing node to determine if the detected transaction relates to a known fraud situation.
    Type: Grant
    Filed: May 25, 2018
    Date of Patent: June 30, 2020
    Assignee: NETWORK KINETIX, LLC
    Inventors: Carissa Richards, Peter Richards, Hariharan Ramachandran
  • Patent number: 10701214
    Abstract: A system for monitoring a live-data flow through a network includes at least one server communicating with the network. A processor within each of the at least one server implements a first processing node for monitoring a mirrored live-data flow of the live-data flow passing through at least one selected point within the network in a non-intrusive manner that does not affect the live-data flow passing through the at least one selected point. The first processing node decodes data within the mirrored live-data flow according to each protocol associated with the data. The first processing node detects at least one predetermined or deduced condition defined by at least one of a plurality of applications implemented on a second processing node and executes at least one predetermined or deduced response responsive to an indication of occurrence of the at least one predetermined or deduced condition within the decoded data.
    Type: Grant
    Filed: April 1, 2019
    Date of Patent: June 30, 2020
    Assignee: NETWORK KINETIX, LLC
    Inventors: Carissa Richards, Peter Richards
  • Publication number: 20200129977
    Abstract: Methods and apparatus for driving flow in a microfluidic arrangement are provided. In one disclosed arrangement, the microfluidic arrangement comprises a first liquid held predominantly by surface tension in a shape defining a microfluidic pattern on a surface of a substrate. The microfluidic pattern comprises at least an elongate conduit and a first reservoir. The area of contact between the substrate and a portion of the first liquid that forms the elongate conduit defines a conduit footprint. The area of contact between the substrate and a portion of the first liquid that forms the first reservoir defines a first reservoir footprint. The size and shape of each of the conduit footprint and the first reservoir footprint are such that a maximum Laplace pressure supportable by the first liquid in the elongate conduit without any change in the conduit footprint is higher than a maximum Laplace pressure supportable by the first liquid in the first reservoir without any change in the first reservoir footprint.
    Type: Application
    Filed: August 16, 2017
    Publication date: April 30, 2020
    Inventors: Edmond WALSH, Alexander FEUERBORN, Peter Richard COOK
  • Publication number: 20200110311
    Abstract: A backlight unit for a display device comprising a chassis, a reflector affixed to the chassis, optical sheets affixed to the chassis, one or more light emitters affixed to the chassis, and optically-calibrated internal support structures. There is an air gap between the reflector and the optical sheets. The optically-calibrated internal support structures are disposed within the air gap and affixed to the chassis. The optically-calibrated internal support structures are configured to increase rigidity of the chassis, and to substantially not alter the uniformity of light emitted by the one or more light emitters through the optical sheets.
    Type: Application
    Filed: March 21, 2019
    Publication date: April 9, 2020
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Michael Cameron GORDON, Peter Richard OEHLER
  • Patent number: 10613869
    Abstract: An apparatus and method of operating an apparatus are provided. The apparatus comprises execution circuitry to perform data processing operations specified by instructions and instruction retrieval circuitry to retrieve the instructions from memory, wherein the instructions comprise branch instructions. The instruction retrieval circuitry comprises branch target storage to store target instruction addresses for the branch instructions and branch target prefetch circuitry to prepopulate the branch target storage with predicted target instruction addresses for the branch instructions. An improved hit rate in the branch target storage may thereby be supported.
    Type: Grant
    Filed: March 29, 2018
    Date of Patent: April 7, 2020
    Assignee: ARM Limited
    Inventors: Peter Richard Greenhalgh, Frederic Claude Marie Piry, Jose Gonzalez-Gonzalez
  • Publication number: 20200089495
    Abstract: Disclosed embodiments relate to methods of using a processor to load and duplicate scalar data from a source into a destination register. The data may be duplicated in byte, half word, word or double word parts, according to a duplication pattern.
    Type: Application
    Filed: September 24, 2019
    Publication date: March 19, 2020
    Inventors: Timothy David Anderson, Duc Quang Bui, Peter Richard Dent
  • Patent number: 10546030
    Abstract: Non-limiting examples of the present disclosure describe low latency pre-web classification of query data. In examples, processing is performed where query data may be analyzed in a low latency manner that includes providing a vertical intent classification and entity identification for query data before a web ranking service processes the query data. Query data may be received. A vertical intent classification index may be searched using the query data. In examples, the vertical intent classification index may comprise a set of files that can be used to determine one or more candidate entity identifiers for the query data. The one or more entity identifiers may be ranked. The query data, a vertical intent classification for the vertical intent classification index and the one or more ranked candidate entity identifiers may be transmitted for processing associated with a web ranking service. Other examples are also described.
    Type: Grant
    Filed: February 1, 2016
    Date of Patent: January 28, 2020
    Assignee: Microsoft Technology Licensing, LLC
    Inventors: David Anthony Hawking, Peter Richard Bailey, Bodo von Billerbeck, Nicholas Eric Craswell
  • Patent number: 10526363
    Abstract: The present invention is directed to Compounds of Formula (I) and salts thereof, wherein R1, R2, R3 and R4 are defined above herein. The present invention is also directed to uses of the compounds of Formula (I) to add phosphoramidate groups onto organic alcohols.
    Type: Grant
    Filed: August 14, 2015
    Date of Patent: January 7, 2020
    Assignees: Merck Sharp & Dohme Corp., Merck Sharp & Dohme Ltd.
    Inventors: John Simon Edwards, Peter Richard Mullens, Edward Cleator, Bryon L. Simmons, Courtney K. Maguire, Jeremy Peter Scott, Nobuyoshi Yasuda, Yong-Li Zhong, Lisa F. Frey, Peter G. Dormer, Andrew Brunskill, Artis Klapars, Pu Qian, Yi Zhang, Baoqiang Wan, Eric Ashley
  • Publication number: 20190377690
    Abstract: A method is provided that includes performing, by a processor in response to a vector permutation instruction, permutation of values stored in lanes of a vector to generate a permuted vector, wherein the permutation is responsive to a control storage location storing permute control input for each lane of the permuted vector, wherein the permute control input corresponding to each lane of the permuted vector indicates a value to be stored in the lane of the permuted vector, wherein the permute control input for at least one lane of the permuted vector indicates a value of a selected lane of the vector is to be stored in the at least one lane, and storing the permuted vector in a storage location indicated by an operand of the vector permutation instruction.
    Type: Application
    Filed: August 26, 2019
    Publication date: December 12, 2019
    Inventors: Timothy David Anderson, Mujibur Rahman, Dheera Balasubramanian Samudrala, Peter Richard Dent, Duc Quang Bui
  • Publication number: 20190303160
    Abstract: An apparatus and method of operating an apparatus are provided. The apparatus comprises execution circuitry to perform data processing operations specified by instructions and instruction retrieval circuitry to retrieve the instructions from memory, wherein the instructions comprise branch instructions. The instruction retrieval circuitry comprises branch target storage to store target instruction addresses for the branch instructions and branch target prefetch circuitry to prepopulate the branch target storage with predicted target instruction addresses for the branch instructions. An improved hit rate in the branch target storage may thereby be supported.
    Type: Application
    Filed: March 29, 2018
    Publication date: October 3, 2019
    Inventors: Peter Richard GREENHALGH, Frederic Claude Marie PIRY, Jose GONZALEZ-GONZALEZ
  • Publication number: 20190297040
    Abstract: Examples are disclosed that relate to deferring a message based upon a target situation for message presentation. One example provides a computing device including an output subsystem including one or more output devices, an input subsystem including one or more user input devices, and a logic device. The computing device further includes memory storing instructions executable by the logic device to receive a message from a remote computing system, output a notification of the message via the output subsystem, and receive via the input subsystem a request for a deferral of the message, the request for the deferral including an annotation to be stored for a later presentation with the message.
    Type: Application
    Filed: March 20, 2018
    Publication date: September 26, 2019
    Applicant: Microsoft Technology Licensing, LLC
    Inventors: Ryen William WHITE, Peter Richard BAILEY, Mathieu Etienne Jacques AUDOUIN
  • Patent number: 10423413
    Abstract: A method of loading and duplicating scalar data from a source into a destination register. The data may be duplicated in byte, half word, word or double word parts, according to a duplication pattern.
    Type: Grant
    Filed: July 9, 2014
    Date of Patent: September 24, 2019
    Assignee: TEXAS INSTRUMENTS INCORPORATED
    Inventors: Timothy David Anderson, Duc Quang Bui, Peter Richard Dent
  • Publication number: 20190281167
    Abstract: A system for monitoring a live-data flow through a network includes at least one server communicating with the network. A processor within each of the at least one server implements a first processing node for monitoring a mirrored live-data flow of the live-data flow passing through at least one selected point within the network in a non-intrusive manner that does not affect the live-data flow passing through the at least one selected point. The first processing node decodes data within the mirrored live-data flow according to each protocol associated with the data. The first processing node detects at least one predetermined or deduced condition defined by at least one of a plurality of applications implemented on a second processing node and executes at least one predetermined or deduced response responsive to an indication of occurrence of the at least one predetermined or deduced condition within the decoded data.
    Type: Application
    Filed: April 1, 2019
    Publication date: September 12, 2019
    Applicant: Network Kinetix, LLC
    Inventors: Carissa Richards, Peter Richards
  • Publication number: 20190272635
    Abstract: A method and apparatus for monitoring a human or animal subject in a room using video imaging of the subject and analysis of the video image to derive an estimate of vital signs such as heart rate or breathing rate. The method includes determination of whether the subject in the images is still or moving, and whether any of the regions from which vital signs are being detected are not on the subject. The subject's movement may be manually or automatically detected, and the determination of whether regions from which vital signs are being detected are not on the subject can be input manually, by displaying the regions to the user in a visually distinguishable manner, or automatically. Vital signs measurements are only displayed if the subject is determined as being still and if there are no regions in the image which are returning vital signs signals but are not determined as being on the subject.
    Type: Application
    Filed: March 4, 2019
    Publication date: September 5, 2019
    Applicant: OXEHEALTH LIMITED
    Inventors: Nicholas Dunkley Hutchinson, Oliver John Gibson, Peter Richard Dodds
  • Patent number: 10402203
    Abstract: An apparatus comprises prediction circuitry (40, 100, 80) for determining, based on current prediction policy information (43, 82, 104), a predicted behavior to be used for processing instructions. The current prediction policy information is updated based on an outcome of processing of instructions. A storage structure (50) stores at least one entry identifying previous prediction policy information (60) for a corresponding block of instructions. In response to an instruction from a block having a corresponding entry in the storage structure (50) which identifies the previous prediction policy information (60), the current prediction policy information (43, 82, 104) can be reset based on the previous prediction policy information 60 identified in the corresponding entry of the storage structure (50).
    Type: Grant
    Filed: March 31, 2016
    Date of Patent: September 3, 2019
    Assignee: ARM Limited
    Inventors: Max John Batley, Simon John Craske, Ian Michael Caulfield, Peter Richard Greenhalgh, Allan John Skillman, Antony John Penton
  • Patent number: 10394716
    Abstract: An apparatus and method are provided for controlling allocation of data into cache storage. The apparatus comprises processing circuitry for executing instructions, and a cache storage for storing data accessed when executing the instructions. Cache control circuitry is arranged, while a sensitive allocation condition is determined to exist, to be responsive to the processing circuitry speculatively executing a memory access instruction that identifies data to be allocated into the cache storage, to allocate the data into the cache storage and to set a conditional allocation flag in association with the data allocated into the cache storage. The cache control circuitry is then responsive to detecting an allocation resolution event, to determine based on the type of the allocation resolution event whether to clear the conditional allocation flag such that the data is thereafter treated as unconditionally allocated, or to cause invalidation of the data in the cache storage.
    Type: Grant
    Filed: April 6, 2018
    Date of Patent: August 27, 2019
    Assignee: ARM Limited
    Inventors: Frederic Claude Marie Piry, Peter Richard Greenhalgh, Ian Michael Caulfield, Albin Pierrick Tonnerre, Jeffrey Allen Kehl
  • Patent number: D892206
    Type: Grant
    Filed: November 14, 2017
    Date of Patent: August 4, 2020
    Inventor: Peter Richard Miller