Abstract: Semiconductor packages described herein include a thermal capacitor designed to absorb transient heat pulses from a power semiconductor die and subsequently release the transient heat pulses to a surrounding environment, and/or a recessed pad feature. Corresponding methods of production are also described.

Abstract: A semiconductor package includes: an insulating substrate having opposing first and second main sides; a power semiconductor die embedded in, and thinner than or a same thickness as, the substrate, and including a first load terminal bond pad at a first side which faces a same direction as the substrate first main side, a second load terminal bond pad at a second side which faces a same direction as the substrate second main side, and a control terminal bond pad; electrically conductive first vias extending through the substrate in a periphery region; a first metallization connecting the first load terminal bond pad to the first vias at the substrate first main side; solderable first contact pads at the substrate second main side and formed by the first vias; and a solderable second contact pad at the substrate second main side and formed by the second load terminal die bond pad.

Abstract: A packaged half-bridge circuit includes a carrier having a dielectric core and a first layer of metallization formed on an upper surface of the carrier, first and second semiconductor chips, each including a first terminal, a second terminal, and a control terminal, and a conductive connector mounted on the upper surface of the carrier and electrically connected to the first layer of metallization. The first semiconductor chip is configured as a high-side switch of the half-bridge circuit. The second semiconductor chip is configured as a low-side switch of the half-bridge circuit. At least one of the first and second semiconductor chips is embedded within the dielectric core of the carrier. The conductive connector is electrically connected to one of the first and second terminals from one or both of the first and second semiconductor chips.

Abstract: The present invention relates to an electronic module. In particular, to an electronic module which includes one or more components embedded in an installation base. The electronic module can be a module like a circuit board, which includes several components, which are connected to each other electrically, through conducting structures manufactured in the module. The components can be passive components, microcircuits, semiconductor components, or other similar components. Components that are typically connected to a circuit board form one group of components. Another important group of components are components that are typically packaged for connection to a circuit board. The electronic modules to which the invention relates can, of course, also include other types of components.

Abstract: A method of forming contacts to an embedded semiconductor die includes embedding a semiconductor die in an encapsulation material, the semiconductor die having a first terminal at a first side of the semiconductor die, forming a first metal mask on a first surface of the encapsulation material, the first metal mask being positioned over the first side of the semiconductor die and exposing a first part of the encapsulation material aligned with the first terminal of the semiconductor die, directing a pressurized stream of liquid toward the first surface of the encapsulation material with the first metal mask, to remove the first exposed part of the encapsulation material and form a first contact opening to the first terminal of the semiconductor die, and forming an electrically conductive material in the first contact opening. Related semiconductor packages are also described.

Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

Abstract: A power electronic assembly includes a board having metal layers laminated onto or between electrically insulating layers, and a power device embedded in the board. A first metal layer provides electrical contacts at a first side of the board. A second metal layer provides a thermal contact at a second side of the board. A third metal layer is positioned between the first metal layer and the power device and configured to distribute a load current switched by the power device. A fourth metal layer is positioned between the second metal layer and the power device and configured as a primary thermal conduction path for heat generated by the power device during switching of the load current. A first electrically insulating layer separates the fourth metal layer from the second metal layer so that the fourth metal layer is electrically isolated from but thermally connected to the second metal layer.

Abstract: A multiphase inverter apparatus includes an insulating substrate, a plurality of half bridge circuits and a phase output lead for each half bridge circuit. The substrate includes a conductive redistribution structure on a first surface and having at least one low voltage bus and at least one high voltage bus. Each half-bridge circuit is electrically coupled between a low voltage bus and a high voltage bus and includes: a packaged low side switch; a packaged high side switch; and a phase output electrically coupled with the respective phase output lead. The packaged low side and high side switches are arranged on the first surface of the substrate. The phase output lead is arranged on and electrically coupled to the packaged low side and high side switches such that the low side and high side switches are arranged vertically between the phase output lead and the first surface of the substrate.

Abstract: A method of manufacturing a power semiconductor system includes providing a power module having one or more power transistor dies and attaching an inductor module to the power module such that the inductor module is electrically connected to a node of the power module. The inductor module includes a substrate with a magnetic material and windings at one or more sides of the substrate. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.

Abstract: The present invention relates to an electronic module. In particular, to an electronic module which includes one or more components embedded in an installation base. The electronic module can be a module like a circuit board, which includes several components, which are connected to each other electrically, through conducting structures manufactured in the module. The components can be passive components, microcircuits, semiconductor components, or other similar components. Components that are typically connected to a circuit board form one group of components. Another important group of components are components that are typically packaged for connection to a circuit board. The electronic modules to which the invention relates can, of course, also include other types of components.

Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

Abstract: A method of manufacturing a chip package is provided. The method includes patterning at least one chip pad of a chip to form a patterned structure in the at least one chip pad, the patterned structure including at least one predefined recess, and encapsulating the chip with encapsulating material, thereby filling the at least one predefined recess.

Abstract: A semiconductor package includes a semiconductor die having a semiconductor device, and first and second contact pads arranged on opposite surfaces of the die. The semiconductor die is embedded in a dielectric layer. The semiconductor package also includes one or more first package contact pads and one or more second package contact pads arranged on a first major surface of the semiconductor package. The first contact pad of the die is coupled to the one or more first package contact pads, and the second contact pad of the die is coupled to the one or more second package contact pads. In operation, the semiconductor device causes a current path between the first contact pad and the second contact pad. The package contact pads are arranged on the first major surface of the semiconductor package to provide multiple non-parallel current paths.

Abstract: A die package is provided. The die package may include a laminated carrier including at least one recess, a first die having a frontside, a backside, a frontside metallization on the frontside and a backside metallization on the backside, wherein the first die is arranged in the at least one recess, a first encapsulating material partially encapsulating the first die, by covering at least the frontside metallization or the backside metallization, and an adhesion promoter material between the metallization covered by the first encapsulation material and the first encapsulation material and in direct physical contact with the first encapsulation material and the metallization covered by the first encapsulation material.

Abstract: A method of manufacturing a power semiconductor system includes providing a power stage module having one or more power transistor dies attached to or embedded in a first printed circuit board and attaching an inductor module to the power stage module such that the inductor module is electrically connected to an output node of the power stage module. The inductor module includes a ferrite sheet embedded in a second printed circuit board and windings patterned into the second printed circuit board. Further methods of manufacturing power semiconductor systems and methods of manufacturing inductor modules are also described.

Abstract: A power device includes a frame having an electrically insulative material, an opening in the electrically insulative material, and an electrical conductor extending through the electrically insulative material. A power stage module fixed in the opening has an output terminal at a first side of the power stage module, and a power terminal, a ground terminal and a plurality of input/output (I/O) terminals at a second side of the power stage module opposite the first side. A passive component has a first terminal attached to the output terminal of the power stage module and a second terminal attached to the electrical conductor of the frame. The passive component has a larger footprint than the power stage module. The frame expands the footprint of the power stage module to accommodate mounting of the passive component to the power device. The frame has a lower interconnect density than the power stage module.

Abstract: A semiconductor package includes a semiconductor die having a semiconductor device, and first and second contact pads arranged on opposite surfaces of the die. The semiconductor die is embedded in a dielectric layer. The semiconductor package also includes one or more first package contact pads and one or more second package contact pads arranged on a first major surface of the semiconductor package. The first contact pad of the die is coupled to the one or more first package contact pads, and the second contact pad of the die is coupled to the one or more second package contact pads. In operation, the semiconductor device causes a current path between the first contact pad and the second contact pad. The package contact pads are arranged on the first major surface of the semiconductor package to provide multiple non-parallel current paths.

Abstract: Electronic module, which comprises a first substrate, a first dielectric layer on the first substrate, at least one electronic chip, which is mounted with a first main surface directly or indirectly on partial region of the first dielectric layer, a second substrate over a second main surface of the at least one electronic chip, and an electrical contacting for the electric contact of the at least one electronic chip through the first dielectric layer, wherein the first adhesion layer on the first substrate extends over an area, which exceeds the first main surface.

Abstract: The present invention relates to an electronic module. In particular, to an electronic module which includes one or more components embedded in an installation base. The electronic module can be a module like a circuit board, which includes several components, which are connected to each other electrically, through conducting structures manufactured in the module. The components can be passive components, microcircuits, semiconductor components, or other similar components. Components that are typically connected to a circuit board form one group of components. Another important group of components are components that are typically packaged for connection to a circuit board. The electronic modules to which the invention relates can, of course, also include other types of components.

Abstract: A power device includes a frame having an electrically insulative material, an opening in the electrically insulative material, and an electrical conductor extending through the electrically insulative material. A power stage module fixed in the opening has an output terminal at a first side of the power stage module, and a power terminal, a ground terminal and a plurality of input/output (I/O) terminals at a second side of the power stage module opposite the first side. A passive component has a first terminal attached to the output terminal of the power stage module and a second terminal attached to the electrical conductor of the frame. The passive component has a larger footprint than the power stage module. The frame expands the footprint of the power stage module to accommodate mounting of the passive component to the power device. The frame has a lower interconnect density than the power stage module.