Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

Abstract: According to one embodiment, a hybrid antenna is described comprising a plurality of windings wherein each winding comprises a loop antenna portion arranged in a plane and a ferrite antenna portion arranged at least partially outside of the plane.

Abstract: Manufacturing method and circuit module, which comprises an insulator layer and, inside the insulator layer, at least one component, which comprises contact areas, the material of which contains a first metal. On the surface of the insulator layer are conductors, which comprise at least a first layer and a second layer, in such a way that at least the second layer contains a second metal. The circuit module comprises contact elements between the contact areas and the conductors for forming electrical contacts. The contact elements, for their part, comprise, on the surface of the material of the contact area, an intermediate layer, which contains a third metal, in such a way that the first, second, and third metals are different metals and the contact surface area (ACONT 1), between the intermediate layer and the contact area is less that the surface area (APAD) of the contact area.

Abstract: Electronic module (100), which comprises a first substrate (102), a first dielectric layer (104) on the first substrate (102), at least one electronic chip (106), which is mounted with a first main surface (108) directly or indirectly on partial region of the first dielectric layer (104), a second substrate (110) over a second main surface (114) of the at least one electronic chip (106), and an electrical contacting (116) for the electric contact of the at least one electronic chip (106) through the first dielectric layer (104), wherein the first adhesion layer (104) on the first substrate (102) extends over an area, which exceeds the first main surface (108).

Abstract: A package comprising an electronic chip, a laminate type encapsulant in and/or on which the electronic chip is mounted, a solderable electric contact on a solder surface of the package, and a solder flow path on and/or in the package which is configured so that, upon soldering the electric contact with a mounting base, part of solder material flows along the solder flow path towards a surface of the package at which the solder material is optically inspectable after completion of the solder connection between the mounting base and the electric contact.

Abstract: A method of manufacturing an electronic device package includes structuring a metal layer to generate a structured metal layer having a plurality of openings. Semiconductor chips are placed into at least some of the openings. An encapsulating material is applied over the structured metal layer and the semiconductor chips to form an encapsulation body. The encapsulation body is separated into a plurality of electronic device packages.

Abstract: An electronic component which comprises an electrically insulating layer having at least one through hole, a patterned electrically conductive structure at least partially on the electrically insulating layer, an electronic chip electrically coupled with the patterned electrically conductive structure, an encapsulant at least partially encapsulating the electronic chip, and at least one electrically conductive contact structure at least partially in the at least one through hole in contact with at least part of the patterned electrically conductive structure.

Abstract: A method for manufacturing a circuit-board structure wherein a conductor foil is provided on an insulating material layer, a resist layer is spread on the conductor foil and a recess formed in the conductor foil and insulating material layer. The resist layer is patterned to form a conductor-pattern having openings wherein conductor patterns may be grown. A component is attached to the conductor foil and conductor pattern and conductor material is removed which does not form part of a conductor pattern.

Abstract: A device includes a first semiconductor chip including a first face, wherein a first contact pad is arranged over the first face. The device further includes a second semiconductor chip including a first face, wherein a first contact pad is arranged over the first face, wherein the first semiconductor chip and the second semiconductor chip are arranged such that the first face of the first semiconductor chip faces in a first direction and the first face of the second semiconductor chip faces in a second direction opposite to the first direction. The first semiconductor chip is located laterally outside of an outline of the second semiconductor chip.

Abstract: The present publication discloses a method for manufacturing a circuit-board structure. In the method, a conductor layer is made, which comprises a conductor foil and a conductor pattern on the surface of the conductor foil. A component is attached to the conductor layer and the conductor layer is thinned, in such a way that the conductor material of the conductor layer is removed from outside the conductor pattern.

Abstract: In an embodiment, an electronic component includes a dielectric layer having a first surface and a second surface, one or more semiconductor dies embedded in the dielectric layer and at least one electrically conductive member. The electrically conductive member includes a first portion and a second portion. The first portion includes a foil including a first metal and the second portion includes an electrodeposited layer including a second metal. The first portion and the second portion are embedded in the dielectric layer.

Abstract: A method which comprises arranging a plurality of electronic chips in a plurality of chip accommodation cavities each defined by a respective surface portion of a substrate and a wall delimited by a respective one of a plurality of holes in an electrically conductive frame arranged on the substrate, at least partially encapsulating the electronic chips in the chip accommodation cavities by an encapsulant, and forming electrically conductive contacts for electrically contacting the at least partially encapsulated electronic chips.

Abstract: In an embodiment, an electronic component includes a dielectric layer having a first surface and a second surface, one or more semiconductor dies embedded in the dielectric layer and at least one electrically conductive member. The electrically conductive member includes a first portion and a second portion. The first portion includes a foil including a first metal and the second portion includes an electrodeposited layer including a second metal. The first portion and the second portion are embedded in the dielectric layer.

Abstract: Manufacturing method and circuit module, which comprises an insulator layer and, inside the insulator layer, at least one component, which comprises contact areas, the material of which contains a first metal. On the surface of the insulator layer are conductors, which comprise at least a first layer and a second layer, in such a way that at least the second layer contains a second metal. The circuit module comprises contact elements between the contact areas and the conductors for forming electrical contacts. The contact elements, for their part, comprise, on the surface of the material of the contact area, an intermediate layer, which contains a third metal, in such a way that the first, second, and third metals are different metals and the contact surface area (ACONT 1), between the intermediate layer and the contact area is less that the surface area (APAD) of the contact area.

Abstract: This publication discloses an electronic module and a method for manufacturing an electronic module, in which a component is glued to the surface of a conductive layer, from which conductive layer conductive patterns are later formed. After gluing the component, an insulating-material layer, which surrounds the component attached to the conductive layer, is formed on, or attached to the surface of the conductive layer. After the gluing of the component, feed-throughs are also made, through which electrical contacts can be made between the conductive layer and the contact zones of the component. After this, conductive patterns are made from the conductive layer, to the surface of which the component is glued.

Abstract: Manufacturing method and circuit module, which comprises an insulator layer and, inside the insulator layer, at least one component, which comprises contact areas, the material of which contains a first metal. On the surface of the insulator layer are conductors, which comprise at least a first layer and a second layer, in such a way that at least the second layer contains a second metal. The circuit module comprises contact elements between the contact areas and the conductors for forming electrical contacts. The contact elements, for their part, comprise, on the surface of the material of the contact area, an intermediate layer, which contains a third metal, in such a way that the first, second, and third metals are different metals and the contact surface area (ACONT 1), between the intermediate layer and the contact area is less that the surface area (APAD) of the contact area.

Abstract: According to one embodiment, a hybrid antenna is described comprising a plurality of windings wherein each winding comprises a loop antenna portion arranged in a plane and a ferrite antenna portion arranged at least partially outside of the plane.

Abstract: A semiconductor device includes a laminate, a first semiconductor chip at least partly embedded in the laminate, a second semiconductor chip mounted on a first main surface of the laminate, and a first electrical contact arranged on the first main surface of the laminate. The second semiconductor chip is electrically coupled to the first electrical contact.

Abstract: Manufacturing method and circuit module, which comprises an insulator layer and, inside the insulator layer, at least one component, which comprises contact areas, the material of which contains a first metal. On the surface of the insulator layer are conductors, which comprise at least a first layer and a second layer, in such a way that at least the second layer contains a second metal. The circuit module comprises contact elements between the contact areas and the conductors for forming electrical contacts. The contact elements, for their part, comprise, on the surface of the material of the contact area, an intermediate layer, which contains a third metal, in such a way that the first, second, and third metals are different metals and the contact surface area (ACONT 1), between the intermediate layer and the contact area is less that the surface area (APAD) of the contact area.