Abstract: A molecular-wire crossbar interconnect for signal routing and communications between a first level and a second level in a molecular-wire crossbar is provided. The molecular wire crossbar comprises a two-dimensional array of a plurality of nanometer-scale switches. Each switch is reconfigurable and self-assembling and comprises a pair of crossed wires which form a junction where one wire crosses another and at least one connector species connecting the pair of crossed wires in the junction. The connector species comprises a bi-stable molecule. Each level comprises at least one group of switches and each group of switches comprises at least one switch, with each group in the first level connected to all other groups in the second level in an all-to-all configuration to provide a scalable, defect-tolerant, fat-tree networking scheme. The primary advantage is ease of fabrication, because an active switch is formed any time two wires cross.

Abstract: An arrangement for configuring a reconfigurable system having a plurality of resources includes a compiler that configures the resources to implement a functional system in accordance with a user design. A defect database is also provided that (1) stores information indicating which of the resources is defective when the resources contain at least one defective resource, and (2) supplies the information to the compiler such that the compiler does not use the defective resource when the compiler configures the resources to implement the user design. The arrangement also includes a detection subsystem that repeatedly and redundantly tests operational condition of the resources grouped in different groups to detect the defective resources.

Abstract: A demultiplexer for a two-dimensional array of a plurality of nanometer-scale switches (molecular wire crossbar network) is disclosed. Each switch comprises a pair of crossed wires which form a junction where one wire crosses another and at least one connector species connecting said pair of crossed wires in said junction. The connector species comprises a bi-stable molecule. The demultiplexer comprises a plurality of address lines accessed by a first set of wires in the two-dimensional array by randomly forming contacts between each wire in the first set of wires to at least one of the address lines. The first set of wires crosses a second set of wires to form the junctions. The demultiplexer solves both the problems of data input and output to a molecular electronic system and also bridges the size gap between CMOS and molecules with an architecture that can scale up to extraordinarily large numbers of molecular devices.

Abstract: A molecular wire crossbar memory (MWCM) system is provided. The MWCM comprises a two-dimensional array of a plurality of nanometer-scale devices, each device comprising a junction formed by a pair of crossed wires where one wire crosses another and at least one connector species connecting the pair of crossed wires in the junction. The connector species comprises a bi-stable molecular switch. The junction forms either a resistor or a diode or an asymmetric non-linear resistor. The junction has a state that is capable of being altered by application of a first voltage and sensed by application of a second, non-destructive voltage.

Abstract: An electrophoretic technique is provided for moving a plurality of chemicals into distinct zones for immobilization on a solid surface. The technique includes introducing a first electrolyte and a second electrolyte into a channel, and interposing between the first and second electrolytes at least one solution containing a plurality of chemicals. Under a given electric field, the first electrolyte has anions with higher effective mobility than the chemicals and the second electrolyte has anions with lower effective mobility than the chemicals. When an electrical potential is applied across the length of the channel the plurality of chemicals in the solution are moved into spatial zones. The chemicals in the zones can then be bound to the interior surface of the channel. Chemicals so bound to the wall surface can be used to build very small structures such as arrays and electrical conducting structures.

Abstract: An arrangement for configuring a reconfigurable system having a plurality of resources includes a compiler that configures the resources to implement a functional system in accordance with a user design. A defect database is also provided that (1) stores information indicating which of the resources is defective when the resources contain at least one defective resource, and (2) supplies the information to the compiler such that the compiler does not use the defective resource when the compiler configures the resources to implement the user design. The arrangement also includes a detection subsystem that repeatedly and redundantly tests operational condition of the resources grouped in different groups to detect the defective resources.

Abstract: A network connection scheme for a direct or an indirect network. The network is implemented in two levels of circuit boards. Every board in the first level crosses all the boards in the second level, with every processor in the first level circuit board coupled to at least two processors that are on two second level circuit boards. This scheme significantly reduces the difficulty in implementing the network.

Abstract: This invention discloses a processing structure, and related method, for performing a selected data processing function by means of multiple processing modules that are selected to perform the selected function when appropriately connected together. The modules are removably connected to a common structure, such as a circuit board, which has associated with it a crossbar switch for providing intermodule data connections necessary for performing the selected function, and a synchronization unit for providing control signals to the modules to keep them in appropriate synchronism for performing the selected function. Convenient reconfiguration of the structure is effected by conditioning the crossbar switch and the synchronization unit as necessary to perform the different function.

Abstract: An interconnect circuit for use in a computer system employing horizontal architecture and having multiple resources of which the use must be scheduled in an optimum manner. The interconnect circuit reduces scheduling to a mechanical task by providing multi-word storage capability at each of a plurality of cross-points connected in data flow paths between the computer resources. At each cross-point of the interconnect circuit, data may be written into a selected location and retrieved from a selected location. Writing may be accomplished by an insertion operation in which already stored data is shifted to vacate the location selected for writing. Likewise, reading can be accompanied by a purge operation in which already stored data are shifted into the location from which a data word is purged. In this manner each cross-point can function as a time delay in a data path, to facilitate scheduling of resource usage.

Abstract: A computer system employing horizontal architecture and having multiple resources of which the use must be scheduled in an optimum manner. Scheduling is reduced to a mechanical task by the use of an interconnect circuit having multi-word storage capability at each of a plurality of cross-points providing data flow paths between the computer resources. At each cross-point of the interconnect circuit, data may be written into a selected location and retrieved from a selected location. Writing may be accomplished by an insertion operation in which already stored data is shifted to vacate the location selected for writing. Likewise, reading can be accompanied by a purge operation in which already stored data is shifted into the location from which data is purged. In this manner, each cross-point can function as a time delay in a data path, to facilitate scheduling of resource usage.

Abstract: A memory circuit in which data words are held in a continuous sequence of locations, a new data word being insertable at a selected address, and a stored data word being readable from a selected address. On data word insertion, the selected location is first vacated by shifting data already stored above or below the selected address by one location. For example, all the data in locations having addresses equal to or greater than the selected address are shifted. Data read from the circuit may be optionally purged from the device and remaining data words are then shifted to fill the location vacated by the purged data. By appropriate selection of the various modes of operation, the memory circuit may be made to operate as a first-in-first-out memory, a last-in-first-out memory, or as a conventional random access memory.