Abstract: A device termination structure, and/or a gate bus-bar structure, and/or other end structure is provided for at least one group of cells in a cellular trench-gate semiconductor device, for example a power MOSFET. In this end structure, a conductive layer (11c), for example of polysilicon gate material, extends on an intermediate insulating layer (55) over a higher-doped (P+) end region (150) of the channel-accommodating region (15). This insulating layer (55) comprises an area (51e) of a trench-etch mask (51), preferably comprising silicon nitride, that is of greater thickness than the gate dielectric layer (17). A window (51a) extends through the trench-etch mask (51) at a location where an end trench (20e) extends into the P+ region (150). The end trench (20e) is an extension of the insulated gate trench (20) into the P+ region (150) and accommodates an extension (11e) of the trench-gate (11). The conductive layer (11c) is connected to the trench-gate extension (11e) via the window (51e).

Abstract: A switching circuit for switching an input dc voltage of predetermined polarity is used, for example, for a synchronous dc-dc converter. The switching circuit is divided between a high side package (52) and a low side package (56) each having a logic input (90) and a switch (6,8) connected between switching outputs (84,86). The switching outputs (84,86) of the high and low side packages (52,56) are connected in series between input voltage terminals (4,2). A pulse width modulator (18) is connected to the logic inputs (90) of the packages for supplying an alternating control signal for switching the high and low side switches (6,8) alternately. Each of the high and low side packages (52,56) contains logic circuitry (150) for controlling the respective switch (6,8) based solely on the voltages on the respective logic input (90) and respective switching outputs (84,86) to prevent the switches (6,8) in the high and low side packages (52,56) from conducting at the same time.

Abstract: A synchronous dc—dc converter converts an input dc voltage to an output dc voltage. A control FET (6) and a sync FET (8) are connected in series between input dc voltage terminals (2,4). An alternating control signal input from a control circuit (18) controls the control and sync FETs (6,8) to be switched on alternately. At least one driver (30, 32) is provided to drive the FETs (6,8). In response to a change in the alternating control signal of a predetermined polarity, the driver (32) switches off the sync FET (8), and then the driver (30) waits for the trigger signal before switching on the control FET (6).

Abstract: An integrated driver circuit includes a low side component and a synchronous dc voltage converter circuit. A sync FET (8) is controlled by a driver (32) powered between high and low voltage power connections (134, 138). A timing circuit (150) controls the driver circuit in accordance with a signal on a control input. The driver circuit (32) is isolated from the timing circuit (150), for example by a level shift circuit (136) and the low voltage power connection (138) of the driver circuit is directly connected to the source (108) of the sync FET (8). This arrangement is intended to reduce transient voltage effects.

Abstract: In a multi-chip module semiconductor device (1), at least one first semiconductor die (20) is mounted on the base portion (11) of a lead-frame (10). A flip chip IC die (30) is mounted by first bump electrodes (31) to electrode contacts (G, S′) on the at least one first die (20) and by second bump electrodes (32) to terminal pins (14) of the lead frame. The integrated circuit of the flip chip (30) does not require any lead-frame base-portion area for mounting, and low impedance circuit connections are provided by the bump electrodes (31, 32). The first die (20) may be a MOSFET power switching transistor, with a gate driver circuit in the flip chip (30). The circuit impedance for the switching transistor may be further reduced by having distributed parallel gate connections (G), which may alternate with distributed parallel source connections (S′), and furthermore by having distributed and alternating power supply connections (VCC, GND).

Abstract: A transistor has a plurality of active zones, (22, 24) separated by separation regions (10). The zones include wide (22) and narrow (24) zones, and the wide zones are formed to be less susceptible to turning on a parasitic bipolar transistor, for example by omitting a source region (8) from the wide zones (22), so causing avalanche current to flow preferentially in the wide zones (22) which have a lesser susceptibility to turning on the parasitic bipolar transistor.

Abstract: A device termination structure, and/or a gate bus-bar structure, and/or other end structure is provided for at least one group of cells in a cellular trench-gate semiconductor device, for example a power MOSFET. In this end structure, a conductive layer (11c), for example of polysilicon gate material, extends on an intermediate insulating layer (55) over a higher-doped (P+) end region (150) of the channel-accommodating region (15). This insulating layer (55) comprises an area (51e) of a trench-etch mask (51), preferably comprising silicon nitride, that is of greater thickness than the gate dielectric layer (17). A window (51a) extends through the trench-etch mask (51) at a location where an end trench (20e) extends into the P+ region (150). The end trench (20e) is an extension of the insulated gate trench (20) into the P+ region (150) and accommodates an extension (11e) of the trench-gate (11). The conductive layer (11c) is connected to the trench-gate extension (11e) via the window (51e).

Abstract: The invention relates to a low side component and a synchronous dc voltage converter circuit. A sync FET (8) is controlled by a driver (32) powered between high and low voltage power connections (134, 138). A timing circuit (150) controls the driver circuit in accordance with a signal on a control input. The driver circuit (32) is isolated from the timing circuit (150), for example by a level shift circuit (136) and the low voltage power connection (138) of the driver circuit is directly connected to the source (108) of the sync FET (8). This may reduce transient voltage effects.

Abstract: A synchronous dc-dc converter converts an input dc voltage to an output dc voltage. A control FET (6) and a sync FET (8) are connected in series between input dc voltage terminals (2,4). An alternating control signal input from a control circuit (18) controls the control and sync FETs (6,8) to be switched on alternately. At least one driver (30, 32) is provided to drive the FETs (6,8). In response to a change in the alternating control signal of a predetermined polarity, the driver (32) switches off the sync FET (8), and then the driver (30) waits for the trigger signal before switching on the control FET (6).

Abstract: A switching circuit for switching an input dc voltage of predetermined polarity is used, for example, for a synchronous dc-dc converter. The switching circuit is divided between a high side package (52) and a low side package (56) each having a logic input (90) and a switch (6,8) connected between switching outputs (84,86). The switching outputs (84,86) of the high and low side packages (52,56) are connected in series between input voltage terminals (4,2). A pulse width modulator (18) is connected to the logic inputs (90) of the packages for supplying an alternating control signal for switching the high and low side switches (6,8) alternately. Each of the high and low side packages (52,56) contains logic circuitry (150) for controlling the respective switch (6,8) based solely on the voltages on the respective logic input (90) and respective switching outputs (84,86) to prevent the switches (6,8) in the high and low side packages (52,56) from conducting at the same time.

Abstract: A crop dehydrator is disclosed that includes a large hollow cylinder, openable at one or both ends, that is air-tight and connected to an air-pump or vacuum pump capable of maintaining a moderate vacuum in the cylinder. As the air is pumped out of the cylinder, the water in a crop in the chamber vaporizes and is pumped out of the cylinder.

Abstract: An explosive laminated cutting tool which provides a self sharpening edge. The improved cutting tool s preferably comprised of two softer metals adhered to a hard central layer forming the cutting edge, with the central layer being made of such a material as tungsten carbide. The central laminate layer is preferably perforated to allow the outer layers to fuse through the perforations to adhere to one another, thus creating a strongly bonded laminated cutting structure which may be self sharpening. A method for manufacturing the cutting tool is also described. Another embodiment comprises a laminate wherein one of the layers has a plurality of recesses in the surface facing another layer. The recesses are filled with particles such as tungsten carbide or diamond. When the layers are explosively welded together, the particles are fused in the weld area.

Abstract: A public telecommunications system includes a local exchange 10, an element manger 11 for managing the exchange 10 and a configuration manager 12 for managing the element manager 11. The element manager 11 is located with the exchange 10 and the configuration manger 12 is situated at a distant location. The exchange 10, element manager 11 and configuration manager 12 are connected by communication links 18, 19. In order to provide a new or existing customer with basic telephony services or one or more supplementary services such as call forwarding, the configuration manager 12 sends an appropriate set of requests to the element manager 11. If one or more of the requests are not successfully performed in the element manager 11, the configuration manger 12 sends further requests to the element manager 11 to cancel the requests which have been successfully performed and thereby return the element manager 11 to its original configuration.