Abstract: A method for manufacturing a bulk acoustic wave resonator, each resonator including: above a substrate, a piezoelectric resonator, and next to the piezoelectric resonator, a contact pad connected to an electrode of the piezoelectric resonator; and, between the piezoelectric resonator and the substrate, a Bragg mirror including at least one conductive layer extending between the pad and the substrate and at least one upper silicon oxide layer extending between the pad and the substrate, the method including the steps of: depositing the upper silicon oxide layer; and decreasing the thickness unevenness of the upper silicon oxide layer due to the deposition method, so that this layer has a same thickness to within better than 2%, and preferably to within better than 1%, at the level of each pad.

Abstract: A method of adjustment in the manufacture of a capacitance of a capacitor supported by a substrate, the method including the steps of: a) forming a first electrode parallel to the surface of the substrate and covering it with a dielectric layer; b) forming, on a first portion of the dielectric layer, a second electrode; c) measuring the capacitance between the first electrode and the second electrode, and deducing therefrom the capacitance to be added to obtain the desired capacitance; d) thinning down a second portion of the dielectric layer, which is not covered by the second electrode, so that the thickness of this second portion is adapted to the forming of the deduced capacitance; and e) forming a third electrode on the thinned-down portion and connecting it to the second electrode.

Abstract: A chip provided with through vias wherein the vias are formed of an opening with insulated walls coated with a conductive material and filled with an easily deformable insulating material, elements of connection to another chip being arranged in front of the easily deformable insulating material.

Abstract: A method of adjustment on manufacturing of a monolithic oscillator including circuit elements and a BAW resonator, this method including the steps of: a) forming the circuit elements and the resonator and electrically connecting them; b) covering the resonator with a frequency adjustment layer; c) measuring the output frequency of the oscillator; d) modifying the thickness of the frequency adjustment layer to modify the output frequency of the oscillator.

Abstract: A link device for three-dimensional integrated structure may include a module having a first end face designed to be in front of a first element of the structure, and a second end face designed to be placed in front of a second element of the structure. The two end faces may be substantially parallel, and the module including a substrate having a face substantially perpendicular to the two end faces and carrying an electrically conducting pattern formed in a metallization level on top of the face and enclosed in an insulating region. The electrically conducting pattern may include a first end part emerging onto the first end face and a second end part emerging onto the second end face and connected to the first end part.

Abstract: An integrated circuit includes a silicon-on-insulator wafer and interconnect layer providing a support for a coplanar waveguide formed above a top side of the support. A through-silicon via is formed from a back side of the support and passing through the silicon-on-insulator wafer to reach the interconnect layer. A trench is formed from the back side of the support underneath the coplanar waveguide. The trench extends over at least an entire length of the coplanar waveguide. The trench passes through the silicon-on-insulator wafer to reach the interconnect layer and may have a substantially same depth as the through-silicon via.

Abstract: A dielectric wafer has, on top of its front face, a front electrical connection including an electrical connection portion. A blind hole passes through from a rear face of the wafer to at least partially reveal a rear face of the electrical connection portion. A through capacitor is formed in the blind hole. The capacitor includes a first conductive layer covering the lateral wall and the electrical connection portion (forming an outer electrode), a dielectric intermediate layer covering the first conductive layer (forming a dielectric membrane), and a second conductive layer covering the dielectric intermediate layer (forming an inner electrode). A rear electrical connection is made to the inner electrode.

Abstract: A main blind hole is formed in a front face of a wafer having a rear face. A through capacitor is formed in the main blind hole including a conductive outer electrode, a dielectric intermediate layer, and a filling conductive material forming an inner electrode. Cylindrical portions of the outer electrode, the dielectric intermediate layer and the inner electrode have front ends situated in a plane of the front face of the wafer. A secondary rear hole is formed in the rear face of the wafer to reveal a bottom of the outer electrode. A rear electrical connection is made to contact the bottom of the outer electrode through the secondary rear hole. A through hole via filled with a conductive material is provided adjacent the through capacitor. An electrical connection is made on the rear face between the rear electrical connection and the through hole via.

Abstract: A transmission line formed in a device including a stack of first and second chips having their front surfaces facing each other and wherein a layer of a filling material separates the front surface of the first chip from the front surface of the second chip, this line including: a conductive strip formed on the front surface side of the first chip in at least one metallization level of the first chip; and a ground plane made of a conductive material formed in at least one metallization level of the second chip.

Abstract: A filtering circuit includes a substrate; an acoustic mirror or a membrane destined to act as a mechanical support of acoustic resonators and to isolate these resonators from the substrate; a first section comprising an upper resonator and a lower resonator coupled to each other by at least one acoustic coupling layer; and a second section comprising an upper resonator and a lower resonator coupled to each other by at least one acoustic coupling layer. The filtering circuit also includes metallic vias implementing an inter stage connection between the lower resonator of a section and the upper resonator of the other section. Preferably, the upper resonators exhibit a piezoelectric layer having a thickness selected in order to achieve an optimal impedance matching between the said first and second sections.

Abstract: A method of adjustment during manufacture of a capacitance of a capacitor supported by a substrate, the method including the steps of: a) forming a first electrode parallel to the surface of the substrate and covering it with a dielectric layer; b) forming, on a first portion of the dielectric layer, a second electrode; c) measuring the electrical signal between the first electrode and the second electrode, and deducing therefrom the capacitance to be added to obtain the desired capacitance; d) thinning down a second portion of the dielectric layer, which is not covered by the second electrode, so that the thickness of this second portion is adapted to the forming of the deduced capacitance; and e) forming a third electrode on the thinned-down portion and connecting it to the second electrode.

Abstract: A method of adjustment on manufacturing of a monolithic oscillator including circuit elements and a BAW resonator, this method including the steps of: a) forming the circuit elements and the resonator and electrically connecting them; b) covering the resonator with a frequency adjustment layer; c) measuring the output frequency of the oscillator; d) modifying the thickness of the frequency adjustment layer to modify the output frequency of the oscillator.

Abstract: A method of adjustment in the manufacture of a capacitance of a capacitor supported by a substrate, the method including the steps of: a) forming a first electrode parallel to the surface of the substrate and covering it with a dielectric layer; b) forming, on a first portion of the dielectric layer, a second electrode; c) measuring the capacitance between the first electrode and the second electrode, and deducing therefrom the capacitance to be added to obtain the desired capacitance; d) thinning down a second portion of the dielectric layer, which is not covered by the second electrode, so that the thickness of this second portion is adapted to the forming of the deduced capacitance; and e) forming a third electrode on the thinned-down portion and connecting it to the second electrode.

Abstract: A method for manufacturing a bulk acoustic wave resonator, each resonator including: above a substrate, a piezoelectric resonator, and next to the piezoelectric resonator, a contact pad connected to an electrode of the piezoelectric resonator; and, between the piezoelectric resonator and the substrate, a Bragg mirror including at least one conductive layer extending between the pad and the substrate and at least one upper silicon oxide layer extending between the pad and the substrate, the method including the steps of: depositing the upper silicon oxide layer; and decreasing the thickness unevenness of the upper silicon oxide layer due to the deposition method, so that this layer has a same thickness to within better than 2%, and preferably to within better than 1%, at the level of each pad.

Abstract: A method for manufacturing a wafer on which are formed resonators, each resonator including, above a semiconductor substrate, a stack of layers including, in the following order from the substrate surface: a Bragg mirror; a compensation layer made of a material having a temperature coefficient of the acoustic velocity of a sign opposite to that of all the other stack layers; and a piezoelectric resonator, the method including the successive steps of: a) depositing the compensation layer; and b) decreasing thickness inequalities of the compensation layer due to the deposition method, so that this layer has a same thickness to within better than 2%, and preferably to within better than 1%, at the level of each resonator.