Patents by Inventor Pierre Morin

Pierre Morin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8952420
    Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.
    Type: Grant
    Filed: July 29, 2013
    Date of Patent: February 10, 2015
    Assignee: STMicroelectronics, Inc.
    Inventors: Nicolas Loubet, Pierre Morin
  • Publication number: 20150028349
    Abstract: Methods and structures for forming strained-channel finFETs are described. Fin structures for finFETs may be formed in two epitaxial layers that are grown over a bulk substrate. A first thin epitaxial layer may be cut and used to impart strain to an adjacent channel region of the finFET via elastic relaxation. The structures exhibit a preferred design range for increasing induced strain and uniformity of the strain over the fin height.
    Type: Application
    Filed: July 29, 2013
    Publication date: January 29, 2015
    Applicant: STMicroelectronics, Inc.
    Inventors: Nicolas Loubet, Pierre Morin
  • Publication number: 20150001595
    Abstract: An apparatus of a semiconductor is provided wherein the apparatus comprises a substrate, a stack, and a fin. The substrate supports the stack and the substrate comprises a first material. The stack provides for the fin and the stack comprises: a strain induced in the stack via the substrate; the first material and a second material; and a plurality of concentrations of the second material with respect to the first material. The fin provides a source and a drain of a field effect transistor.
    Type: Application
    Filed: June 28, 2013
    Publication date: January 1, 2015
    Inventor: Pierre Morin
  • Publication number: 20140357040
    Abstract: A method of making a semiconductor device includes forming a first spacer for at least one gate stack on a first semiconductor material layer, and forming a respective second spacer for each of source and drain regions adjacent the at least one gate. Each second spacer has a pair of opposing sidewalls and an end wall coupled thereto. The method includes filling the source and drain regions with a second semiconductor material while the first and second spacers provide confinement.
    Type: Application
    Filed: May 30, 2013
    Publication date: December 4, 2014
    Applicant: STMICROELECTRONICS, INC.
    Inventors: Nicolas LOUBET, Pierre Morin
  • Publication number: 20140106529
    Abstract: A thermal annealing flow process includes the steps of: depositing a metal or metal alloy on a silicon semiconductor structure, performing a first annealing of a rapid thermal anneal (RTA) type to produce a metal rich phase in a portion of the silicon semiconductor structure, removing unreacted metal or metal alloy and performing a second annealing as a millisecond annealing at a temperature that is below a melt temperature of the silicon material present in the silicon semiconductor structure.
    Type: Application
    Filed: October 10, 2013
    Publication date: April 17, 2014
    Applicants: STMICROELECTRONICS (CROLLES 2) SAS, STMICROELECTRONICS, INC.
    Inventors: Pierre Morin, Remi Beneyton
  • Publication number: 20130049163
    Abstract: An insulation wall separating transistors formed in a thin semiconductor layer resting on an insulating layer laid on a semiconductor substrate, this wall being formed of an insulating material and comprising a wall crossing the thin layer and the insulating layer and penetrating into the substrate, and lateral extensions extending in the substrate under the insulating layer.
    Type: Application
    Filed: August 10, 2012
    Publication date: February 28, 2013
    Inventors: David Barge, Pierre Morin
  • Patent number: 8283707
    Abstract: A MOS transistor includes an etch stop layer presenting a density of less than a determined threshold value, below which the material of said stop layer is permeable to molecules of dihydrogen and/or water. The material may comprise a nitride. A material used for the etch stop layer preferably has a density value of less than about 2.4 g/cm3.
    Type: Grant
    Filed: March 6, 2007
    Date of Patent: October 9, 2012
    Assignee: STMicroelectronics S.A.
    Inventors: Jorge Regolini, Pierre Morin, Daniel Benoit
  • Patent number: 7877927
    Abstract: A modular container for aeroponic and/or hydroponic cultivation of plants comprising vertical columns of cultivating compartments for cultivating plants A vertical nutrient conduit for delivers a nutrient solution to the cultivating compartments. A vertical water conduit is in communication with the cultivating compartment. Mounting elements provide for mounting the container on a vertical support. When at least two like containers are vertically mounted on a vertical support with one container adjacently above another the respective nutrient and water conduits of the like containers are in fluid communication.
    Type: Grant
    Filed: December 16, 2005
    Date of Patent: February 1, 2011
    Inventors: Mario Roy, Jean-Pierre Morin
  • Patent number: 7858920
    Abstract: According to the invention, two simultaneous images with different wavelengths (?1, ?2) are formed in synchronism with each illuminance laser pulse, one of the Images corresponding to the wavelength (?1) of the laser pulses, and the difference between the two images is generated.
    Type: Grant
    Filed: November 22, 2007
    Date of Patent: December 28, 2010
    Assignee: Campagnie Industielle des Lasers Cilas
    Inventors: Jean-Louis Duvent, Jean Yves Thomas, Pierre Morin, Bernard Robic
  • Publication number: 20100128992
    Abstract: The invention comprises illuminating a scene where said magnifying optical system (OP) may occur with at least a first and a second pulses respectively generated by first and second laser transmitters (E1, E2). The first laser transmitter (E1) and a detector of the scene thus illuminated (D) are adjacent, while the second laser transmitter (E2) is remote from said detector (D) transversally to the direction (d) of said scene.
    Type: Application
    Filed: April 7, 2008
    Publication date: May 27, 2010
    Applicant: COMPAGNIE INDUSTRIESLLE DES LASERS CILAS
    Inventors: Jean-Louis Duvent, Jean-Yves Thomas, Pierre Morin
  • Publication number: 20100067744
    Abstract: The invention comprises illuminating a scene where said magnifying optical system (OP) may occur with at least one pulse generated by first laser transmitter (E). The laser transmitter (E) and a first detector of the scene thus illuminated (D1) are adjacent, while a second detector (D2) is remote from said transmitter (E) transversally to the direction (d) of said scene.
    Type: Application
    Filed: April 7, 2008
    Publication date: March 18, 2010
    Applicant: COMPAGNIE INDUSTRIELLE DES LASERS CILAS
    Inventors: Jean-Louis Duvent, Jean-Yves Thomas, Pierre Morin
  • Publication number: 20100065722
    Abstract: According to the invention, two simultaneous images with different wavelengths (?1, ?2) are formed in synchronism with each illuminance laser pulse, one of the Images corresponding to the wavelength (?1) of the laser pulses, and the difference between the two images is generated.
    Type: Application
    Filed: November 22, 2007
    Publication date: March 18, 2010
    Applicant: Compagnie Industrielle Des Lasers Cilas
    Inventors: Jean-Louis Duvent, Jean Yves Thomas, Pierre Morin, Bernard Robic
  • Patent number: 7528030
    Abstract: A semiconductor device includes at least one MOS transistor, each transistor being provided with a source region and a drain region formed in a semiconductor substrate, along with a gate region and spacers. The transistor is covered with a unitary etch stop layer that includes at least a first zone having a first residual stress level (in tension) covering at least one part of the transistor and at least a second zone having a second residual stress level (in compression) covering at least another part of the device. With this configuration, the first residual stress level is higher than the second residual stress level.
    Type: Grant
    Filed: September 8, 2006
    Date of Patent: May 5, 2009
    Assignees: STMicroelectronics (Crolles 2) SAS, Commissariat a l'Energie Atomique
    Inventors: Pierre Morin, Catherine Chaton
  • Publication number: 20070215919
    Abstract: A MOS transistor includes an etch stop layer presenting a density of less than a determined threshold value, below which the material of said stop layer is permeable to molecules of dihydrogen and/or water. The material may comprise a nitride. A material used for the etch stop layer preferably has a density value of less than about 2.4 g/cm3.
    Type: Application
    Filed: March 6, 2007
    Publication date: September 20, 2007
    Applicant: STMicroelectronics S.A.
    Inventors: Jorge Regolini, Pierre Morin, Daniel Benoit
  • Publication number: 20070069256
    Abstract: A semiconductor device includes at least one MOS transistor, each transistor being provided with a source region and a drain region formed in a semiconductor substrate, along with a gate region and spacers. The transistor is covered with a unitary etch stop layer that includes at least a first zone having a first residual stress level (in tension) covering at least one part of the transistor and at least a second zone having a second residual stress level (in compression) covering at least another part of the device. With this configuration, the first residual stress level is higher than the second residual stress level.
    Type: Application
    Filed: September 8, 2006
    Publication date: March 29, 2007
    Applicants: STMicroelectronics (Crolles 2) SAS, Commissariat a L'Energie Atomique
    Inventors: Pierre Morin, Catherine Chaton
  • Patent number: 7187038
    Abstract: A semiconductor device includes a substrate, MOS transistors in the substrate, and a dielectric layer on the MOS transistors. Contact holes are formed through the dielectric layer to provide electrical connection to the MOS transistors. An etch-stop layer is between the MOS transistors and the dielectric layer. The etch-stop layer includes a first layer of material having a first residual stress level and covers some of the MOS transistors, and a second layer of material having a second residual stress level and covers all of the MOS transistors. The respective thickness of the first and second layers of material, and the first and second residual stress levels associated therewith are selected to obtain variations in operating parameters of the MOS transistors.
    Type: Grant
    Filed: November 4, 2003
    Date of Patent: March 6, 2007
    Assignee: STMicroelectronics SA
    Inventors: Pierre Morin, Jorge Luis Regolini
  • Publication number: 20060156624
    Abstract: A modular container for aeroponic and/or hydroponic cultivation of plants comprising vertical columns of cultivating compartments for cultivating plants A vertical nutrient conduit for delivers a nutrient solution to the cultivating compartments. A vertical water conduit is in communication with the cultivating compartment. Mounting elements provide for mounting the container on a vertical support. When at least two like containers are vertically mounted on a vertical support with one container adjacently above another the respective nutrient and water conduits of the like containers are in fluid communication.
    Type: Application
    Filed: December 16, 2005
    Publication date: July 20, 2006
    Inventors: Mario Roy, Jean-Pierre Morin
  • Publication number: 20040135234
    Abstract: A semiconductor device includes a substrate, MOS transistors in the substrate, and a dielectric layer on the MOS transistors. Contact holes are formed through the dielectric layer to provide electrical connection to the MOS transistors. An etch-stop layer is between the MOS transistors and the dielectric layer. The etch-stop layer includes a first layer of material having a first residual stress level and covers some of the MOS transistors, and a second layer of material having a second residual stress level and covers all of the MOS transistors. The respective thickness of the first and second layers of material, and the first and second residual stress levels associated therewith are selected to obtain variations in operating parameters of the MOS transistors.
    Type: Application
    Filed: November 4, 2003
    Publication date: July 15, 2004
    Applicant: STMicroelectronics SA
    Inventors: Pierre Morin, Jorge Luis Regolini
  • Patent number: 6582258
    Abstract: A floating track device for releasable attachment to a drive mechanism of an existing vehicle for supporting, floating, moving and steering the vehicle on a traveling surface includes an endless belt member to weight support the vehicle on the traveling surface. The endless belt member includes a belt endless inner layer spaced from a belt endless outer layer so as to define a plurality of inner and outer surface sections there along. The inner and cuter surface sections form generally elongated floating members positioned adjacent relative to each other and forming housings in which buoyant bodies are disposed. Each outer surface section forms an external corrugation of the endless belt member for traction. Each inner surface section includes an internal corrugation for releasable driving engagement with the vehicle drive mechanism. Holding rods, separating two adjacent floating members, hold and secure the complementary inner and outer surface sections to each other.
    Type: Grant
    Filed: April 23, 2001
    Date of Patent: June 24, 2003
    Inventor: Pierre Morin
  • Publication number: 20020155765
    Abstract: A floating track device for releasably attaching to a drive mechanism of a vehicle for supporting, floating, moving and steering the same on a traveling surface which may be a ground, snow, water, marsh, ice and the like. The device includes a plurality of generally elongated floating members adjacently releasably secured to each other via respective securing members to form at least one endless belt member, and a retaining member for releasably linking the belt member to the drive mechanism, each of the plurality of floating members transverse to the belt member and has an inner surface and an outer surface, the latter forming an external corrugation of the belt member for traction on any different traveling surface, especially on water by pushing on the same. The belt member to adapted to weight support the powered vehicle on the traveling surface.
    Type: Application
    Filed: April 23, 2001
    Publication date: October 24, 2002
    Inventor: Pierre Morin