Abstract: A magnetic multi-pole propulsion array system is applied to at least one external cathode and includes a plurality of magnetic multi-pole thrusters connected adjacent to each other. Each magnetic multi-pole thruster includes a propellant provider, a discharge chamber, an anode and a plurality of magnetic components. The propellant provider outputs propellant. The discharge chamber is connected with the propellant provider to accommodate the propellant. The anode is disposed inside the discharge chamber to generate an electric field. The plurality of magnetic components is respectively disposed on several sides of the discharge chamber. One of the several sides of the discharge chamber of the magnetic multi-pole thruster is applied for one side of a discharge chamber of another magnetic multi-pole thruster.

Abstract: A semiconductor structure and a method for manufacturing a semiconductor structure are provided. The semiconductor structure includes at least two electrode layers, and the electrode layers are parallel to each other and arranged in different layers. Adjacent electrode layers overlap with each other and have an overlapping area, a dielectric layer is arranged between the adjacent electrode layers, and an air gap is arranged in the dielectric layer located in the overlapping area.

Abstract: A contact window structure and a method for forming the contact window structure are provided. The method includes: an etching spacer is formed on a surface of a target layer, and a dielectric layer covering a substrate, the target layer and the etching spacer is formed; the dielectric layer is etched to form an etching hole in the dielectric layer, a bottom of the etching hole exposing a top surface of the etching spacer; and the etching spacer is removed along the etching hole to form an etching channel communicating with the etching hole, the etching channel exposing a portion of the surface of the target layer and constituting a contact window structure with the etching hole.

Abstract: A switch short-circuited diagnosis method includes steps of: determining an initial voltage interval of multiple voltage intervals according to voltage relationships between voltages of a first phase wire, a second phase wire, and a third phase wire; performing a switch short-circuited diagnosis of a first bidirectional switch module in the three consecutive voltage intervals from the initial voltage interval, and including steps of: turning on a first switch branch, a second switch branch, or a third switch branch of the first bidirectional switch module according to the voltage relationships between the voltages of the first, second and third phase wires, determining whether an overcurrent occurs to diagnose whether the first switch branch, the second switch branch, or the third switch branch of the first bidirectional switch module is in a short-circuited state, and performing the switch short-circuited diagnosis for the next voltage interval.

Abstract: A matrix power conversion device including a plurality of three-phase switching modules and a controller is provided. Each three-phase switching module includes a plurality of bidirectional switches connected to the input phase voltages of the three-phase input power respectively and outputs a corresponding output phase voltage of the three-phase output power. The controller determines a maximum voltage, an intermediate voltage and a minimum voltage among all the input phase voltages to acquire a waveform of a control carrier wave in a switching cycle. The controller acquires output expected values corresponding to all output phase voltages and compares them with the waveform of the control carrier wave for acquiring a turning-on time of each of the plurality of bidirectional switches. Accordingly, the controller controls the matrix power conversion device to switch the three-phase input power so as to change the three-phase output power for driving the motor.

Abstract: The present disclosure relates to a redistribution layer (RDL) structure, a manufacturing method thereof, and a semiconductor structure having the same. The RDL structure includes an RDL, disposed on a substrate, and including a bond pad portion and a wire portion connected to the bond pad portion, where a thickness of the bond pad portion is greater than a thickness of the wire portion.

Abstract: A method of controlling a power converter is provided. The power converter generates a three-phase output power by switching an input power through a plurality of switches. The method includes steps of: acquiring a three-phase output command corresponding to the three-phase output power; comparing the three-phase output command with a control carrier to acquire a voltage phase angle corresponding to the three-phase output command; acquiring a three-phase current value of the three-phase output power; detecting the voltage phase angle and a positive/negative change of the three-phase current value to decide a zero-sequence voltage; composing the zero-sequence voltage and the three-phase output command to acquire a three-phase output expected value; comparing the three-phase expected values with the control carrier to acquire a turned-on time of each switch; and switching the input power to adjust the three-phase output power according to the turned-on time of each switch.

Abstract: The present disclosure relates to a wafer, a manufacturing method thereof, and a semiconductor device. The wafer manufacturing method includes: providing a wafer having a scribe lane for die cutting. A plurality of scribe-lane through-silicon-vias is formed at the scribe lane, and the scribe-lane through-silicon-vias are filled with a protective material to form the scribe lane. Through the technique of forming through-silicon vias at the scribe lane and filling them with protective materials, performing cutting along the line of the scribe-lane through-silicon-vias during wafer scribing, the cutting stress is reduced so and damage to the die area is prevented. The scribe-lane through-silicon-vias can effectively reduce the scribe lane width, which is conducive to miniaturizing the scribe lane and improving the effective utilization of wafers.

Abstract: A method of clamping an output current of a three-phase power converter is provided. The three-phase power converter includes three switching bridge arms and provides a three-phase output voltage command, and each switching bridge arm has an upper switch and a lower switch connected in series. The method includes steps of: determining that the output current is greater than a first current threshold to activate a current clamping control procedure, comparing a carrier signal with the three-phase output voltage command to turn on the lower switches by a first zero vector when the carrier signal is rising and turn on the upper switches by a second zero vector when the carrier signal is falling, determining that the output current is greater than a second current threshold to activate an overcurrent protection procedure, wherein the second current threshold is greater than the first current threshold.

Abstract: The present disclosure relates to a wafer, a manufacturing method thereof, and a semiconductor device. The wafer manufacturing method includes: providing a wafer having a scribe lane for die cutting. A plurality of through-silicon-vias for cracking stress release and prevention is formed on one side of the scribe lane, and the through-silicon-vias are filled with a protective material. Through the technique of through-silicon vias filled with protective materials on both sides of the scribe lane, the cutting stress can prevent damage to the die area during wafer cutting. The through-silicon-vias can effectively reduce the scribe lane width, which is conducive to miniaturizing the scribe lane and improving the effective utilization of wafers.

Abstract: A method of controlling a power converter is provided. The power converter generates a three-phase output power by switching an input power through a plurality of switches. The method includes steps of: acquiring a three-phase output command corresponding to the three-phase output power; comparing the three-phase output command with a control carrier to acquire a voltage phase angle corresponding to the three-phase output command; acquiring a three-phase current value of the three-phase output power; detecting the voltage phase angle and a positive/negative change of the three-phase current value to decide a zero-sequence voltage; composing the zero-sequence voltage and the three-phase output command to acquire a three-phase output expected value; comparing the three-phase expected values with the control carrier to acquire a turned-on time of each switch; and switching the input power to adjust the three-phase output power according to the turned-on time of each switch.

Abstract: A semiconductor device includes: a substrate, and a plurality of conductors. A plurality of conductors are configured to form first electrodes of capacitor structures, and are distributed on one side of the substrate in rows and columns. Each of the conductors comprises a columnar body and a plurality of annular bumps. A part of an axial direction of the columnar body is intersected with the substrate. The annular bumps are arranged around the circumference of the columnar body, and a protruding direction of the annular bumps is parallel to the substrate. The plurality of annular bumps are distributed at intervals in the axial direction of the columnar body. Annular bumps of the conductors adjacent in row and column directions are staggered in a direction perpendicular to the substrate.

Abstract: A power system includes a pulse width modulation device. The pulse width modulation device outputs first, second, third and fourth driving signals. The pulse width modulation device receives a control signal. The control signal is divided into a positive periodic signal and a negative periodic signal. A portion of the positive periodic signal higher than or equal to a maximum threshold voltage is clamped as the maximum threshold voltage to generate a first comparison waveform. The positive periodic signal is clamped as the reference voltage level to generate a second comparison waveform. According to the first comparison waveform, a first ramp signal is generated. According to the second comparison waveform, a first pulse width modulation signal is generated. The first, second, third and fourth driving signals are adjusted according to the first ramp signal and the first pulse width modulation signal.

Abstract: The present disclosure provides a redistribution layer (RDL) structure, a semiconductor device and manufacturing method thereof. The semiconductor device comprising an RDL structure that may include a substrate, a first conductive layer, a reinforcement layer and, and a second conductive layer. The first conductive layer may be formed on the substrate and has a first bond pad area. The reinforcement layer may be formed on a surface of the first conductive layer facing away from the substrate and located in the first bond pad area. The second conductive layer may be formed on the reinforcement layer and an area of the first conductive layer not covered by the reinforcement layer. The reinforcement layer has a material strength greater than those of the first conductive layer and the second conductive layer.

Abstract: A matrix power conversion device including a plurality of three-phase switching modules and a controller is provided. Each three-phase switching module includes a plurality of bidirectional switches connected to the input phase voltages of the three-phase input power respectively and outputs a corresponding output phase voltage of the three-phase output power. The controller determines a maximum voltage, an intermediate voltage and a minimum voltage among all the input phase voltages to acquire a waveform of a control carrier wave in a switching cycle. The controller acquires output expected values corresponding to all output phase voltages and compares them with the waveform of the control carrier wave for acquiring a turning-on time of each of the plurality of bidirectional switches. Accordingly, the controller controls the matrix power conversion device to switch the three-phase input power so as to change the three-phase output power for driving the motor.

Abstract: A distribution layer structure and a manufacturing method thereof, and a bond pad structure are provided. The distribution layer structure includes a dielectric layer and a wire layer embedded in the dielectric layer. The wire layer includes a frame and a connection line, the frame has at least two openings and is divided into a plurality of segments by the at least two openings. The connection line is located in the frame and has a plurality of connecting ends connected to the frame. The connection line divides an interior of the frame into a plurality of areas, with each segment connected to one of the connecting ends, and each area connected to one of the openings. This structure provides improved binding force between the wire layer and the dielectric layer without increasing a resistance of a wire connecting with a top bond pad.

Abstract: The present disclosure relates to a package substrate comprising: a substrate having opposing first surface and second surface; at least one vent hole extending through the first surface and the second surface of the substrate, the vent hole comprising at least a long-strip hole.

Abstract: A semiconductor structure includes a supporting layer including a pad area; and a groove formed in the pad area of the supporting layer, wherein a bottom width of the groove is greater than a top width of the groove; and a pad disposed in the pad area on the supporting layer, wherein the pad is partially embedded in the groove. This structure can help to release the bonding pressure during the wire bonding process. When the pad is squeezed out, it can enter the air cavity, which can prevent the protective layer from being lifted up or cracked, and avoid the pad from overflowing. At the same time, the bonding wire squeezed into the air cavity during bonding process increases the contact area between the pad and the supporting layer, thereby enhancing the stability of the overall structure.

Abstract: A power system includes a pulse width modulation device. The pulse width modulation device outputs first, second, third and fourth driving signals. The pulse width modulation device receives a control signal. The control signal is divided into a positive periodic signal and a negative periodic signal. A portion of the positive periodic signal higher than or equal to a maximum threshold voltage is clamped as the maximum threshold voltage to generate a first comparison waveform. The positive periodic signal is clamped as the reference voltage level to generate a second comparison waveform. According to the first comparison waveform, a first ramp signal is generated. According to the second comparison waveform, a first pulse width modulation signal is generated. The first, second, third and fourth driving signals are adjusted according to the first ramp signal and the first pulse width modulation signal.

Abstract: A semiconductor structure includes a base, a conductive pillar at least located in the base, connecting structures and an electrical connection layer. At least one connecting structure is electrically connected to an end of the conductive pillar, the material of the connecting structure is different from that of the conductive pillar, and a total area of an orthographic projection of the connecting structure on the base is less than an area of an orthographic projection of the conductive pillar on the base. The electrical connection layer is electrically connected to an end of the connecting structure distal from the conductive pillar.