Patents by Inventor Ping-Heng Wu

Ping-Heng Wu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210225787
    Abstract: The present disclosure provides a redistribution layer (RDL) structure, a semiconductor device and manufacturing method thereof. The semiconductor device comprising an RDL structure that may include a substrate, a first conductive layer, a reinforcement layer and, and a second conductive layer. The first conductive layer may be formed on the substrate and has a first bond pad area. The reinforcement layer may be formed on a surface of the first conductive layer facing away from the substrate and located in the first bond pad area. The second conductive layer may be formed on the reinforcement layer and an area of the first conductive layer not covered by the reinforcement layer. The reinforcement layer has a material strength greater than those of the first conductive layer and the second conductive layer. The semiconductor device and the manufacturing method provided by the present disclosure may improve the performance of the semiconductor device.
    Type: Application
    Filed: April 1, 2021
    Publication date: July 22, 2021
    Inventors: Ping-Heng WU, Wen Hao HSU
  • Publication number: 20210091019
    Abstract: A distribution layer structure and a manufacturing method thereof, and a bond pad structure are provided. The distribution layer structure includes a dielectric layer and a wire layer embedded in the dielectric layer. The wire layer includes a frame and a connection line, the frame has at least two openings and is divided into a plurality of segments by the at least two openings. The connection line is located in the frame and has a plurality of connecting ends connected to the frame. The connection line divides an interior of the frame into a plurality of areas, with each segment connected to one of the connecting ends, and each area connected to one of the openings. This structure provides improved binding force between the wire layer and the dielectric layer without increasing a resistance of a wire connecting with a top bond pad.
    Type: Application
    Filed: December 2, 2020
    Publication date: March 25, 2021
    Inventors: Ping-Heng WU, Chieh-Ting HSU
  • Patent number: 9659886
    Abstract: The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof. The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad.
    Type: Grant
    Filed: June 27, 2016
    Date of Patent: May 23, 2017
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chung-Hsin Lin, Ping-Heng Wu, Chao-Wen Lay, Hung-Mo Wu, Ying-Cheng Chuang
  • Publication number: 20160307859
    Abstract: The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof. The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad.
    Type: Application
    Filed: June 27, 2016
    Publication date: October 20, 2016
    Inventors: Chung-Hsin Lin, Ping-Heng Wu, Chao-Wen Lay, Hung-Mo Wu, Ying-Cheng Chuang
  • Patent number: 9418949
    Abstract: The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof. The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad.
    Type: Grant
    Filed: September 17, 2013
    Date of Patent: August 16, 2016
    Assignee: NANYA TECHNOLOGY CORPORATION
    Inventors: Chung-Hsin Lin, Ping-Heng Wu, Chao-Wen Lay, Hung-Mo Wu, Ying-Cheng Chuang
  • Publication number: 20150076698
    Abstract: The invention provides a semiconductor device including a substrate, a dielectric layer, a dummy bonding pad, a bonding pad, a redistribution layer, and a metal interconnect. The substrate includes a non-device region and a device region. The dielectric layer is on the non-device region and the device region. The dummy bonding pad is on the dielectric layer of the non-device region. The metal interconnect is in the dielectric layer of the non-device region and connected to the dummy bonding pad. The bonding pad is on the dielectric layer of the device region. The buffer layer is between the bonding pad and the dielectric layer. The buffer layer includes metal, metal nitride, or a combination thereof The redistribution layer is on the dielectric layer and connects the dummy bonding pad and the bonding pad.
    Type: Application
    Filed: September 17, 2013
    Publication date: March 19, 2015
    Applicant: NANYA TECHNOLOGY CORPORATION
    Inventors: Chung-Hsin Lin, Ping-Heng Wu, Chao-Wen Lay, Hung-Mo Wu, Ying-Cheng Chuang