Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a bit line, an isolation spacer, a conductive layer, a landing pad, and an air gap protection structure. The substrate includes a plurality of liners disposed on side surfaces of a trench in the substrate. The bit line is disposed on the substrate. The isolation spacer is disposed on a sidewall of the bit line. The isolation spacer includes an air gap. The conductive layer is disposed over the substrate and next to the isolation spacer. The landing pad is disposed over the bit line. The air gap protection structure covers the landing pad and the air gap. The air gap protection structure includes an upper portion above a top surface of the landing pad and a lower portion below the upper portion.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a bit line, an isolation spacer, a conductive layer, a landing pad, and an air gap protection structure. The substrate includes a plurality of liners disposed on side surfaces of a trench in the substrate. The bit line is disposed on the substrate. The isolation spacer is disposed on a sidewall of the bit line. The isolation spacer includes an air gap. The conductive layer is disposed over the substrate and next to the isolation spacer. The landing pad is disposed over the bit line. The air gap protection structure covers the landing pad and the air gap. The air gap protection structure includes an upper portion above a top surface of the landing pad and a lower portion below the upper portion.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a bit line, an isolation spacer, a conductive layer, a landing pad, and an air gap protection structure. The substrate includes a plurality of liners disposed on side surfaces of a trench in the substrate. The bit line is disposed on the substrate. The isolation spacer is disposed on a sidewall of the bit line. The isolation spacer includes an air gap. The conductive layer is disposed over the substrate and next to the isolation spacer. The landing pad is disposed over the bit line. The air gap protection structure covers the landing pad and the air gap. The air gap protection structure includes an upper portion above a top surface of the landing pad and a lower portion below the upper portion.

Abstract: A semiconductor device and a method for manufacturing the same are provided. The semiconductor device includes a substrate, a bit line, an isolation spacer, a conductive layer, a landing pad, and an air gap protection structure. The substrate includes a plurality of liners disposed on side surfaces of a trench in the substrate. The bit line is disposed on the substrate. The isolation spacer is disposed on a sidewall of the bit line. The isolation spacer includes an air gap. The conductive layer is disposed over the substrate and next to the isolation spacer. The landing pad is disposed over the bit line. The air gap protection structure covers the landing pad and the air gap. The air gap protection structure includes an upper portion above a top surface of the landing pad and a lower portion below the upper portion.

Abstract: The present application discloses a semiconductor device and a method for fabricating the same. The semiconductor device includes a first substrate including a front side and a back side; a first passivation layer over the front side; a second passivation layer over the back side and having a top surface; a conductive feature in the first passivation layer; a through substrate via (TSV) penetrating through the second passivation layer and the first substrate and electrically coupled to the conductive feature; and a polymer liner between the TSV and the first substrate, wherein the polymer liner has a top surface lower than the top surface of the second passivation layer; a barrier layer between the second passivation layer and the TSV, between the polymer liner and the TSV, and between the interconnect structure and the TSV; and an adhesion layer between the barrier layer and the TSV.

Abstract: The present application discloses a semiconductor device with a protruding contact and a method of fabricating the semiconductor device. The semiconductor device includes a substrate, a bit line structure on the substrate, a capacitor contact structure next to the bit line structure, and a landing pad layer covering a portion of a top surface of the capacitor contact structure and an upper portion of a sidewall of the capacitor contact structure.

Abstract: The present application discloses a semiconductor device with a protruding contact and a method of fabricating the semiconductor device. The semiconductor device includes a substrate, a bit line structure on the substrate, a capacitor contact structure next to the bit line structure, and a landing pad layer covering a portion of a top surface of the capacitor contact structure and an upper portion of a sidewall of the capacitor contact structure.

Abstract: The present application discloses a semiconductor device with a protruding contact and a method of fabricating the semiconductor device. The semiconductor device includes a substrate, a bit line structure on the substrate, a capacitor contact structure next to the bit line structure, and a landing pad layer covering a portion of a top surface of the capacitor contact structure and an upper portion of a sidewall of the capacitor contact structure.

Abstract: The present application discloses a semiconductor device with a protruding contact and a method of fabricating the semiconductor device. The semiconductor device includes a substrate, a bit line structure on the substrate, a capacitor contact structure next to the bit line structure, and a landing pad layer covering a portion of a top surface of the capacitor contact structure and an upper portion of a sidewall of the capacitor contact structure.

Abstract: A semiconductor device includes a substrate including a first peripheral region and a second peripheral region; a plurality of recessed gates respectively including a recessed gate dielectric layer positioned in the first peripheral region and including a U-shaped cross-sectional profile, a recessed gate bottom conductive layer positioned on the recessed gate dielectric layer and including a valley-shaped cross-sectional profile, resulting in a first valley, a recessed gate top conductive layer conformally positioned on the first valley of the recessed gate bottom conductive layer, and a recessed gate capping layer positioned on the recessed gate top conductive layer; and a peripheral gate structure positioned on the second peripheral region. An insulative piece is disposed in the each of the plurality of recessed gates, and a void surrounds the insulative piece. An element density of the first peripheral region is greater than an element density of the second peripheral region.

Abstract: A semiconductor device includes a substrate including a first peripheral region and a second peripheral region; a plurality of recessed gates respectively including a recessed gate dielectric layer positioned in the first peripheral region and including a U-shaped cross-sectional profile, a recessed gate bottom conductive layer positioned on the recessed gate dielectric layer and including a valley-shaped cross-sectional profile, resulting in a first valley, a recessed gate top conductive layer conformally positioned on the first valley of the recessed gate bottom conductive layer, and a recessed gate capping layer positioned on the recessed gate top conductive layer; and a peripheral gate structure positioned on the second peripheral region. An insulative piece is disposed in the each of the plurality of recessed gates, and a void surrounds the insulative piece. An element density of the first peripheral region is greater than an element density of the second peripheral region.

Abstract: The present application discloses a contact structure, a semiconductor device including the contact structure, and a method for fabricating the semiconductor device. The contact structure includes a body portion, and an extending portion extending downward from the body portion and including a groove. The groove is recessed into a bottom surface of the extending portion, is recessed toward the body portion, and exposes the body portion.

Abstract: The present application discloses a contact structure, a semiconductor device including the contact structure, and a method for fabricating the semiconductor device. The contact structure includes a body portion, and an extending portion extending downward from the body portion and comprising a groove. The groove is recessed into a bottom surface of the extending portion, is recessed toward the body portion, and exposes the body portion.

Abstract: The present application discloses a semiconductor device structure and a method for fabricating the semiconductor device structure. The semiconductor device structure includes a substrate; a transistor and a resistor disposed in the substrate; a plurality of isolation structures disposed in the substrate; a dielectric layer disposed over the substrate; and an interconnect structure disposed over and electrically connected to the transistor and the resistor. The transistor is disposed between a pair of the isolation structures, and the resistor is disposed between another pair of the isolation structures.

Abstract: The present application discloses a semiconductor device structure and a method for fabricating the semiconductor device structure. The semiconductor device structure includes a substrate; a transistor and a resistor disposed in the substrate; a plurality of isolation structures disposed in the substrate; a dielectric layer disposed over the substrate; and an interconnect structure disposed over and electrically connected to the transistor and the resistor. The transistor is disposed between a pair of the isolation structures, and the resistor is disposed between another pair of the isolation structures.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a fin; a gate structure positioned on the fin, wherein the gate structure includes a gate dielectric layer, a gate bottom conductive layer, a gate top conductive layer, and a gate capping layer; impurity regions positioned on two sides of the fin; contacts correspondingly positioned on the impurity regions; and conductive covering layers correspondingly positioned on the contacts; wherein the contacts include lower portions correspondingly positioned on the impurity regions, middle portions correspondingly positioned on the lower portions, and upper portions correspondingly positioned on the middle portions.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a fin; a gate structure positioned on the fin, wherein the gate structure includes a gate dielectric layer, a gate bottom conductive layer, a gate top conductive layer, and a gate capping layer; impurity regions positioned on two sides of the fin; contacts correspondingly positioned on the impurity regions; and conductive covering layers correspondingly positioned on the contacts; wherein the contacts include lower portions correspondingly positioned on the impurity regions, middle portions correspondingly positioned on the lower portions, and upper portions correspondingly positioned on the middle portions.

Abstract: The present application provides a semiconductor structure and a method of manufacturing the same. The semiconductor structure includes a device and at least one recess transistor. The device includes a substrate and a plurality of word lines. The substrate includes an array portion and a periphery portion surrounding the array portion. The plurality of word lines are disposed in the array portion. The periphery portion is free of word lines. The periphery portion of the substrate defines at least one recess. The at least one recess transistor is disposed in the at least one recess of the periphery portion of the substrate.

Abstract: The present application provides a semiconductor structure and a method of manufacturing the same. The semiconductor structure includes a device and at least one recess transistor. The device includes a substrate and a plurality of word lines. The substrate includes an array portion and a periphery portion surrounding the array portion. The plurality of word lines are disposed in the array portion. The periphery portion is free of word lines. The periphery portion of the substrate defines at least one recess. The at least one recess transistor is disposed in the at least one recess of the periphery portion of the substrate.

Abstract: The present application discloses a semiconductor device and a method for fabricating the semiconductor device. The semiconductor device includes a substrate; a peripheral impurity region positioned in the substrate; a top electrode layer positioned in the peripheral impurity region and protruding upwardly from the substrate; and a middle insulating layer inwardly positioned in the peripheral impurity region and partially surrounding the top electrode layer to separate the peripheral impurity region and the top electrode layer. The peripheral impurity region, the middle insulating layer, and the top electrode layer together configure a programmable structure.