Abstract: A connector includes a connector housing forming a receptacle configured to receive an add-in card. The connector further includes a first connector pin configured to electrically couple to the add-in card responsive to the add-in card being inserted into the receptacle. The first connector pin extends from the connector housing to contact a first solder pad disposed on a printed circuit board (PCB). The connector further includes a second connector pin configured to electrically couple to the add-in card responsive to the add-in card being inserted into the receptacle. The second connector pin extends from the connector housing to contact a second solder pad disposed on the PCB. The first connector pin is oriented toward the second connector pin to couple to the PCB in a toe-routing configuration and the second connector pin is oriented away from the first connector pin to couple to the PCB in the toe-routing configuration.

Abstract: An automatic detecting method and an automatic detecting apparatus using the same are provided. The automatic detecting apparatus includes an inputting unit, a dividing unit, a contouring unit, a range analyzing unit, a boundary analyzing unit, an edge detecting unit, an expanding unit and an overlapping unit. The dividing unit is used for dividing an overlooking image into four clusters via a clustering algorithm. The contouring unit is used for obtaining a contour. The range analyzing unit is used for obtaining a detecting range. The boundary analyzing unit is used for obtaining a circular boundary in the detecting range. The edge detecting unit is used for obtaining a plurality of edges in the circular boundary. The expanding unit is used for expanding the edges to obtain a plurality of expanded edges. The overlapping unit is used for overlapping the expanded edges and the contour to obtain a defect pattern.

Abstract: A portable device is provided. A first processor performs an initial procedure according to an operation clock with a first frequency value and an operation voltage with a first voltage value, and performs a calibration procedure according to the operation clock with a second frequency value and the operation voltage with a second voltage value when the initial procedure has been performed and a self-calibration event is present. A second processor detects whether a specific function of the calibration procedure is being performed by the first processor. The second processor stores the second frequency value and the second voltage value into a storage unit after the calibration procedure is performed. The second voltage value is lower than the first voltage value, and the second frequency value is lower than the first frequency value.

Abstract: The present invention provides an integrated circuit. The integrated circuit comprises: a plurality of core power sources; and a plurality of core power domains, coupled to the core power sources, respectively; wherein the core power domains are overlapped with each other.

Abstract: A receptacle connector includes an insulative housing defining a base and a mating tongue extending from the base with a widen and thicken step structure formed around a root of the mating tongue near to the base, two rows of plate contacts disposed in the insulative housing with contacting sections exposed upon the mating tongue and in front of the step structure and categorized with signal contacts, power contacts and grounding contacts, and a metallic shielding plate disposed within a middle level of the mating tongue and occupying most portions of said mating tongue. The shielding plate defines a pair of immoveable and un-deflectable lateral edge sections in front of the step structure, each lateral edge section is configured to be adapted to be locked with a latch of a plug connector in a transverse direction.

Abstract: There are provided methods and apparatus for in-loop artifact filtering. An apparatus includes an encoder for encoding an image region. The encoder has at least two filters for successively performing in-loop filtering to respectively reduce at least a first and a second type of quantization artifact.

Abstract: A dumbbell with detachable weights has a handle assembly, multiple weights, a first end cap assembly, and a second end cap assembly. The handle assembly has a main support with a handle, a first end panel, and a second end panel. The weights are mounted between the first and second end panels of the main support, are arranged around the handle, and are radially detachable from the main support. The first and second end cap assemblies are respectively mounted on the first and second end panels and selectively engage with the weights. By turning a driving cap of the first end cap assembly, the first and second end cap assemblies can disengage from the weights. Since the weights can be radially mounted onto or detached from the main support, an adjusting range of the training weight of the dumbbell can be increased.

Abstract: There are provided methods and apparatus for in-loop artifact filtering. An apparatus includes an encoder for encoding an image region. The encoder has at least two filters for successively performing in-loop filtering to respectively reduce at least a first and a second type of quantization artifact.

Abstract: A dumbbell with detachable weights has a handle assembly, multiple weights, a first end cap assembly, and a second end cap assembly. The handle assembly has a main support with a handle, a first end panel, and a second end panel. The weights are mounted between the first and second end panels of the main support, are arranged around the handle, and are radially detachable from the main support. The first and second end cap assemblies are respectively mounted on the first and second end panels and selectively engage with the weights. By turning a driving cap of the first end cap assembly, the first and second end cap assemblies can disengage from the weights. Since the weights can be radially mounted onto or detached from the main support, an adjusting range of training weight of the dumbbell can be increased.

Abstract: A receptacle connector includes an insulative housing defining a base and a mating tongue extending from the base with a widen and thicken step structure formed around a root of the mating tongue near to the base, two rows of plate contacts disposed in the insulative housing with contacting sections exposed upon the mating tongue and in front of the step structure and categorized with signal contacts, power contacts and grounding contacts, and a metallic shielding plate disposed within a middle level of the mating tongue and occupying most portions of said mating tongue. The shielding plate defines a pair of immoveable and un-deflectable lateral edge sections in front of the step structure, each lateral edge section is configured to be adapted to be locked with a latch of a plug connector in a transverse direction.

Abstract: A portable device is provided. A first processor performs an initial procedure according to an operation clock with a first frequency value and an operation voltage with a first voltage value, and performs a calibration procedure according to the operation clock with a second frequency value and the operation voltage with a second voltage value when the initial procedure has been performed and a self-calibration event is present. A second processor detects whether a specific function of the calibration procedure is being performed by the first processor. The second processor stores the second frequency value and the second voltage value into a storage unit after the calibration procedure is performed. The second voltage value is lower than the first voltage value, and the second frequency value is lower than the first frequency value.

Abstract: An electrical connector includes a housing defining a front and a rear and a first group of contacts. The housing includes a rear base and a front mating tongue defining a first face and a second face opposite to the first face. The first group of contacts is held in the first face of the front mating tongue, the contacts include grounding contacts and signal contacts, each contact includes a retained portion retained in the housing, a contacting portion exposed upon the first face and a connecting leg. The contacting portions of the grounding contacts electrically connect with each other, the retained portions of the grounding contacts electrical connect with each other to reduce electrical length of the electrical connector.

Abstract: A receptacle connector mounted to a PCB, includes an insulative housing defining a mating tongue and a metallic shell enclosing the housing to form a mating cavity in which said mating tongue forwardly extends. A metallic shielding plate is embedded within a mid-level of the mating tongue wherein a leg of the shielding plate and a tail of an outermost grounding contact share the same conductive grounding region on the PCB. A plug connector mateable with the receptacle connector, includes an insulative housing defining a mating cavity to receive the mating tongue and equipped with a plurality of contacts and a metallic latch beside the mating cavity, wherein a tail of one grounding contact and a leg of the latch share the same conductive grounding region on a paddle card, which is behind the mating cavity and on which tails of the contacts are electrically and mechanically mounted.

Abstract: An electrical connector includes an insulative housing with a base and a mating tongue extending forwardly in a front-to-rear direction from the base, the mating tongue defining a first surface and a second surface opposite to each other. A plurality of contact strips is disposed around the outer surface of the mating tongue of the insulative housing, each contact strip is stamped from a metal sheet and defines a first contacting section exposed upon the first surface and arranged along a transverse direction perpendicular to the front-to-rear direction, and a second contacting section exposed upon the second surface and arranged along the transverse direction.

Abstract: There are provided methods and apparatus for in-loop artifact filtering. An apparatus includes an encoder for encoding an image region. The encoder has at least two filters for successively performing in-loop filtering to respectively reduce at least a first and a second type of quantization artifact.

Abstract: A receptacle electrical connector includes a metallic shell, an insulating bracket defining a receiving cavity, an upper member including a base portion and a mating portion and a lower insulating member distinct from and assembled with the base portion. The upper member is loaded with upper contacts with contacting portions arranged on an upper surface of the mating portion and a shielding plate is located between the upper and lower surface of the upper member. The lower member is loaded with lower contacts with contacting portions extending beyond a front edge of the lower insulating member and arranged on the lower surface of the mating tongue. The assembled base portion and the lower member is received in the receiving cavity of the insulating bracket and the mating portion extends beyond a front face of the insulating bracket and surrounding by the metallic shell to define a mating cavity thereamong.

Abstract: There are provided methods and apparatus for in-loop artifact filtering. An apparatus includes an encoder for encoding an image region. The encoder has at least two filters for successively performing in-loop filtering to respectively reduce at least a first and a second type of quantization artifact.

Abstract: An electrical connector includes a metallic shell defining a mating cavity opening forwards, a terminal module assembly received in the metallic shell, and a shielding plate being located between an upper surface and a lower surface of the terminal module assembly. The terminal module assembly defines a front region exposed in the mating cavity to function as a mating tongue. The terminal module assembly defines an insulator associated with a plurality of contacts with corresponding contacting sections exposed upon opposite upper and lower faces of the mating tongue, the contacts are categorized with differential pairs and grounding contacts. The shielding plate defines a main plate and grounding fingers split from the main plate to directly touch with corresponding grounding contacts. The shielding plate is embedded with the terminal module assembly and the grounding fingers of the shielding plate are fixed with the insulator of the terminal assembly.

Abstract: An electrical connector for mating with a plug and mounting to a printed circuit board, includes an insulative housing with a forwardly extending mating tongue thereof. A terminal module includes an insulator associated with a plurality of contacts commonly assembled into the housing. Those contacts are categorized with the differential pairs, the grounding contacts and the power contacts while each of the contacts includes a front contacting section exposed upon the mating tongue, a middle retention section retained to the insulator, and a rear tail section extending out of the housing. A metallic shielding/reinforcement plate associated with the terminal module is assembled into the housing, and includes a front region inserted into the mating tongue, a middle region with a spring tang to mechanically and electrically connected to the selected grounding contact, and a rear tail section extending out of the housing.

Abstract: A memory cell with a recessed gate includes a semiconductor substrate, a shallow trench isolation, an active region, a gate electrode, a halogen-doped dielectric layer and at least a capacitor. The shallow trench isolation is disposed in the semiconductor substrate in order to define the active region. A source region and a drain region are respectively disposed on each end of the active region along a first direction. A gate trench is formed in the semiconductor substrate between the source region and the drain region, wherein the gate trench includes a sidewall portion and a curved-bottom surface. The curved-bottom surface has a convex profile when viewed from a cross-sectional view taken along a second direction perpendicular to the first direction. The gate electrode is disposed in the gate trench and the halogen-doped dielectric layer is disposed between the gate electrode and the semiconductor substrate.