Abstract: An apparatus may include a storage driver, the storage driver coupled to a processor, to a non-volatile random access memory (NVRAM), and to a redundant array of independent disks (RAID), the storage driver to: receive a memory write request from the processor for data stored in the NVRAM; calculate parity data from the data and store the parity data in the NVRAM; and write the data and the parity data to the RAID without prior storage of the data and the parity data to a journaling drive. In embodiments, the storage driver may be integrated with the RAID. In embodiments, the storage driver may write the data and the parity data to the RAID by direct memory access (DMA) of the NVRAM.

Abstract: Examples relate to a computer system, a computer system host, a first storage device, a second storage device, controllers, methods, apparatuses and computer programs. The computer system includes a first storage device and a second storage device. A storage region is distributed across the first storage device and the second storage device. The computer system further includes a computer system host. The computer system further includes a communication infrastructure configured to connect the first storage device, the second storage device and the computer system host. The computer system host is configured to transmit a request related to the storage region to the first storage device via the communication infrastructure. The first storage device is configured to issue a further request to the second storage device via the communication infrastructure to execute the request.

Abstract: An embodiment of a semiconductor package apparatus may include technology to determine a stream classification for an access request to a persistent storage media, and assign the access request to a stream based on the stream classification. Other embodiments are disclosed and claimed.

Abstract: An embodiment of a cache apparatus may include a first cache memory, a second cache memory, and a cache controller communicatively coupled to the first cache memory and the second cache memory to allocate cache storage for clean data from one of either the first cache memory or the second cache memory, and allocate cache storage for dirty data from both the first cache memory and the second cache memory. Other embodiments are disclosed and claimed.

Abstract: Provided are an apparatus, computer program product, and method to perform cache operations in a solid state drive. A cache memory determines whether data for a requested storage address in a primary storage namespace received from a host system is stored at an address in the cache memory namespace to which the requested storage address maps according to a cache mapping scheme. Multiple of the storage addresses in the primary storage map to one address in the cache memory namespace. The cache memory returns to the host system the data at the requested address stored in the cache memory namespace in response to determining that the data for the requested storage address is stored in the cache memory namespace.

Abstract: An embodiment of a storage apparatus may include persistent storage media, a namespace having backend storage, and a virtual function controller communicatively coupled to the persistent storage media and the namespace to assign the namespace to a virtual storage function and to control access to the namespace by the virtual storage function. The virtual function controller may be further configured to cache access to the namespace on the persistent storage media. Other embodiments are disclosed and claimed.

Abstract: An embodiment of a cache apparatus may include a first cache memory, a second cache memory, and a cache controller communicatively coupled to the first cache memory and the second cache memory to allocate cache storage for clean data from one of either the first cache memory or the second cache memory, and allocate cache storage for dirty data from both the first cache memory and the second cache memory. Other embodiments are disclosed and claimed.

Abstract: An electronic processing system may include a device driver to provide redundant array of independent disks (RAID) functionality. The device driver may include a detector to detect whether operation as a RAID controller device is established. The device driver may also include a controller to establish operation of a device as the RAID controller device when no device has established operation as the RAID controller device. The device driver may further include a publisher to publish a block device before exposure as usable storage, wherein publication of the block device is to be understood only by the RAID controller device.

Abstract: An apparatus is described. The apparatus includes a memory controller comprising logic circuitry to implement a mass storage cache in a non volatile region of a system memory. The non volatile region of the system memory is to support execution of program code directly out of the non volatile region system memory.

Abstract: An apparatus includes a plurality of drives configured as a redundant array of independent disks (RAID) and drive array controller logic to: calculate a first partial parity log (PPL) value for a first write operation that targets a first active stripe of the plurality of drives; store the first PPL value in a first pre-allocated portion of the plurality of drives that depends on a first number associated with the first active stripe; calculate a second PPL value for a second write operation that targets a second active stripe of the plurality of drives; and store the second PPL value in a second pre-allocated portion of the plurality of drives that depends on a second number associated with the second active stripe.

Abstract: Technology for an apparatus is described. The apparatus can include a memory controller with circuitry configured to define a caching and processing priority policy for one or more input/output (I/O) request class types. The memory controller can monitor one or more I/O contexts of one or more I/O requests. The memory controller can associate the one or more I/O contexts with one or more I/O class types using an I/O context association table. The memory controller can execute the one or more I/O requests according to the caching and processing priority policy of the one or more I/O class types. The apparatus can include an interface to the memory controller.

Abstract: An apparatus includes a plurality of drives configured as a redundant array of independent disks (RAID) and drive array controller logic to: calculate a first partial parity log (PPL) value for a first write operation that targets a first active stripe of the plurality of drives; store the first PPL value in a first pre-allocated portion of the plurality of drives that depends on a first number associated with the first active stripe; calculate a second PPL value for a second write operation that targets a second active stripe of the plurality of drives; and store the second PPL value in a second pre-allocated portion of the plurality of drives that depends on a second number associated with the second active stripe.

Abstract: Technologies for establishing and managing a high-performance memory region of a solid state drive include reserving a region of a volatile memory of the solid state drive for storage of host data. Memory accesses received from a host may be directed toward the reserved region of the volatile memory or toward a non-volatile memory of the solid state drive. Due to the structure of the volatile memory, memory accesses to the reserved region may exhibit lower access timing relative to memory accesses to the non-volatile memory. As such, the reserved region may be utilized as storage space for journaling and logging of data and/or other applications. Upon shutdown or a power failure event, data stored in the reserved region of the volatile memory is copied to the non-volatile memory and subsequently reinstated to the volatile memory upon the next initialization event.