Patents by Inventor Pirooz Parvarandeh

Pirooz Parvarandeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20120280107
    Abstract: A gesture sensing device includes a single light source and a multiple segmented single photo sensor, or an array of photo sensors, collectively referred to herein as segmented photo sensors. A light modifying structure relays reflected light from the light source onto different segments of the segmented photo sensors. The light modifying structure can be an optical lens structure or a mechanical structure. The different segments of the photo sensor sense reflected light and output corresponding sensed voltage signals. A control circuit receives and processes the sensed voltage signals to determine target motion relative to the segmented photo sensor.
    Type: Application
    Filed: November 25, 2011
    Publication date: November 8, 2012
    Applicant: MAXIM INTEGRATED PRODUCTS, INC.
    Inventors: David Skurnik, Nevzat Akin Kestelli, Ilya K. Veygman, Anand Chamakura, Christopher Francis Edwards, Nicole Kerness, Pirooz Parvarandeh, Sunny Kweisun Hsu
  • Publication number: 20110300668
    Abstract: An assembly process properly positions and align a plurality of first die within a carrier substrate. The first die are positioned within cavities formed in the carrier substrate. The carrier substrate is then aligned with a second substrate having a plurality of second die fabricated therein. The first die and the second die are fabricated using different technologies. Aligning the carrier substrate and the second substrate aligns the first die with the second die. One or more first die can be aligned with each second die. Once aligned, a wafer bonding process is performed to bond the first die to the second die. In some cases, the carrier substrate is removed, leaving behind the first die bonded to the second die of the second substrate. In other cases, the carrier substrate is left in place as a cap. The second substrate is then cut to form die stacks.
    Type: Application
    Filed: June 2, 2010
    Publication date: December 8, 2011
    Applicant: MAXIM INTEGRATED PRODUCTS, INC.
    Inventor: Pirooz Parvarandeh
  • Publication number: 20110248398
    Abstract: Wafer-level chip-scale package semiconductor devices are described that have bump assemblies configured to mitigate solder bump failures due to stresses, particularly stresses caused by CTE mismatch during thermal cycling tests, dynamic deformation during drop tests or cyclic bending tests, and so on. In an implementation, the wafer-level chip-scale package devices include an integrated circuit chip having two or more arrays of bump assemblies for mounting the device to a printed circuit board. At least one of the arrays includes bump assemblies that are configured to withstand higher levels of stress than the bump assemblies of the remaining arrays.
    Type: Application
    Filed: April 7, 2010
    Publication date: October 13, 2011
    Applicant: Maxim Integrated Products, Inc.
    Inventors: PIROOZ PARVARANDEH, Reynante Alvarado, Chiung C. Lo, Arkadii V. Samoilov
  • Publication number: 20100057530
    Abstract: A system and method for electronic transactions involves a website that displays an advertisement of a merchant. The website includes a feature that allows a visitor to the website to commit to making a purchase from the merchant within a certain period of time. The website visitor is encouraged to make the purchase by a commitment made by the merchant to donate or giveback a portion of the purchase value. When the website visitor actually makes a purchase from the merchant at a later time, the system and method allows for identification of the visitor as somebody who earlier made a purchase commitment, thereby allowing the merchant to determine whether to make a donation and to determine the effectiveness of the advertisement.
    Type: Application
    Filed: September 3, 2008
    Publication date: March 4, 2010
    Inventors: James Parivash, Pirooz Parvarandeh
  • Patent number: 5988819
    Abstract: An interface output stage includes a pull-up circuit and a pull-down circuit connected to a positive power supply signal line having a first voltage, an output signal line having an output voltage and a negative power supply signal line having a second voltage. The pull-up circuit includes a single output transistor and a body snatcher circuit, both interconnected between the positive power supply signal line and the output signal line. The body snatcher circuit ties the bodies of the output transistor and the transistors forming the body snatcher circuit to either the first voltage or the output voltage. The pull-down circuit is designed generally similar to the pull-up circuit to tie bodies of its transistors to either the output voltage or the second voltage.
    Type: Grant
    Filed: February 17, 1998
    Date of Patent: November 23, 1999
    Assignee: Maxim Integrated Products, Inc.
    Inventors: Sui Ping Shieh, Pirooz Parvarandeh, David Bingham
  • Patent number: 5666082
    Abstract: Fault protection using parallel output CMOS devices for integrated circuit analog switches prevents damage to circuits incorporating the same by not coupling analog input voltages beyond the power supply voltages to the analog output, and by preventing the forward biasing of any P/N junction to provide a low impedance path between such fault analog input voltage and either power supply terminal. Circuitry is provided for having the analog output electrically floating whenever the switch is commanded off, regardless of whether the analog input is within the power supply voltage range or not, to provide the analog input as the analog output whenever the switch is commanded on and the analog input is within the power supply voltage range, and to clamp the analog output at the closest power supply voltage whenever the switch is commanded on and the analog input is beyond the power supply voltage range. Alternate embodiments are disclosed.
    Type: Grant
    Filed: December 29, 1995
    Date of Patent: September 9, 1997
    Assignee: Maxin Integrated Products, Inc.
    Inventors: Richard Wilenken, Pirooz Parvarandeh, Terry Martin