Patents by Inventor Po-Chun Yeh
Po-Chun Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20210089741Abstract: Systems and methods for through-display imaging. An optical imaging sensor is positioned at least partially behind a display and is configured to emit visible wavelength light at least partially through the display to illuminate an object, such as a fingerprint or a retina, in contact with or proximate to an outer surface of the display. Surface reflections from the object traverse the display stack and are received and an image of the object can be assembled.Type: ApplicationFiled: August 26, 2020Publication date: March 25, 2021Inventors: Po-Chun Yeh, Yujia Zhai, Yuan Chen, Mohammad Yeke Yazdandoost, Giovanni Gozzini, Chia Hsuan Tai, Jiun-Jye Chang, Ching-San Chuang
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Publication number: 20210066505Abstract: Display panels with hydrogen trap layers are described. The hydrogen trap layers may be incorporated into a variety of locations to getter or block hydrogen diffusion into the semiconductor oxide layer of an oxide transistor.Type: ApplicationFiled: January 17, 2020Publication date: March 4, 2021Inventors: Jehun Lee, Ching-Sang Chuang, Hirokazu Yamagata, Jiun-Jye Chang, Kenny Kim, Po-Chun Yeh, Shih Chang Chang, Ting-Kuo Chang
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Publication number: 20210050385Abstract: An electronic device includes a stack, and the stack includes a substrate, and a multi-layer structure deposited on the substrate and including a set of TFTs. The electronic device further includes a photodetector attached to the multi-layer structure and including an organic photosensitive material. The organic photosensitive material is electrically connected to a TFT in the set of TFTs. Another electronic device includes a stack, and the stack includes a substrate, and a multi-layer structure deposited on the substrate. The multi-layer structure includes a first set of layers including a set of TFTs, and a second set of layers including a PIN diode. The PIN diode is configured to operate as a photodetector and receive at least one wavelength of electromagnetic radiation, and is electrically connected to a TFT in the set of TFTs.Type: ApplicationFiled: July 31, 2020Publication date: February 18, 2021Inventors: Ching-Sang Chuang, Jiun-Jye Chang, Po-Chun Yeh, Shih Chang Chang, Ting-Kuo Chang, Yun Wang
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Publication number: 20200393292Abstract: An ultrasonic sensing device includes a housing, a piezoelectric assembly, a board and a plurality of fixing members. The housing includes a connecting board being a metal board and a supporting shell being a plastic member. The supporting shell includes a bottom wall opposite to a disposing opening of the connecting board and a surrounding side wall integrally surrounding and connecting to the bottom wall. The surrounding side wall encloses a portion of the connecting board. The piezoelectric assembly includes an encapsulating body and a piezoelectric sheet enclosed by the encapsulating body. The encapsulating body is disposed on the bottom wall and surrounded by the surrounding side wall. The piezoelectric sheet has a sensing surface exposed to the encapsulating body and facing the bottom wall. The fixing members fix the board on the connecting board, thereby pressing the sensing surface of the piezoelectric sheet to the bottom wall.Type: ApplicationFiled: April 14, 2020Publication date: December 17, 2020Inventors: Yu-Yen Fu, Po-Chun Yeh, Dong-Fu Chen
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Publication number: 20200395529Abstract: An ultrasonic sensing device includes a housing, a piezoelectric assembly, a board and a plurality of fixing members. The housing includes a bottom wall, a top wall and a surrounding side wall connected between the top wall and the bottom wall. The piezoelectric assembly includes an encapsulating body and a piezoelectric sheet, wherein at least a portion of the piezoelectric sheet is enclosed by the encapsulating body and has a sensing surface exposed to the encapsulating body and facing the bottom wall. The board is disposed on the top wall of the housing and has a pressing surface facing the encapsulating body and the top wall. The plurality of fixing members is configured to fix the board to the top wall of the housing to press the board to the encapsulating body of the piezoelectric assembly, thereby pressing the sensing surface of the piezoelectric sheet to the bottom wall.Type: ApplicationFiled: February 20, 2020Publication date: December 17, 2020Inventors: Chi-Shen Lee, Yu-Yen Fu, Po-Chun Yeh, Dong-Fu Chen, Chih-Wen Cheng, Chi-Lin Huang, Yu-Ping Yen
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Publication number: 20200393413Abstract: An ultrasonic sensing apparatus includes an accommodating shell and at least one detection device. The accommodating shell includes a base and a convex portion connected to the base. A side of the base has a first detection opening toward a first direction, and a side of the convex portion has a second detection opening toward a second direction. Each of the at least one detection device is disposed in the base or the convex portion of the accommodating shell and includes a board, a piezoelectric assembly, a housing and a plurality of fixing members. The plurality of fixing members are configured to fix the board on the top wall of the housing to press the board to the encapsulating body of the piezoelectric assembly, thereby pressing the piezoelectric sheet to the bottom wall.Type: ApplicationFiled: April 14, 2020Publication date: December 17, 2020Inventors: Yu-Yen Fu, Po-Chun Yeh, Dong-Fu Chen
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Patent number: 10833091Abstract: A ferroelectric memory is provided. The ferroelectric memory includes a first electrode, a second electrode opposite to the first electrode, at least one ferroelectric layer disposed between the first electrode and the second electrode, and at least one antiferroelectric layer disposed between the first electrode and the second electrode, wherein the antiferroelectric layer is in contact with the ferroelectric layer.Type: GrantFiled: February 8, 2019Date of Patent: November 10, 2020Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Yu-De Lin, Heng-Yuan Lee, Po-Chun Yeh, Chih-Yao Wang, Hsin-Yun Yang
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Patent number: 10720521Abstract: An enhancement mode GaN transistor is provided, which includes a GaN layer, a quantum well structure, a gate, a source a drain and a first barrier layer. The quantum well structure is disposed on the upper surface of the GaN layer. The gate is disposed on the quantum well structure. The source is disposed on one end of the upper surface of the GaN layer. The drain is disposed on the other end of the upper surface of the GaN layer. The first barrier layer is disposed on the upper surface of the GaN layer and extends to the lateral surfaces of the quantum well structure.Type: GrantFiled: March 20, 2019Date of Patent: July 21, 2020Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Jung-Tse Tsai, Po-Chun Yeh, Chien-Hua Hsu, Po-Tsung Tu
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Publication number: 20200194443Abstract: A ferroelectric memory is provided. The ferroelectric memory includes a first electrode, a second electrode opposite to the first electrode, at least one ferroelectric layer disposed between the first electrode and the second electrode, and at least one antiferroelectric layer disposed between the first electrode and the second electrode, wherein the antiferroelectric layer is in contact with the ferroelectric layer.Type: ApplicationFiled: February 8, 2019Publication date: June 18, 2020Applicant: Industrial Technology Research InstituteInventors: Yu-De LIN, Heng-Yuan LEE, Po-Chun YEH, Chih-Yao WANG, Hsin-Yun YANG
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Publication number: 20200168728Abstract: An enhancement mode GaN transistor is provided, which includes a GaN layer, a quantum well structure, a gate, a source a drain and a first barrier layer. The quantum well structure is disposed on the upper surface of the GaN layer. The gate is disposed on the quantum well structure. The source is disposed on one end of the upper surface of the GaN layer. The drain is disposed on the other end of the upper surface of the GaN layer. The first barrier layer is disposed on the upper surface of the GaN layer and extends to the lateral surfaces of the quantum well structure.Type: ApplicationFiled: March 20, 2019Publication date: May 28, 2020Inventors: JUNG-TSE TSAI, PO-CHUN YEH, CHIEN-HUA HSU, PO-TSUNG TU
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Patent number: 10250865Abstract: A dual image capture assembly for acquiring and transmitting images from a binocular scope for three-dimensional (3D) viewing on a user computing device. The dual image capture assembly includes a pair of eyepiece adaptors each configured to attach on the pair of eyepieces of a binocular scope, and a dual-camera apparatus including a pair of image capture devices respectively coupled with the pair of eyepiece adaptors. The dual-camera apparatus also includes a linker connecting the first and second camera components.Type: GrantFiled: October 27, 2016Date of Patent: April 2, 2019Assignee: VISIONY CORPORATIONInventors: Yu-Cheng Lin, Dawei Liu, Yinsheng Guo, Po-Chun Yeh
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Publication number: 20190089759Abstract: The present disclosure provides a video encoding circuit and a wireless video transmission apparatus and method. The wireless video transmission apparatus includes a wireless transmitter circuit and a video encoding circuit. The wireless transmitter circuit is configured to transmit a video stream with a bit rate to a wireless transmission channel and provide a transmission state message according to a transmission state of the wireless transmission channel. The video encoding circuit is coupled to the wireless transmitter circuit to receive the transmission state message. The video encoding circuit is configured to perform an encoding operation on video data to generate the video stream to the wireless transmitter circuit and dynamically adjust the bit rate of the video stream delivered to the wireless transmitter circuit according to the transmission state message.Type: ApplicationFiled: June 15, 2018Publication date: March 21, 2019Applicant: Novatek Microelectronics Corp.Inventors: Po-Chun Yeh, Chia-Chuan Cho, He-Shuen Kang, Jen-Wei Liang
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Patent number: 10074533Abstract: This disclosure provides an epitaxial wafer, which includes: a silicon wafer having a central area and an extremity area enclosing the central area, the extremity area having a stepped profile; and an nitride epitaxial layer formed on the silicon wafer; wherein, the stepped profile has a width between 10 and 1500 ?m and a height between 1 and 500 ?m.Type: GrantFiled: October 3, 2017Date of Patent: September 11, 2018Assignee: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTEInventors: Po-Chun Yeh, Kan-Hsueh Tsai, Chuan-Wei Tsou, Heng-Yuan Lee, Hsueh-Hsing Liu, Han-Chieh Ho, Yi-Keng Fu
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Publication number: 20180227565Abstract: A dual image capture assembly for acquiring and transmitting images from a binocular scope for three-dimensional (3D) viewing on a user computing device. The dual image capture assembly includes a pair of eyepiece adaptors each configured to attach on the pair of eyepieces of a binocular scope, and a dual-camera apparatus including a pair of image capture devices respectively coupled with the pair of eyepiece adaptors. The dual-camera apparatus also includes a linker connecting the first and second camera components.Type: ApplicationFiled: October 27, 2016Publication date: August 9, 2018Inventors: Yu-Cheng LIN, Dawei LIU, Yinsheng GUO, Po-Chun YEH
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Patent number: 10014375Abstract: A III-nitride based semiconductor structure includes a substrate; a buffer layer disposed above the substrate; a first gallium nitrite (GaN) layer disposed above the buffer layer and including p-type GaN; a second GaN layer disposed on the first GaN layer and including at least a first region and a second region; a channel layer disposed above the second GaN layer; a barrier layer disposed above the channel layer; and a gate electrode disposed above the barrier layer. The first region of the second GaN layer is positioned correspondingly to the gate electrode and includes n-type GaN having a first doping concentration. The second region of the second GaN layer (such as the lateral portion of the second GaN layer) is positioned correspondingly to the areas outsides the gate electrode and includes n-type GaN having a second doping concentration larger than the first doping concentration.Type: GrantFiled: October 2, 2017Date of Patent: July 3, 2018Assignee: Industrial Technology Research InstituteInventors: Chuan-Wei Tsou, Po-Chun Yeh, Heng-Yuan Lee
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Publication number: 20180124379Abstract: A dual image capture assembly for acquiring and transmitting images from a binocular scope for three-dimensional (3D) viewing on a user computing device. The dual image capture assembly includes a pair of eyepiece adaptors each configured to attach on the pair of eyepieces of a binocular scope, and a dual-camera apparatus including a pair of image capture devices respectively coupled with the pair of eyepiece adaptors. The dual-camera apparatus also includes a linker connecting the first and second camera components.Type: ApplicationFiled: October 27, 2016Publication date: May 3, 2018Inventors: Yu-Cheng LIN, Dawei LIU, Yinsheng GUO, Po-Chun YEH
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Patent number: 9923119Abstract: A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer.Type: GrantFiled: September 18, 2014Date of Patent: March 20, 2018Assignee: OPTO TECH CORPORATIONInventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
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Patent number: 9123279Abstract: A flexible display and a controlling method thereof are provided. The flexible display includes a plurality of pressure sensors, a display unit and a processing unit, wherein the processing unit is connected to the pressure sensors and the display unit. The processing unit obtains pressure values from each of the pressure sensors within a time unit and generates a pressure area and a pressure variance according to the pressure values from each of the pressure sensors. The processing unit further determines a display mode of the display unit according to the pressure area and the pressure variance. Therefore, the flexible display is capable of providing several kinds of display mode only based on the equipped pressure sensors.Type: GrantFiled: March 30, 2012Date of Patent: September 1, 2015Assignee: Industrial Technology Research InstituteInventors: Po-Chun Yeh, Heng-Yin Chen, Yung-Hsiang Chiu, Wei-Yen Lee
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Publication number: 20150090999Abstract: A white LED is provided. The white LED includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first metal oxide layer. The active layer includes a second metal oxide layer. The second barrier layer includes a third metal oxide layer. The N-type layer is disposed over the tunneling structure. The N-type electrode and the P-type electrode are respectively contacted with the N-type layer and the P-type layer. An energy gap of the second metal oxide layer is lower than an energy gap of the first metal oxide layer and is lower than an energy gap of the third metal oxide layer.Type: ApplicationFiled: January 2, 2014Publication date: April 2, 2015Applicant: OPTO TECH CORPORATIONInventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee
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Publication number: 20150091019Abstract: A white LED chip includes a P-type layer, a tunneling structure, an N-type layer, an N-type electrode, and a P-type electrode. The tunneling structure is disposed over the P-type layer. The tunneling structure includes a first barrier layer, an active layer and a second barrier layer. The first barrier layer includes a first material layer, the active layer includes a second material layer, and the second barrier layer includes a third material layer. The N-type layer is disposed over the tunneling structure. An energy gap of the second material layer is lower than an energy gap of the first material layer and an energy gap of the third material layer. Each of the first material layer, the second material layer and the third material layer is a metal oxide layer, a metal nitride layer or a metal oxynitride layer.Type: ApplicationFiled: September 18, 2014Publication date: April 2, 2015Inventors: Lung-Han Peng, Yao-Te Wang, Po-Chun Yeh, Po-Ting Lee