Patents by Inventor Po-Lin Chen

Po-Lin Chen has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190391679
    Abstract: A metal mesh touch electrode for a touch panel comprises a plurality of breakpoint regions, a plurality of first metal mesh electrodes and a plurality of second metal mesh electrodes. The breakpoint regions are disposed between the first and second metal mesh electrodes. The first metal mesh electrodes comprises a first metal mesh layout formed by a plurality of first metal lines and a plurality of second metal lines that mutually intersect. The second metal mesh electrodes include a second metal mesh layout formed by the plurality of first metal lines and the plurality of second metal lines that mutually intersect. The plurality of first metal lines and the plurality of second metal lines intersect to form a plurality of intersections creating a mesh spacing. Widths of the first and second metal mesh electrodes and the breakpoint region comprise a sensing spacing.
    Type: Application
    Filed: July 19, 2018
    Publication date: December 26, 2019
    Inventors: Hsuan-Man CHANG, Po-Lin CHEN, Ya-Yin CHENG, Chia-Chi YEH
  • Publication number: 20190377444
    Abstract: A metal mesh touch module that alters the position of at least one auxiliary line disposed at the periphery of mesh units and conceals the auxiliary line by an ink layer that hides the auxiliary line. The display module is partitioned by a first partition line into a function zone and a border zone, the border zone having an ink layer. A touch electrode is disposed on the display module and comprises a plurality of mesh units. A protective covering is disposed on the touch electrode and partitioned by a second partition line into a visible zone and a bezel ink zone, the bezel ink zone comprising a light-blocking material. At least one auxiliary line is disposed on the periphery of the mesh units, electrically connected to the mesh units, and disposed on the touch electrode between the first partition line and the second partition line.
    Type: Application
    Filed: July 18, 2018
    Publication date: December 12, 2019
    Inventors: Chia-Chi YEH, Yue-Feng Yang, Po-Lin Chen, Ya-Yin Cheng, Yen-Heng Huang
  • Publication number: 20190377434
    Abstract: A touch panel includes a light-transmissive cover, a display module, and a touch sensing layer. The display module is disposed on the light-transmissive cover. The touch sensing layer is disposed between the light-transmissive cover and the display module, and has a first side and a second side opposite to the first side. The first side has a first folding region, and the second side has a second folding region. When the first side and the second side of the touch sensing layer are unfolded, the first folding region and the second folding region extend outward from two opposite edges of the light-transmissive cover. When the first side and the second side of the touch sensing layer are folded, the first folding region and the second folding region are located on the display module.
    Type: Application
    Filed: July 4, 2018
    Publication date: December 12, 2019
    Inventors: Yue-Feng YANG, Po-Lin CHEN, Yen-Heng HUANG
  • Publication number: 20190369760
    Abstract: A touch sensor includes a touch sensing layer, a bonding pad and at least one conductive trace. The touch sensing layer has an active region and a periphery region surrounding the active region. The periphery region includes a first folding region at a first side of the periphery region. When the first folding region is folded, the first folding region is overlapped with a first portion of the active region. The bonding pad is disposed at the first folding region of the periphery region of the touch sensing layer. Two ends of the conductive trace are respectively connected to the touch sensing layer and the bonding pad. The conductive trace is sequentially disposed along the first side, a second side, and a third side of the periphery region, and the second side is adjacent to the first side and the third side.
    Type: Application
    Filed: June 10, 2018
    Publication date: December 5, 2019
    Inventors: Yue-Feng YANG, Po-Lin CHEN, Yen-Heng HUANG
  • Publication number: 20190346508
    Abstract: An electronic device test database generating method, comprising: (a) acquiring cell layout information of a target electronic device; (b) generating possible defect location information of the target electronic device according to the cell layout information, wherein the possible defect location information comprises at least one possible defect location of the target electronic device; (c) testing the target electronic device according to the possible defect location information to generate a testing result; and (d) generating an electronic device test database according to the testing result.
    Type: Application
    Filed: November 28, 2018
    Publication date: November 14, 2019
    Inventors: Po-Lin Chen, Ying-Yen Chen, Chia-Tso Chao, Tse-Wei Wu
  • Patent number: 10429978
    Abstract: The present disclosure provides a touch panel structure, which includes a conductive channel region and a second dummy metal pattern. The conductive channel region includes a metal mesh and a first dummy metal pattern. The metal mesh is a conductive channel. The first dummy metal pattern is intersecting the metal mesh and has at least one breakpoint at every point of intersection with the metal mesh. The metal mesh is separated from the first dummy metal pattern to be insulated from the first dummy metal pattern at the at least one breakpoint. The second dummy metal pattern is disposed on the both sides of the conductive channel region.
    Type: Grant
    Filed: January 17, 2018
    Date of Patent: October 1, 2019
    Assignees: Interface Technology (Chengdu) Co., Ltd., Interface Optoelectronics (ShenZhen) Co., Ltd., General Interface Solution Limited
    Inventors: Jhe-Wei Zeng, Yue-Feng Yang, Po-Lin Chen, Ju-Xiang Liu, Yen-Heng Huang
  • Publication number: 20190278406
    Abstract: A touch panel, comprising: a substrate; a plurality of sensing electrodes on the substrate, each of the plurality of sensing electrodes being formed by a plurality of metal meshes; and a plurality of traces on the substrate, the plurality of traces electrically coupled to the plurality of sensing electrodes, and each of the plurality of traces are a metal wire; wherein a blackening layer is formed on each of the plurality of sensing electrodes, and no blackening layer is formed on the plurality of traces. The blackening layers of the touch panel of the present invention only cover the sensing electrodes and do not cover the traces, which can avoid chemical substances remaining on the traces and traces being corroded and disconnection when the black layers are manufactured.
    Type: Application
    Filed: June 26, 2018
    Publication date: September 12, 2019
    Inventors: YUE-FENG YANG, YEN-HENG HUANG, PO-LIN CHEN, HUNG-CHIEH CHIN, JHE-WEI ZENG, JU-XIANG LIU
  • Patent number: 10379644
    Abstract: A touch sensing module includes a substrate, sensing electrodes, and a covering layer. The sensing electrodes are disposed on a surface of the substrate. Each of the sensing electrodes has a first end and a second end opposite to the first end. The second end is adopted to be electrically connected with an external circuit. The covering layer is disposed on a side of the sensing electrodes distal from the substrate, and covers the sensing electrodes. The covering layer has openings. The first ends of the sensing electrodes are exposed within the openings respectively.
    Type: Grant
    Filed: April 10, 2017
    Date of Patent: August 13, 2019
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Yen-Heng Huang, Po-Lin Chen, Yue-Feng Yang
  • Patent number: 10296122
    Abstract: A touch display panel is provided. The touch display panel includes a cover and a touch sensing layer. The cover has a touch-sensing section, a first bending section, and a first side section. The first side section and the touch-sensing section are not coplanar and the first bending section is located between the touch-sensing section and the first side section. The touch sensing layer is located under the cover and includes a first metal mesh layer and a second metal mesh layer. Only one of the first metal mesh layer and the second metal mesh layer is located under the first bending section.
    Type: Grant
    Filed: December 7, 2017
    Date of Patent: May 21, 2019
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Jhe-Wei Zeng, Fa-Lin Liu, Po-Lin Chen
  • Publication number: 20190138139
    Abstract: A touch display panel is provided. The touch display panel includes a cover and a touch sensing layer. The cover has a touch-sensing section, a first bending section, and a first side section. The first side section and the touch-sensing section are not coplanar and the first bending section is located between the touch-sensing section and the first side section. The touch sensing layer is located under the cover and includes a first metal mesh layer and a second metal mesh layer. Only one of the first metal mesh layer and the second metal mesh layer is located under the first bending section.
    Type: Application
    Filed: December 7, 2017
    Publication date: May 9, 2019
    Inventors: Jhe-Wei ZENG, Fa-Lin LIU, Po-Lin CHEN
  • Publication number: 20190120901
    Abstract: The present invention discloses a test device for testing an integrated circuit. An embodiment of the test device includes an on-chip-clock controller (OCC), a pulse debugging circuit and a register circuit. The OCC is configured to generate an output clock according to an input clock, in which the output clock is for testing a circuitry under test (CUT) that is included in the test device. The pulse debugging circuit is configured to generate a pulse record according to a pulse number of the output clock, in which the pulse record is used to find out whether a test status dependent upon the output clock is abnormal. The register circuit is configured to store and output the pulse record according to a reliable clock.
    Type: Application
    Filed: September 26, 2018
    Publication date: April 25, 2019
    Inventors: PO-LIN CHEN, CHUN-YI KUO, YING-YEN CHEN
  • Publication number: 20190107908
    Abstract: The present disclosure provides a touch panel structure, which includes a conductive channel region and a second dummy metal pattern. The conductive channel region includes a metal mesh and a first dummy metal pattern. The metal mesh is a conductive channel. The first dummy metal pattern is intersecting the metal mesh and has at least one breakpoint at every point of intersection with the metal mesh. The metal mesh is separated from the first dummy metal pattern to be insulated from the first dummy metal pattern at the at least one breakpoint. The second dummy metal pattern is disposed on the both sides of the conductive channel region.
    Type: Application
    Filed: January 17, 2018
    Publication date: April 11, 2019
    Inventors: Jhe-Wei ZENG, Yue-Feng YANG, Po-Lin CHEN, Ju-Xiang LIU, Yen-Heng HUANG
  • Patent number: 10042448
    Abstract: A touch module for preventing separation of silver paste between laser etching traces, comprises a substrate, a plurality of touch electrodes, and a silver paste. A side of the touch electrode has a pin area. The pin area contains a plurality of perforations. The silver paste is coated on the substrate and the pin area for connecting electrical circuitry between the pin area and the connection line area. Wherein the silver paste on the pin area flows into the perforations and connects to the substrate. Therefore separation of the silver paste on the pin area and touch electrodes will less likely occur due to minor coating errors. The present invention also provides a manufacturing method of a touch module that prevents separation of the silver paste between laser etching traces.
    Type: Grant
    Filed: August 14, 2017
    Date of Patent: August 7, 2018
    Assignees: INTERFACE TECHNOLOGY (CHENGDU) CO., LTD., INTERFACE OPTOELECTRONICS (SHENZHEN) CO., LTD., GENERAL INTERFACE SOLUTION LIMITED
    Inventors: Hsuan-Man Chang, Po-Lin Chen, Ya-Yin Cheng, Chia-Chi Yeh
  • Publication number: 20180143705
    Abstract: A touch sensing module includes a substrate, sensing electrodes, and a covering layer. The sensing electrodes are disposed on a surface of the substrate. Each of the sensing electrodes has a first end and a second end opposite to the first end. The second end is adopted to be electrically connected with an external circuit. The covering layer is disposed on a side of the sensing electrodes distal from the substrate, and covers the sensing electrodes. The covering layer has openings. The first ends of the sensing electrodes are exposed within the openings respectively.
    Type: Application
    Filed: April 10, 2017
    Publication date: May 24, 2018
    Inventors: Yen-Heng HUANG, Po-Lin CHEN, Yue-Feng YANG
  • Publication number: 20170329455
    Abstract: A touch panel includes a substrate, a first electrode layer on a first surface of the substrate, and a second electrode layer on a second surface of the substrate. The first electrode layer has a plurality of first sensing lines configured to send touch signals and a plurality of first dummy lines coupled to the plurality of first sensing lines. The second electrode layer has a plurality of second sensing lines configured to receive the touch signals and a plurality of second dummy lines coupled to the plurality of second sensing lines. Each second dummy line defines at least one breaking point. Each first sense line has a projection at the second electrode layer which overlaps with one breaking point.
    Type: Application
    Filed: June 27, 2016
    Publication date: November 16, 2017
    Inventors: JHE-WEI ZENG, WAN-CHUN WANG, YUE-FENG YANG, PO-LIN CHEN, YEN-HENG HUANG
  • Publication number: 20170322670
    Abstract: A metal mesh structure capable of reducing breakpoint short circuits, including a plurality of first main channel wires, a plurality of second main channel wires, a plurality of first virtual wires and a plurality of second virtual wires. The first main channel wires are spaced apart and aligned in a first direction. The second main channel wires are spaced apart and aligned in a second direction. The second main channel wires cross the first main channel wires to form a plurality of main channel meshes. A method of manufacturing a metal mesh structure capable of reducing breakpoint short circuits is further provided. Given the aforesaid structure and method, the metal mesh is effective in reducing breakpoint short circuits.
    Type: Application
    Filed: July 5, 2016
    Publication date: November 9, 2017
    Inventors: Wan-Chun Wang, Jhe-Wei Zeng, Yue-Feng Yang, Po-Lin Chen, Yen-Heng Huang
  • Patent number: 9184187
    Abstract: A TFT array manufacturing method is disclosed herein and includes steps: forming a first metal layer on a substrate; depositing a first insulating layer to cover the first metal layer; forming an oxide semiconductor layer on the first insulating layer in a TFT area; forming a second insulating layer on the first insulating layer and the oxide semiconductor layer; etching the second insulating layer in the TFT area to expose the oxide semiconductor layer and etching the second insulating layer and the first insulating layer in a signal wire area simultaneously to expose the first metal layer; and forming a second metal layer on the second insulating layer of the TFT area, and the second metal layer being connected the oxide semiconductor layer, and forming the second metal layer on the first metal layer of the signal wire area to contact the first metal, layer.
    Type: Grant
    Filed: November 9, 2012
    Date of Patent: November 10, 2015
    Assignee: SHENZHEN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD.
    Inventors: Cheng-Lung Chiang, Po-Lin Chen
  • Publication number: 20150214257
    Abstract: A TFT array manufacturing method is disclosed herein and includes steps: forming a first metal layer on a substrate; depositing a first insulating layer to cover the first metal layer; forming an oxide semiconductor layer on the first insulating layer in a TFT area; forming a second insulating layer on the first insulating layer and the oxide semiconductor layer; etching the second insulating layer in the TFT area to expose the oxide semiconductor layer and etching the second insulating layer and the first insulating layer in a signal wire area simultaneously to expose the first metal layer; and forming a second metal layer on the second insulating layer of the TFT area, and the second metal layer being connected the oxide semiconductor layer, and forming the second metal layer on the first metal layer of the signal wire area to contact the first metal, layer.
    Type: Application
    Filed: November 9, 2012
    Publication date: July 30, 2015
    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Cheng-Lung Chiang, Po-Lin Chen
  • Patent number: 8962403
    Abstract: The present invention discloses a manufacturing method for a switch and an array substrate. The method comprises: firstly, forming sequentially a first metal layer, an insulating layer, a semiconductor layer, an ohmic contact layer, a second metal layer, a third metal layer and a photoresist layer on a base substrate; after patterning the photoresist layer, etching the third metal layer and the second metal layer to form the input electrode and the output electrode of the switch; using a stripper comprising at least 30% by weight of amine in order to remove the photoresist layer and the residual second metal layer; and finally, etching the ohmic contact layer. Through the above steps, the present invention can avoid the electrical abnormality of the switch and increase process yield of the array substrate.
    Type: Grant
    Filed: November 23, 2012
    Date of Patent: February 24, 2015
    Assignee: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Yu-Lien Chou, Po-Lin Chen
  • Publication number: 20140340604
    Abstract: The present invention provides a thin film transistor comprising at least a gate electrode formed on a substrate, and a gate insulating layer in contacting the gate electrode, and an oxide semiconductor layer deposited on the other side of the gate insulating layer. The concentration of hydrogen in the gate insulating layer has a gradient distribution, wherein the concentration of hydrogen adjacent the gate electrode is higher; and while the concentration of hydrogen adjacent the oxide semiconductor layer is lower. The present invention further provides a method for manufacturing a thin film transistor and an according thin-film-transistor liquid crystal display device.
    Type: Application
    Filed: June 24, 2013
    Publication date: November 20, 2014
    Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd.
    Inventors: Cheng-Lung Chiang, Po-Lin Chen