Patents by Inventor Po-Tsun Liu

Po-Tsun Liu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6521547
    Abstract: A method of repairing a low dielectric constant (low k) material layer starts with coating a photoresist layer on the low k material layer on a semiconductor wafer. After transferring a pattern of the photoresist layer to the low k material layer, an oxygen plasma ashing process is performed to remove the photoresist layer. Finally, by contacting the low k material layer with a solution of alkyl silane comprising an alkyl group and halo substituent, Si—OH bonds formed in the low k layer during the oxygen plasma ashing process are removed so as to repair damage to the low k material layer caused by the oxygen plasma ashing process, and to enhance a surface of the low k material layer to a hydrophobic surface to prevent moisture adhering to the surface of the low k material layer.
    Type: Grant
    Filed: September 7, 2001
    Date of Patent: February 18, 2003
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20030013311
    Abstract: A low k dielectric layer is formed on a surface of a substrate of a semiconductor wafer. Then, a surface treatment is performed to the low k dielectric layer to form a passivation layer on a surface of the low k dielectric layer. A patterned photoresist layer is formed over the surface of the semiconductor wafer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. Finally, a stripping process is performed to remove the patterned photoresist layer. The passivation layer is used to prevent deterioration of the dielectric characteristic of the low k dielectric layer during the stripping process.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 16, 2003
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20030008518
    Abstract: The present invention is a method to avoid deterioration of a dielectric characteristic of a dielectric layer having a low dielectric constant (low k) during a stripping process. The method involves first forming a low k dielectric layer on the surface of a substrate of a semiconductor wafer. Then, a patterned photoresist layer is formed over the surface of the low k dielectric layer. The patterned photoresist layer is then used as a hard mask to perform an etching process on the low k dielectric layer. A stripping process is then performed to remove the patterned photoresist layer. Finally, a surface treatment is utilized on the low k dielectric layer to remove Si—OH bonds in the low k dielectric layer so as to avoid moisture absorption of the low k dielectric layer that causes deterioration of the dielectric characteristic.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 9, 2003
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20030008516
    Abstract: A low dielectric constant (low k) material layer is positioned on a semiconductor wafer. A first hydrogen-containing plasma treatment is performed to reinforce a surface of the low k material layer against corrosion caused by a photoresist stripper. A photoresist layer, having an opening in the photoresist layer to expose portions of the low k material layer, is then coated on the low k material layer. By dry etching the low k material layer through the opening, a pattern in the photoresist layer is transferred to the low k material layer. An ashing process with an oxygen plasma supply is then performed to ash the photoresist layer. Finally, the semiconductor wafer is dipped in a wet stripper to completely remove the photoresist layer.
    Type: Application
    Filed: July 3, 2001
    Publication date: January 9, 2003
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Patent number: 6498070
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes forming a sacrificial polymer film over a substrate having metal lines thereon. A portion of the sacrificial polymer film is subsequently removed to form first spacers. A micro-porous structure layer is formed over the substrate and the metal lines and between the first spacers. A portion of the micro-porous structure layer is removed to form second spacers. The first spacers are removed by thermal dissociation to form air gaps. A dielectric layer is formed over the substrate and the metal lines and between the second spacers.
    Type: Grant
    Filed: March 18, 2002
    Date of Patent: December 24, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Publication number: 20020187583
    Abstract: A method for manufacturing a hydrogen gas sensor is provided. A silicon layer with a rugged surface is formed on a dielectric layer over a first conductive electrode on a semiconductor substrate. The whole semiconductor substrate is placed in an aqueous solution containing metal ions in order that the silicon atoms of the silicon layer are substituted for the metal ions in the aqueous solution by a non-electroplating reduction-oxidation reaction. The result is a deposit of a metal layer having a rugged surface formed on the dielectric layer to serve as a second conductive electrode.
    Type: Application
    Filed: June 6, 2001
    Publication date: December 12, 2002
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Publication number: 20020164868
    Abstract: A method for forming silicon dioxide-low k dielectric stack is provided. The present invention is characterized in that applying H2 plasma on a low k dielectric layer formed on a conductive interconnect layer to cover dangling bonds on the surface of the low k dielectric layer. Thereby, preventing the reaction between the low k dielectric layer and oxygen gas employed in a subsequent process for forming a cap layer of silicon dioxide occurring, and thus prohibiting oxygen gas damaging the low k dielectric layer.
    Type: Application
    Filed: May 2, 2001
    Publication date: November 7, 2002
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Patent number: 6435943
    Abstract: A method of chemical mechanical polishing organic silicon material with a low dielectric constant. An oxygen plasma treatment is performed on an organic silicon material with a low dielectric constant, so that the carbon contained in the organic silicon material is removed. A chemical mechanical polishing step is performed to planarize the organic silicon material after the oxygen plasma treatment. A ammonia plasma treatment is further performed to mend the damaged portion of the organic silicon material.
    Type: Grant
    Filed: November 1, 2000
    Date of Patent: August 20, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Patent number: 6423652
    Abstract: A post-processing treatment of a low dielectric constant material. In the post-processing treatment, a shallow implantation is conducted to form a shallow compact layer over a dielectric film. This shallow compact surface layer acts as a barrier that prevents the absorption of moisture by the dielectric film. The shallow implantation is carried out using boron ions at an energy level of between about 10 and 50 keV and a dosage of between about 1×1015 atm/cm2 and 1×1016 atm/cm2.
    Type: Grant
    Filed: October 19, 1999
    Date of Patent: July 23, 2002
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Yi-Shien Mor
  • Publication number: 20020090794
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes forming a sacrificial polymer film over a substrate having metal lines thereon. A portion of the sacrificial polymer film is subsequently removed to form first spacers. A micro-porous structure layer is formed over the substrate and the metal lines and between the first spacers. A portion of the micro-porous structure layer is removed to form second spacers. The first spacers are removed by thermal dissociation to form air gaps. A dielectric layer is formed over the substrate and the metal lines and between the second spacers.
    Type: Application
    Filed: March 18, 2002
    Publication date: July 11, 2002
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Publication number: 20020068437
    Abstract: A method of forming an unlanded via. A substrate having a conductive wire thereon is provided. An etching stop spacer is formed on each sidewall of the conductive wire. An inter-metal dielectric layer is formed over the substrate. The inter-metal dielectric layer is patterned to form a via opening that exposes the conductive wire and then a metal plug that occupies the entire via hole is formed.
    Type: Application
    Filed: December 5, 2000
    Publication date: June 6, 2002
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Patent number: 6316347
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes providing a substrate having metallic lines thereon. A high molecular weight sacrificial film is formed over the substrate. A portion of the high molecular weight sacrificial layer is removed to form spacers. A dielectric layer is formed over the substrate, the top surface of the metallic lines and the spacers. Finally, a thermal dissociation operation is conducted to remove the spacers, thereby forming an air pocket on each sidewall of the metallic lines.
    Type: Grant
    Filed: December 29, 2000
    Date of Patent: November 13, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Publication number: 20010007788
    Abstract: An air gap semiconductor structure and corresponding method of manufacture. The method includes forming a sacrificial polymer film over a substrate having metal lines thereon. A portion of the sacrificial polymer film is subsequently removed to form first spacers. A micro-porous structure layer is formed over the substrate and the metal lines and between the first spacers. A portion of the micro-porous structure layer is removed to form second spacers. The first spacers are removed by thermal dissociation to form air gaps. A dielectric layer is formed over the substrate and the metal lines and between the second spacers.
    Type: Application
    Filed: January 17, 2001
    Publication date: July 12, 2001
    Inventors: Ting-Chang Chang, Yi-Shien Mor, Po-Tsun Liu
  • Patent number: 6232177
    Abstract: A method of increasing a surface area of a bottom electrode for a DRAM. A polysilicon layer is formed. An etching process is performed and the polysilicon layer is etched into a surface having protrusions in order to increase the surface area of the polysilicon layer. A redox reaction is performed and the etched polysilicon layer is transformed to a metal layer by use of a solution; thus, the original appearance is still maintained. An annealing process is performed to concentrate the metal layer and further to reduce a thin-film leakage current.
    Type: Grant
    Filed: October 8, 1999
    Date of Patent: May 15, 2001
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Patent number: 6232198
    Abstract: A method for fabricating a noble metal electrode of a capacitor. A substrate having a doped region is provided. A dielectric layer is formed to cover the substrate including the doped region with a contact is penetrating through the dielectric layer to couple with the doped region. A barrier layer is formed to cover the dielectric layer and the contact. A polysilicon layer is formed on the barrier layer. The polysilicon layer and TiN barrier layer are etched to form an electrode pattern. The chip is immersed in a solution having noble metal ions and reducing agent for the noble metal ions. In such solution, a displacement reaction takes place to displace the polysilicon layer by a noble metal layer. After the immersion step, the chip is annealed to densify the noble metal layer.
    Type: Grant
    Filed: May 27, 1999
    Date of Patent: May 15, 2001
    Inventors: Ting-Chang Chang, Po-Tsun Liu
  • Patent number: 6156671
    Abstract: A method for improving a characteristic of a dielectric material. A methylsilsesquioxane having a low dielectric constant is used as a dielectric material. A methylsilsesquioxane film is formed on a substrate. A baking process is performed on the methylsilsesquioxane film, and then a curing process is performed on the methylsilsesquioxane film. Next, a hydrogen plasma treatment is performed on the surface of the methylsilsesquioxane film to prevent the methylsilsesquioxane film from being damaged by oxygen plasma for removing photoresist layer, so that the characteristically low dielectric constant of the methylsilsesquioxane film is maintained.
    Type: Grant
    Filed: March 10, 1999
    Date of Patent: December 5, 2000
    Assignee: United Microelectronics Corp.
    Inventors: Ting-Chang Chang, Po-Tsun Liu, Water Lur