Patents by Inventor Po-Yu Lin
Po-Yu Lin has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20220317771Abstract: The embodiments of the disclosure provide a method for tracking trackers and a host. The method includes: obtaining a first relative pose between a first tracker and a second tracker; in response to determining that the first relative pose is stable, determining whether a first pose of the first tracker is trackable; and in response to determining that the first pose of the first tracker is untrackable, determining the first pose of the first tracker based on a second pose of the second tracker and the first relative pose.Type: ApplicationFiled: March 15, 2022Publication date: October 6, 2022Applicant: HTC CorporationInventors: Chih Chien Chen, Chun-Kai Huang, Po-Yu Lin
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Publication number: 20220320276Abstract: A semiconductor device includes a source/drain feature over a semiconductor substrate, channel layers over the semiconductor substrate and connected to the source/drain feature, a gate portion between vertically adjacent channel layers, and an inner spacer between the source/drain feature and the gate portion and between adjacent channel layers. The semiconductor device further includes an air gap between the inner spacer and the source/drain feature.Type: ApplicationFiled: August 5, 2021Publication date: October 6, 2022Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Li-Li Su, Wei-Min Liu
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Publication number: 20220320307Abstract: Multi-gate devices and methods for fabricating such are disclosed herein. An exemplary method includes forming a semiconductor stack on a substrate, wherein the semiconductor stack includes a first semiconductor layers and a second semiconductor layers alternatively disposed, the first semiconductor layers and the second semiconductor layers being different in composition; patterning the semiconductor stack to form a semiconductor fin; forming a dielectric fin next to the semiconductor fin; forming a first gate stack on the semiconductor fin and the dielectric fin; etching to a portion of the semiconductor fin within a source/drain region, resulting in a source/drain recess; and epitaxially growing a source/drain feature in the source/drain recess, defining an airgap spanning between a sidewall of the source/drain feature and a sidewall of the dielectric fin.Type: ApplicationFiled: September 1, 2021Publication date: October 6, 2022Inventors: Po-Yu Lin, Wei-Yang Lee, Chia-Pin Lin, Tzu-Hua Chiu, Kuan-Hao Cheng, Wei-Han Fan, Yee-Chia Yeo, Wei Hao Lu
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Patent number: 11232311Abstract: A method providing guidance to a vehicle for parking includes: obtaining information of potential parking space. Information of the parking space includes likelihood of finding unoccupied parking space and navigating to the parking space according to the information of parking space. The information of the parking space guides a driver to quickly find the parking space, thereby reducing parking time, improving parking space utilization, and efficiency of road traffic management. Calculating the likelihood of finding an unoccupied space is of great assistance to a driver.Type: GrantFiled: April 13, 2021Date of Patent: January 25, 2022Assignee: Shenzhen Fugui Precision Ind. Co., Ltd.Inventor: Po-Yu Lin
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Publication number: 20210111027Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.Type: ApplicationFiled: December 21, 2020Publication date: April 15, 2021Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Yu LIN, Chi-Yu CHOU, Hsien-Ming LEE, Huai-Tei YANG, Chun-Chieh WANG, Yueh-Ching PAI, Chi-Jen YANG, Tsung-Ta TANG, Yi-Ting WANG
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Patent number: 10872769Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.Type: GrantFiled: December 30, 2019Date of Patent: December 22, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Yu Lin, Chi-Yu Chou, Hsien-Ming Lee, Huai-Tei Yang, Chun-Chieh Wang, Yueh-Ching Pai, Chi-Jen Yang, Tsung-Ta Tang, Yi-Ting Wang
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Patent number: 10868180Abstract: A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and second dopants are of opposite types. The method further includes epitaxially growing a first semiconductor layer that is doped with a third dopant. The first and third dopants are of opposite types. The method further includes depositing a dielectric hard mask (HM) layer over the first semiconductor layer; patterning the dielectric HM layer to have an opening over the first region; extending the opening towards the semiconductor substrate; and epitaxially growing a second semiconductor layer in the opening. The second semiconductor layer is doped with a fourth dopant. The first and fourth dopants are of a same type. The method further includes removing the dielectric HM layer; and performing a first CMP process to planarize both the first and second semiconductor layers.Type: GrantFiled: July 13, 2020Date of Patent: December 15, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuo-Yin Lin, Teng-Chun Tsai, Po-Yu Lin
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Publication number: 20200350434Abstract: A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and second dopants are of opposite types. The method further includes epitaxially growing a first semiconductor layer that is doped with a third dopant. The first and third dopants are of opposite types. The method further includes depositing a dielectric hard mask (HM) layer over the first semiconductor layer; patterning the dielectric HM layer to have an opening over the first region; extending the opening towards the semiconductor substrate; and epitaxially growing a second semiconductor layer in the opening. The second semiconductor layer is doped with a fourth dopant. The first and fourth dopants are of a same type. The method further includes removing the dielectric HM layer; and performing a first CMP process to planarize both the first and second semiconductor layers.Type: ApplicationFiled: July 13, 2020Publication date: November 5, 2020Inventors: Kuo-Yin Lin, Teng-Chun Tsai, Po-Yu Lin
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Patent number: 10714615Abstract: A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and second dopants are of opposite types. The method further includes epitaxially growing a first semiconductor layer that is doped with a third dopant. The first and third dopants are of opposite types. The method further includes depositing a dielectric hard mask (HM) layer over the first semiconductor layer; patterning the dielectric HM layer to have an opening over the first region; extending the opening towards the semiconductor substrate; and epitaxially growing a second semiconductor layer in the opening. The second semiconductor layer is doped with a fourth dopant. The first and fourth dopants are of a same type. The method further includes removing the dielectric HM layer; and performing a first CMP process to planarize both the first and second semiconductor layers.Type: GrantFiled: December 17, 2018Date of Patent: July 14, 2020Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD.Inventors: Kuo-Yin Lin, Teng-Chun Tsai, Po-Yu Lin
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Publication number: 20200135471Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.Type: ApplicationFiled: December 30, 2019Publication date: April 30, 2020Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Yu LIN, Chi-Yu CHOU, Hsien-Ming LEE, Huai-Tei YANG, Chun-Chieh WANG, Yueh-Ching PAI, Chi-Jen YANG, Tsung-Ta TANG, Yi-Ting WANG
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Patent number: 10535523Abstract: The present disclosure relates to a semiconductor device and a manufacturing method of fabricating a semiconductor structure. The method includes forming an opening in a substrate and depositing a conformal metal layer in the opening. The depositing includes performing one or more deposition cycles. The deposition includes flowing a first precursor into a deposition chamber and purging the deposition chamber to remove at least a portion of the first precursor. The method also includes flowing a second precursor into the deposition chamber to form a sublayer of the conformal metal layer and purging the deposition chamber to remove at least a portion of the second precursor. The method further includes performing a metallic halide etching (MHE) process that includes flowing a third precursor into the deposition chamber.Type: GrantFiled: August 30, 2018Date of Patent: January 14, 2020Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Po-Yu Lin, Chi-Yu Chou, Hsien-Ming Lee, Huai-Tei Yang, Chun-Chieh Wang, Yueh-Ching Pai, Chi-Jen Yang, Tsung-Ta Tang, Yi-Ting Wang
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Patent number: 10334283Abstract: A virtual cinema interactive system includes a server and at least two user terminals. The user terminals communicate with the server. An host can invite his friends to watch film together on a virtual cinema displayed on each user terminal, and distribution of virtual cinema seating, talking between film watchers, and film watcher reactions to the film can be recognized and facilitated. A virtual cinema interactive method is also disclosed.Type: GrantFiled: May 29, 2018Date of Patent: June 25, 2019Assignee: NANNING FUGUI PRECISION INDUSTRIAL CO., LTD.Inventor: Po-Yu Lin
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Patent number: 10326809Abstract: A virtual cinema interactive system includes a server and at least two user terminals. The user terminals communicate with the server. An inviter can invite his friends to watch film together on a virtual cinema displayed on each user terminal, and distribution of virtual cinema seating, talking between film watchers, and film watcher reactions to the film can be recognized and facilitated. A virtual cinema interactive method is also disclosed.Type: GrantFiled: June 7, 2018Date of Patent: June 18, 2019Assignee: NANNING FUGUI PRECISION INDUSTRIAL CO., LTD.Inventor: Po-Yu Lin
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Publication number: 20190178994Abstract: A laser distance measuring device for measuring a distance between device and object comprises a plurality of substrates. Each substrate comprises a first surface carrying a laser diode, a photo diode, and a lens module. The laser diode and the photo diode are located at a side of the lens module away from the object. The laser diode emits lasers to the object, and the photo diode receives laser which is reflected by the object. The lens module focuses the outgoing and the incoming laser. The plurality of substrates being arranged in a divergent form improves Field of View of the measuring device, and the base supporting the substrates can be rotated to improve accuracy of the device in terms of multiple times of flight calculations applied to each substrate.Type: ApplicationFiled: January 2, 2018Publication date: June 13, 2019Inventor: PO-YU LIN
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Publication number: 20190181614Abstract: A laser radar device includes a transmitter, a receiver, and an optical coupler. The optical coupler includes an incident surface, an emergent surface, and a reflective surface. At least one convergent lens is positioned at the incident surface. The convergent lens is aligned with the transmitter and the receiver. At least one collimating lens is positioned at the emergent surface. The at least one collimating lens corresponds to the at least one convergent lens. An angle between the reflective surface and the incident surface is equal to an angle between the reflective surface and the emergent surface.Type: ApplicationFiled: January 12, 2018Publication date: June 13, 2019Inventor: PO-YU LIN
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Publication number: 20190140097Abstract: A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and second dopants are of opposite types. The method further includes epitaxially growing a first semiconductor layer that is doped with a third dopant. The first and third dopants are of opposite types. The method further includes depositing a dielectric hard mask (HM) layer over the first semiconductor layer; patterning the dielectric HM layer to have an opening over the first region; extending the opening towards the semiconductor substrate; and epitaxially growing a second semiconductor layer in the opening. The second semiconductor layer is doped with a fourth dopant. The first and fourth dopants are of a same type. The method further includes removing the dielectric HM layer; and performing a first CMP process to planarize both the first and second semiconductor layers.Type: ApplicationFiled: December 17, 2018Publication date: May 9, 2019Inventors: Kuo-Yin Lin, Teng-Chun Tsai, Po-Yu Lin
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Publication number: 20180376170Abstract: A virtual cinema interactive system includes a server and at least two user terminals. The user terminals communicate with the server. An host can invite his friends to watch film together on a virtual cinema displayed on each user terminal, and distribution of virtual cinema seating, talking between film watchers, and film watcher reactions to the film can be recognized and facilitated. A virtual cinema interactive method is also disclosed.Type: ApplicationFiled: May 29, 2018Publication date: December 27, 2018Inventor: PO-YU LIN
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Patent number: 10164102Abstract: A method includes providing a semiconductor substrate having first and second regions that are doped with first and second dopants respectively. The first and second dopants are of opposite types. The method further includes epitaxially growing a first semiconductor layer that is doped with a third dopant. The first and third dopants are of opposite types. The method further includes depositing a dielectric hard mask (HM) layer over the first semiconductor layer; patterning the dielectric HM layer to have an opening over the first region; extending the opening towards the semiconductor substrate; and epitaxially growing a second semiconductor layer in the opening. The second semiconductor layer is doped with a fourth dopant. The first and fourth dopants are of a same type. The method further includes removing the dielectric HM layer; and performing a first CMP process to planarize both the first and second semiconductor layers.Type: GrantFiled: April 23, 2018Date of Patent: December 25, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Kuo-Yin Lin, Teng-Chun Tsai, Po-Yu Lin
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Publication number: 20180288113Abstract: A virtual cinema interactive system includes a server and at least two user terminals. The user terminals communicate with the server. An inviter can invite his friends to watch film together on a virtual cinema displayed on each user terminal, and distribution of virtual cinema seating, talking between film watchers, and film watcher reactions to the film can be recognized and facilitated. A virtual cinema interactive method is also disclosed.Type: ApplicationFiled: June 7, 2018Publication date: October 4, 2018Inventor: PO-YU LIN
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Publication number: 20180260105Abstract: A method for displaying multiple independent sub-screens on a single display of an electronic device comprises step of capturing at least one facial feature of at least one operator and at least one sub-screen controlling gesture posed by the at least one operator within a predefine area of an electronic device. The electronic device is controlled to establish, merge, or delete at least one sub-screen according to the captured at least one sub-screen controlling gesture. The electronic device is controlled to store a relationship between the at least one facial feature of the operator and the sub-screen. A device of displaying sub-screen is also provided.Type: ApplicationFiled: March 17, 2017Publication date: September 13, 2018Applicants: NANNING FUGUI PRECISION INDUSTRIAL CO., LTD., HON HAI PRECISION INDUSTRY CO., LTD.Inventor: PO-YU LIN