Abstract: Exemplary methods of semiconductor processing may include forming a plasma of a fluorine-containing precursor. The methods may include performing a chamber clean in a processing region of a semiconductor processing chamber. The processing region may be at least partially defined between a faceplate and a substrate support. The methods may include generating aluminum fluoride during the chamber clean. The methods may include contacting surfaces within the processing region with a carbon-containing precursor. The methods may include volatilizing aluminum fluoride from the surfaces of the processing region.

Abstract: Disclosed herein is a method and apparatus for forming carbon hard masks to improve deposition uniformity and etch selectivity. The carbon hard mask may be formed in a PECVD process chamber and is a nitrogen-doped carbon hardmask. The nitrogen-doped carbon hardmask is formed using a nitrogen containing gas, an argon containing gas, and a hydrocarbon gas.

Abstract: Exemplary semiconductor processing methods may include forming a seasoning film on a heater of a processing chamber by a first deposition process. The method may include performing a hardmask deposition process in the processing chamber. The method may include cleaning the processing chamber by a first cleaning process. The method may include monitoring a gas produced during the first cleaning process. The method may include cleaning the processing chamber using a second cleaning process different from the first cleaning process. The method may also include monitoring the gas produced during the second cleaning process.

Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a plurality of recesses extending about and radially outward of the plurality of apertures.

Abstract: Disclosed herein is a method and apparatus for forming carbon hard masks to improve deposition uniformity and etch selectivity. The carbon hard mask may be formed in a PECVD process chamber and is a nitrogen-doped carbon hardmask. The nitrogen-doped carbon hardmask is formed using a nitrogen containing gas, an argon containing gas, and a hydrocarbon gas.

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about ?100 MPa to about 100 MPa.

Abstract: Exemplary semiconductor processing chambers may include a chamber body including sidewalls and a base. The chambers may include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate. The substrate support may include a shaft coupled with the support platen. The substrate support may include a shield coupled with the shaft of the substrate support. The shield may include a plurality of apertures defined through the shield. The substrate support may include a block seated in an aperture of the shield.

Abstract: Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield.

Abstract: A plasma processing system is described. The system may include a showerhead. The system may further include a first RF generator in electrical communication with the showerhead. The first RF generator may be configured to deliver a first voltage at a first frequency to the showerhead. Additionally, the system may include a second RF generator in electrical communication with a pedestal. The second RF generator may be configured to deliver a second voltage at a second frequency to the pedestal. The second frequency may be less than the first frequency. The system may also include a terminator in electrical communication with the showerhead. The terminator may provide a path to ground for the second voltage. Methods of depositing material using the plasma processing system are described. A method of seasoning a chamber by depositing silicon oxide and silicon nitride on the wall of the chamber is also described.

Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a central recess about the central axis extending from the second surface of the faceplate to a depth less than a thickness of the faceplate.

Abstract: Exemplary methods of semiconductor processing may include treating a surface of a substrate with a hydrogen-containing precursor. The substrate may be disposed within a processing region of a semiconductor processing chamber. The methods may include contacting the substrate with a tungsten-containing precursor. The methods may include forming an initiation layer comprising tungsten on the substrate. The methods may include treating the initiation layer with a hydrogen-containing precursor. The methods may include forming a plasma of the tungsten-containing precursor and a carbon-containing precursor. Hydrogen in the plasma may be limited to hydrogen included in the carbon-containing precursor. The methods may include forming a tungsten-containing hardmask layer on the initiation layer.

Abstract: Exemplary methods of semiconductor processing may include forming a silicon oxide material on exposed surfaces of a processing region of a semiconductor processing chamber. The methods may include forming a silicon nitride material overlying the silicon oxide material. The methods may include performing a deposition process on a semiconductor substrate disposed within the processing region of the semiconductor processing chamber. The methods may include performing a chamber cleaning process.

Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about ?100 MPa to about 100 MPa.

Abstract: A method of and system for substrate fabrication is disclosed herein. The method includes performing a first plasma-enhanced surface treatment in a chamber prior to disposal of a substrate, then, subsequently, depositing a season material in the process chamber. After depositing the plurality of season materials in the process chamber, a substrate is disposed in the chamber. The substrate is positioned in the process chamber in contact with the season material. A substrate treatment is performed. The substrate treatment can include one or more of: performing a second plasma-enhanced surface treatment, forming a barrier layer on the substrate, or performing a low frequency RF treatment prior to forming a metal-based hardmask film on the substrate. The metal-based hardmask film includes one or more metals.

Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for depositing metal silicide layers on substrates and chamber components. In one embodiment, a method of forming a hardmask includes positioning the substrate having a target layer within a processing chamber, forming a seed layer comprising metal silicide on the target layer and depositing a tungsten-based bulk layer on the seed layer, wherein the metal silicide layer and the tungsten-based bulk layer form the hardmask. In another embodiment, a method of conditioning the components of a plasma processing chamber includes flowing an inert gas comprising argon or helium from a gas applicator into the plasma processing chamber, exposing a substrate support to a plasma within the plasma processing chamber and forming a seasoning layer including metal silicide on an aluminum-based surface of the substrate support.

Abstract: The present disclosure generally relates to processing chamber seasoning layers having a graded composition. In one example, the seasoning layer is a boron-carbon-nitride (BCN) film. The BCN film may have a greater composition of boron at the base of the film. As the BCN film is deposited, the boron concentration may approach zero, while the relative carbon and nitrogen concentration increases. The BCN film may be deposited by initially co-flowing a boron precursor, a carbon precursor, and a nitrogen precursor. After a first period of time, the flow rate of the boron precursor may be reduced. As the flow rate of boron precursor is reduced, RF power may be applied to generate a plasma during deposition of the seasoning layer.

Abstract: One or more embodiments described herein generally relate to selective deposition of substrates in semiconductor processes. In these embodiments, a precursor is delivered to a process region of a process chamber. A plasma is generated by delivering RF power to an electrode within a substrate support surface of a substrate support disposed in the process region of the process chamber. In embodiments described herein, delivering the RF power at a high power range, such as greater than 4.5 kW, advantageously leads to greater plasma coupling to the electrode, resulting in selective deposition to the substrate, eliminating deposition on other process chamber areas such as the process chamber side walls. As such, less process chamber cleans are necessary, leading to less time between depositions, increasing throughput and making the process more cost-effective.

Abstract: In one or more embodiments, a method for depositing a carbon hard-mask material by plasma-enhanced chemical vapor deposition (PECVD) includes heating a substrate contained within a process chamber to a temperature in a range from about 100 C to about 700 C and producing a plasma with a power generator emitting an RF power of greater than 3 kW. In some examples, the temperature is in a range from about 300C to about 700C and the RF power is greater than 3 kW to about 7 kW. The method also includes flowing a hydrocarbon precursor into the plasma within the process chamber and forming a carbon hard-mask layer on the substrate at a rate of greater than 5,000/min, such as up to about 10,000/min or faster.

Abstract: Embodiments of the disclosure relate to an improved electrostatic chuck for use in a processing chamber to fabricate semiconductor devices. In one embodiment, a processing chamber includes a chamber body having a processing volume defined therein and an electrostatic chuck disposed within the processing volume. The electrostatic chuck includes a support surface with a plurality of mesas located thereon, one or more electrodes disposed within the electrostatic chuck, and a seasoning layer deposited on the support surface over the plurality of mesas. The support surface is made from an aluminum containing material. The one or more electrodes are configured to form electrostatic charges to electrostatically secure a substrate to the support surface. The seasoning layer is configured to provide cushioning support to the substrate when the substrate is electrostatically secured to the support surface.

Abstract: Embodiments of the present invention generally relate to an apparatus for reducing arcing during thick film deposition in a plasma process chamber. In one embodiment, an edge ring including an inner edge diameter that is about 0.28 inches to about 0.38 inches larger than an outer diameter of a substrate is utilized when depositing a thick (greater than two microns) layer on the substrate. The layer may be a dielectric layer, such as a carbon hard mask layer, for example an amorphous carbon layer. With the 0.14 inches to 0.19 inches gap between the outer edge of substrate and the inner edge of the edge ring during the deposition of the thick layer, substrate support surface arcing is reduced while the layer thickness uniformity is maintained.