Patents by Inventor Prashant Kumar KULSHRESHTHA
Prashant Kumar KULSHRESHTHA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20230390811Abstract: Exemplary semiconductor processing systems may include a processing chamber defining a processing region. The systems may include a foreline coupled with the processing chamber, the foreline defining a fluid conduit. The systems may include a radical generator having an inlet and an outlet. The outlet may be fluidly coupled with the foreline. The systems may include a gas source fluidly coupled with the inlet of the radical generator. The systems may include a throttle valve coupled with the foreline downstream of the radical generator.Type: ApplicationFiled: June 6, 2022Publication date: December 7, 2023Applicant: Applied Materials, Inc.Inventors: Khokan Chandra Paul, Truong Van Nguyen, Kelvin Chan, Diwakar Kedlaya, Anantha K. Subramani, Abdul Aziz Khaja, Vijet Patil, Yusheng Fang, Liangfa Hu, Prashant Kumar Kulshreshtha
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Publication number: 20230386883Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for reducing substrate backside damage during semiconductor device processing. In one implementation, a method of chucking a substrate in a substrate process chamber includes exposing the substrate to a plasma preheat treatment prior to applying a chucking voltage to a substrate support. In one implementation, a substrate support is provided and includes a body having an electrode and thermal control device disposed therein. A plurality of substrate supporting features are formed on an upper surface of the body, each of the substrate supporting features having a substrate supporting surface and a rounded edge.Type: ApplicationFiled: August 14, 2023Publication date: November 30, 2023Inventors: Liangfa HU, Abdul Aziz KHAJA, Sarah Michelle BOBEK, Prashant Kumar KULSHRESHTHA, Yoichi SUZUKI
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Patent number: 11830706Abstract: Embodiments of the present disclosure generally relate to a pedestal for increasing temperature uniformity in a substrate supported thereon. The pedestal comprises a body having a heater embedded therein. The body comprises a patterned surface that includes a first region having a first plurality of posts extending from a base surface of the body at a first height, and a second region surrounding the central region having a second plurality of posts extending from the base surface at a second height that is greater than the first height, wherein an upper surface of each of the first plurality of posts and the second plurality of posts are substantially coplanar and define a substrate receiving surface.Type: GrantFiled: December 4, 2019Date of Patent: November 28, 2023Assignee: Applied Materials, Inc.Inventors: Venkata Sharat Chandra Parimi, Zubin Huang, Jian Li, Satish Radhakrishnan, Rui Cheng, Diwakar N. Kedlaya, Juan Carlos Rocha-Alvarez, Umesh M. Kelkar, Karthik Janakiraman, Sarah Michelle Bobek, Prashant Kumar Kulshreshtha, Vinay K. Prabhakar, Byung Seok Kwon
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Patent number: 11821082Abstract: Exemplary methods of semiconductor processing may include forming a silicon oxide material on exposed surfaces of a processing region of a semiconductor processing chamber. The methods may include forming a silicon nitride material overlying the silicon oxide material. The methods may include performing a deposition process on a semiconductor substrate disposed within the processing region of the semiconductor processing chamber. The methods may include performing a chamber cleaning process.Type: GrantFiled: October 27, 2020Date of Patent: November 21, 2023Assignee: Applied Materials, Inc.Inventors: Xiaoquan Min, Byung Ik Song, Hyung Je Woo, Venkata Sharat Chandra Parimi, Prashant Kumar Kulshreshtha, Kwangduk Lee
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Patent number: 11814716Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a central recess about the central axis extending from the second surface of the faceplate to a depth less than a thickness of the faceplate.Type: GrantFiled: November 27, 2019Date of Patent: November 14, 2023Assignee: Applied Materials, Inc.Inventors: Fang Ruan, Prashant Kumar Kulshreshtha, Jiheng Zhao, Diwakar Kedlaya
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Patent number: 11810764Abstract: Exemplary semiconductor processing chambers may include a gasbox. The chambers may include a substrate support. The chambers may include a blocker plate positioned between the gasbox and the substrate support. The blocker plate may define a plurality of apertures through the plate. The chambers may include a faceplate positioned between the blocker plate and substrate support. The faceplate may be characterized by a first surface facing the blocker plate and a second surface opposite the first surface. The second surface of the faceplate and the substrate support may at least partially define a processing region within the semiconductor processing chamber. The faceplate may be characterized by a central axis, and the faceplate may define a plurality of apertures through the faceplate. The faceplate may define a plurality of recesses extending about and radially outward of the plurality of apertures.Type: GrantFiled: April 23, 2020Date of Patent: November 7, 2023Inventors: Fang Ruan, Prashant Kumar Kulshreshtha, Rajaram Narayanan, Diwakar Kedlaya
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Publication number: 20230317455Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about ?100 MPa to about 100 MPa.Type: ApplicationFiled: June 6, 2023Publication date: October 5, 2023Inventors: Prashant Kumar KULSHRESHTHA, Ziqing DUAN, Karthik Thimmavajjula NARASIMHA, Kwangduk Douglas LEE, Bok Hoen KIM
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Publication number: 20230298922Abstract: Aspects of the present disclosure relate to one or more implementations of a substrate support for a processing chamber. In one implementation, a substrate support includes a body having a center, and a support surface on the body configured to at least partially support a substrate. The substrate support includes a first angled wall that extends upward and radially outward from the support surface, and a first upper surface disposed above the support surface. The substrate support also includes a second angled wall that extends upward and radially outward from the first upper surface, the first upper surface extending between the first angled wall and the second angled wall. The substrate support also includes a second upper surface extending from the second angled wall. The second upper surface is disposed above the first upper surface.Type: ApplicationFiled: May 23, 2023Publication date: September 21, 2023Applicant: Applied Materials, Inc.Inventors: Abdul Aziz KHAJA, Venkata Sharat Chandra PARIMI, Sarah Michelle BOBEK, Prashant Kumar KULSHRESHTHA, Vinay K. PRABHAKAR
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Patent number: 11756819Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for reducing substrate backside damage during semiconductor device processing. In one implementation, a method of chucking a substrate in a substrate process chamber includes exposing the substrate to a plasma preheat treatment prior to applying a chucking voltage to a substrate support. In one implementation, a substrate support is provided and includes a body having an electrode and thermal control device disposed therein. A plurality of substrate supporting features are formed on an upper surface of the body, each of the substrate supporting features having a substrate supporting surface and a rounded edge.Type: GrantFiled: April 22, 2020Date of Patent: September 12, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Liangfa Hu, Abdul Aziz Khaja, Sarah Michelle Bobek, Prashant Kumar Kulshreshtha, Yoichi Suzuki
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Patent number: 11728168Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of boron-carbon films on a substrate. In one implementation, a method of processing a substrate is provided. The method comprises flowing a hydrocarbon-containing gas mixture into a processing volume of a processing chamber having a substrate positioned therein, wherein the substrate is heated to a substrate temperature from about 400 degrees Celsius to about 700 degrees Celsius, flowing a boron-containing gas mixture into the processing volume and generating an RF plasma in the processing volume to deposit a boron-carbon film on the heated substrate, wherein the boron-carbon film has an elastic modulus of from about 200 to about 400 GPa and a stress from about ?100 MPa to about 100 MPa.Type: GrantFiled: April 1, 2021Date of Patent: August 15, 2023Assignee: APPLIED MATERIALS, INC.Inventors: Prashant Kumar Kulshreshtha, Ziqing Duan, Karthik Thimmavajjula Narasimha, Kwangduk Douglas Lee, Bok Hoen Kim
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Publication number: 20230203659Abstract: Aspects of the present disclosure relate generally to pedestals, components thereof, and methods of using the same for substrate processing chambers. In one implementation, a pedestal for disposition in a substrate processing chamber includes a body. The body includes a support surface. The body also includes a stepped surface that protrudes upwards from the support surface. The stepped surface is disposed about the support surface to surround the support surface. The stepped surface defines an edge ring such that the edge ring is integrated with the pedestal to form the body that is monolithic. The pedestal also includes an electrode disposed in the body, and one or more heaters disposed in the body.Type: ApplicationFiled: February 20, 2023Publication date: June 29, 2023Applicant: Applied Materials, Inc.Inventors: Sarah Michelle BOBEK, Venkata Sharat Chandra PARIMI, Prashant Kumar KULSHRESHTHA, Vinay K. PRABHAKAR, Kwangduk Douglas LEE, Sungwon HA, Jian LI
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Patent number: 11682574Abstract: Aspects of the present disclosure relate to one or more implementations of a substrate support for a processing chamber. In one implementation, a substrate support includes a body having a center, and a support surface on the body configured to at least partially support a substrate. The substrate support includes a first angled wall that extends upward and radially outward from the support surface, and a first upper surface disposed above the support surface. The substrate support also includes a second angled wall that extends upward and radially outward from the first upper surface, the first upper surface extending between the first angled wall and the second angled wall. The substrate support also includes a second upper surface extending from the second angled wall. The second upper surface is disposed above the first upper surface.Type: GrantFiled: November 7, 2019Date of Patent: June 20, 2023Assignee: Applied Materials, Inc.Inventors: Abdul Aziz Khaja, Venkata Sharat Chandra Parimi, Sarah Michelle Bobek, Prashant Kumar Kulshreshtha, Vinay K. Prabhakar
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Publication number: 20230151487Abstract: The present disclosure relates to systems and methods for reducing the formation of hardware residue and minimizing secondary plasma formation during substrate processing in a process chamber. The process chamber may include a gas distribution member configured to flow a first gas into a process volume and generate a plasma therefrom. A second gas is supplied into a lower region of the process volume. Further, an exhaust port is disposed in the lower region to remove excess gases or by-products from the process volume during or after processing.Type: ApplicationFiled: January 20, 2023Publication date: May 18, 2023Inventors: Liangfa HU, Prashant Kumar KULSHRESHTHA, Anjana M. PATEL, Abdul Aziz KHAJA, Viren KALSEKAR, Vinay K. PRABHAKAR, Satya Teja Babu THOKACHICHU, Byung Seok KWON, Ratsamee LIMDULPAIBOON, Kwangduk Douglas LEE, Ganesh BALASUBRAMANIAN
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Patent number: 11613808Abstract: Exemplary semiconductor processing methods may include forming a seasoning film on a heater of a processing chamber by a first deposition process. The method may include performing a hardmask deposition process in the processing chamber. The method may include cleaning the processing chamber by a first cleaning process. The method may include monitoring a gas produced during the first cleaning process. The method may include cleaning the processing chamber using a second cleaning process different from the first cleaning process. The method may also include monitoring the gas produced during the second cleaning process.Type: GrantFiled: October 22, 2020Date of Patent: March 28, 2023Assignee: Applied Materials, Inc.Inventors: Jiheng Zhao, Abdul Aziz Khaja, Prashant Kumar Kulshreshtha, Fang Ruan
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Patent number: 11600470Abstract: Exemplary semiconductor processing chambers may include a chamber body including sidewalls and a base. The chambers may include a substrate support extending through the base of the chamber body. The substrate support may include a support platen configured to support a semiconductor substrate. The substrate support may include a shaft coupled with the support platen. The substrate support may include a shield coupled with the shaft of the substrate support. The shield may include a plurality of apertures defined through the shield. The substrate support may include a block seated in an aperture of the shield.Type: GrantFiled: December 27, 2019Date of Patent: March 7, 2023Assignee: Applied Materials, Inc.Inventors: Venkata Sharat Chandra Parimi, Satish Radhakrishnan, Xiaoquan Min, Sarah Michelle Bobek, Sungwon Ha, Prashant Kumar Kulshreshtha, Vinay Prabhakar
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Patent number: 11584994Abstract: Aspects of the present disclosure relate generally to pedestals, components thereof, and methods of using the same for substrate processing chambers. In one implementation, a pedestal for disposition in a substrate processing chamber includes a body. The body includes a support surface. The body also includes a stepped surface that protrudes upwards from the support surface. The stepped surface is disposed about the support surface to surround the support surface. The stepped surface defines an edge ring such that the edge ring is integrated with the pedestal to form the body that is monolithic. The pedestal also includes an electrode disposed in the body, and one or more heaters disposed in the body.Type: GrantFiled: December 16, 2019Date of Patent: February 21, 2023Assignee: Applied Materials, Inc.Inventors: Sarah Michelle Bobek, Venkata Sharat Chandra Parimi, Prashant Kumar Kulshreshtha, Vinay K. Prabhakar, Kwangduk Douglas Lee, Sungwon Ha, Jian Li
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Publication number: 20230041963Abstract: Methods and techniques for deposition of amorphous carbon films on a substrate are provided. In one example, the method includes depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further includes implanting a dopant or the inert species into the amorphous carbon film in a second processing region. The implant species, energy, dose & temperature in some combination may be used to enhance the hardmask hardness. The method further includes patterning the doped amorphous carbon film. The method further includes etching the underlayer.Type: ApplicationFiled: October 11, 2022Publication date: February 9, 2023Inventors: Rajesh PRASAD, Sarah BOBEK, Prashant Kumar KULSHRESHTHA, Kwangduk Douglas LEE, Harry WHITESELL, Hidetaka OSHIO, Dong Hyung LEE, Deven Matthew Raj MITTAL, Scott FALK, Venkataramana R. CHAVVA
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Publication number: 20230029929Abstract: Methods and techniques for deposition of amorphous carbon films on a substrate are provided. In one example, the method includes depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further includes implanting a dopant or the inert species into the amorphous carbon film in a second processing region. The implant species, energy, dose & temperature in some combination may be used to enhance the hardmask hardness. The method further includes patterning the doped amorphous carbon film. The method further includes etching the underlayer.Type: ApplicationFiled: October 10, 2022Publication date: February 2, 2023Inventors: Rajesh PRASAD, Sarah BOBEK, Prashant Kumar KULSHRESHTHA, Kwangduk Douglas LEE, Harry WHITESELL, Hidetaka OSHIO, Dong Hyung LEE, Deven Matthew Raj MITTAL, Scott FALK, Venkataramana R. CHAVVA
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Patent number: 11560623Abstract: The present disclosure relates to systems and methods for reducing the formation of hardware residue and minimizing secondary plasma formation during substrate processing in a process chamber. The process chamber may include a gas distribution member configured to flow a first gas into a process volume and generate a plasma therefrom. A second gas is supplied into a lower region of the process volume. Further, an exhaust port is disposed in the lower region to remove excess gases or by-products from the process volume during or after processing.Type: GrantFiled: April 24, 2020Date of Patent: January 24, 2023Assignee: Applied Materials, Inc.Inventors: Liangfa Hu, Prashant Kumar Kulshreshtha, Anjana M. Patel, Abdul Aziz Khaja, Viren Kalsekar, Vinay K. Prabhakar, Satya Teja Babu Thokachichu, Byung Seok Kwon, Ratsamee Limdulpaiboon, Kwangduk Douglas Lee, Ganesh Balasubramanian
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Patent number: 11469107Abstract: Methods and techniques for deposition of amorphous carbon films on a substrate are provided. In one example, the method includes depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further includes implanting a dopant or the inert species into the amorphous carbon film in a second processing region. The implant species, energy, dose & temperature in some combination may be used to enhance the hardmask hardness. The method further includes patterning the doped amorphous carbon film. The method further includes etching the underlayer.Type: GrantFiled: July 27, 2020Date of Patent: October 11, 2022Assignee: Applied Materials, Inc.Inventors: Rajesh Prasad, Sarah Bobek, Prashant Kumar Kulshreshtha, Kwangduk Douglas Lee, Harry Whitesell, Hidetaka Oshio, Dong Hyung Lee, Deven Matthew Raj Mittal, Scott Falk, Venkataramana R. Chavva