Patents by Inventor Prashant Kumar KULSHRESHTHA

Prashant Kumar KULSHRESHTHA has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210017645
    Abstract: Embodiments of the present invention generally relate to an apparatus for reducing arcing during thick film deposition in a plasma process chamber. In one embodiment, an edge ring including an inner edge diameter that is about 0.28 inches to about 0.38 inches larger than an outer diameter of a substrate is utilized when depositing a thick (greater than two microns) layer on the substrate. The layer may be a dielectric layer, such as a carbon hard mask layer, for example an amorphous carbon layer. With the 0.14 inches to 0.19 inches gap between the outer edge of substrate and the inner edge of the edge ring during the deposition of the thick layer, substrate support surface arcing is reduced while the layer thickness uniformity is maintained.
    Type: Application
    Filed: April 9, 2019
    Publication date: January 21, 2021
    Inventors: Lu XU, Byung Seok KWON, Viren KALSEKAR, Vinay K. PRABHAKAR, Prashant Kumar KULSHRESHTHA, Dong Hyung LEE, Kwangduk Douglas LEE
  • Publication number: 20200365441
    Abstract: Embodiments of the present disclosure generally relate to apparatus and methods for reducing substrate backside damage during semiconductor device processing. In one implementation, a method of chucking a substrate in a substrate process chamber includes exposing the substrate to a plasma preheat treatment prior to applying a chucking voltage to a substrate support. In one implementation, a substrate support is provided and includes a body having an electrode and thermal control device disposed therein. A plurality of substrate supporting features are formed on an upper surface of the body, each of the substrate supporting features having a substrate supporting surface and a rounded edge.
    Type: Application
    Filed: April 22, 2020
    Publication date: November 19, 2020
    Inventors: Liangfa HU, Abdul Aziz KHAJA, Sarah Michelle BOBEK, Prashant Kumar KULSHRESHTHA, Yoichi SUZUKI
  • Publication number: 20200362457
    Abstract: The present disclosure relates to systems and methods for reducing the formation of hardware residue and minimizing secondary plasma formation during substrate processing in a process chamber. The process chamber may include a gas distribution member configured to flow a first gas into a process volume and generate a plasma therefrom. A second gas is supplied into a lower region of the process volume. Further, an exhaust port is disposed in the lower region to remove excess gases or by-products from the process volume during or after processing.
    Type: Application
    Filed: April 24, 2020
    Publication date: November 19, 2020
    Inventors: Liangfa HU, Prashant Kumar KULSHRESHTHA, Anjana M. PATEL, Abdul Aziz KHAJA, Viren KALSEKAR, Vinay K. PRABHAKAR, Satya Teja Babu THOKACHICHU, Byung Seok KWON, Ratsamee LIMDULPAIBOON, Kwangduk Douglas LEE, Ganesh BALASUBRAMANIAN
  • Publication number: 20200357640
    Abstract: Methods and techniques for deposition of amorphous carbon films on a substrate are provided. In one example, the method includes depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further includes implanting a dopant or the inert species into the amorphous carbon film in a second processing region. The implant species, energy, dose & temperature in some combination may be used to enhance the hardmask hardness. The method further includes patterning the doped amorphous carbon film. The method further includes etching the underlayer.
    Type: Application
    Filed: July 27, 2020
    Publication date: November 12, 2020
    Inventors: Rajesh PRASAD, Sarah BOBEK, Prashant Kumar KULSHRESHTHA, Kwangduk Douglas LEE, Harry WHITESELL, Hidetaka OSHIO, Dong Hyung LEE, Deven Matthew RAJ MITTAL, Scott FALK, Venkataramana R. CHAVVA
  • Publication number: 20200357643
    Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for depositing metal silicide layers on substrates and chamber components. In one embodiment, a method of forming a hardmask includes positioning the substrate having a target layer within a processing chamber, forming a seed layer comprising metal silicide on the target layer and depositing a tungsten-based bulk layer on the seed layer, wherein the metal silicide layer and the tungsten-based bulk layer form the hardmask. In another embodiment, a method of conditioning the components of a plasma processing chamber includes flowing an inert gas comprising argon or helium from a gas applicator into the plasma processing chamber, exposing a substrate support to a plasma within the plasma processing chamber and forming a seasoning layer including metal silicide on an aluminum-based surface of the substrate support.
    Type: Application
    Filed: July 29, 2020
    Publication date: November 12, 2020
    Inventors: Prashant Kumar KULSHRESHTHA, Jiarui WANG, Kwangduk Douglas LEE, Milind GADRE, Xiaoquan MIN, Paul CONNORS
  • Publication number: 20200328066
    Abstract: A system and method for forming a film includes generating a plasma in a processing volume of a processing chamber to form the film on a substrate. The processing chamber may include a gas distributor configured to generate the plasma in the processing volume. Further, a barrier gas is provided into the processing volume to form a gas curtain around a plasma located in the processing volume. The barrier gas is supplied by a gas supply source through an inlet port disposed along a first side of the processing chamber. Further, an exhaust port is disposed along the first side of the processing chamber and the plasma and the barrier gas is purged via the exhaust port.
    Type: Application
    Filed: March 25, 2020
    Publication date: October 15, 2020
    Inventors: Byung Seok KWON, Dong Hyung LEE, Prashant Kumar KULSHRESHTHA, Kwangduk Douglas LEE, Ratsamee LIMDULPAIBOON, Irfan JAMIL, Pyeong Youn ROH, Jun MA, Amit Kumar BANSAL, Tuan Anh NGUYEN, Juan Carlos ROCHA-ALVAREZ
  • Publication number: 20200328063
    Abstract: One or more embodiments described herein generally relate to methods for chucking and de-chucking a substrate to/from an electrostatic chuck used in a semiconductor processing system. Generally, in embodiments described herein, the method includes: (1) applying a first voltage from a direct current (DC) power source to an electrode disposed within a pedestal; (2) introducing process gases into a process chamber; (3) applying power from a radio frequency (RF) power source to a showerhead; (4) performing a process on the substrate; (5) stopping application of the RF power; (6) removing the process gases from the process chamber; and (7) stopping applying the DC power.
    Type: Application
    Filed: April 14, 2020
    Publication date: October 15, 2020
    Inventors: Sarah Michelle BOBEK, Venkata Sharat Chandra PARIMI, Prashant Kumar KULSHRESHTHA, Kwangduk Douglas LEE
  • Publication number: 20200266064
    Abstract: Embodiments of the present disclosure generally relate to a method of processing a substrate. The method includes exposing the substrate positioned in a processing volume of a processing chamber to a hydrocarbon-containing gas mixture, exposing the substrate to a boron-containing gas mixture, and generating a radio frequency (RF) plasma in the processing volume to deposit a boron-carbon film on the substrate. The hydrocarbon-containing gas mixture and the boron-containing gas mixture are flowed into the processing volume at a precursor ratio of (boron-containing gas mixture/((boron-containing gas mixture)+hydrocarbon-containing gas mixture) of about 0.38 to about 0.85. The boron-carbon hardmask film provides high modulus, etch selectivity, and stress for high aspect-ratio features (e.g., 10:1 or above) and smaller dimension devices (e.g., 7 nm node or below).
    Type: Application
    Filed: February 13, 2020
    Publication date: August 20, 2020
    Inventors: Rajaram NARAYANAN, Fang RUAN, Prashant Kumar KULSHRESHTHA, Diwakar N. KEDLAYA, Karthik JANAKIRAMAN
  • Publication number: 20200255940
    Abstract: Implementations of the disclosure generally relate to a method of cleaning a semiconductor processing chamber. In one implementation, a method of cleaning a deposition chamber includes flowing a nitrogen containing gas into a processing region within the deposition chamber, striking a plasma in the processing region utilizing a radio frequency power, introducing a cleaning gas into a remote plasma source that is fluidly connected to the deposition chamber, generating reactive species of the cleaning gas in the remote plasma source, introducing the cleaning gas into the deposition chamber, and removing deposits on interior surfaces of the deposition chamber at different etch rates.
    Type: Application
    Filed: February 7, 2020
    Publication date: August 13, 2020
    Inventors: Byung Seok KWON, Lu XU, Prashant Kumar KULSHRESHTHA, Seoyoung LEE, Dong Hyung LEE, Kwangduk Douglas LEE
  • Publication number: 20200249263
    Abstract: Embodiments described herein relate to methods and tools for monitoring electrostatic chucking performance. A performance test is performed that requires only one bowed substrate and one reference substrate. To run the test, the reference substrate is positioned on an electrostatic chuck in a process chamber and the bowed substrate is positioned on the reference substrate. A voltage is applied from a power source to the electrostatic chuck, generating an electrostatic chucking force to secure the bowed substrate to the reference substrate. Thereafter, the applied voltage is decreased incrementally until the electrostatic chucking force is too weak to maintain the bowed substrate in flat form, resulting in dechucking of the bowed wafer. By monitoring the impedance of the chamber during deposition using a sensor, the dechucking threshold voltage can be identified at the point where the impedance of the reference substrate and the impedance of the bowed substrate deviates.
    Type: Application
    Filed: January 21, 2020
    Publication date: August 6, 2020
    Inventors: Lu XU, Sarah Michelle BOBEK, Prashant Kumar KULSHRESHTHA, Byung Seok KWON, Venkata Sharat Chandra PARIMI, Kwangduk Douglas LEE, Juan Carlos ROCHA-ALVAREZ
  • Patent number: 10734232
    Abstract: Embodiments of the present disclosure generally relate to methods and apparatus for depositing metal silicide layers on substrates and chamber components. In one embodiment, a method of forming a hardmask includes positioning the substrate having a target layer within a processing chamber, forming a seed layer comprising metal silicide on the target layer and depositing a tungsten-based bulk layer on the seed layer, wherein the metal silicide layer and the tungsten-based bulk layer form the hardmask. In another embodiment, a method of conditioning the components of a plasma processing chamber includes flowing an inert gas comprising argon or helium from a gas applicator into the plasma processing chamber, exposing a substrate support to a plasma within the plasma processing chamber and forming a seasoning layer including metal silicide on an aluminum-based surface of the substrate support.
    Type: Grant
    Filed: May 11, 2018
    Date of Patent: August 4, 2020
    Assignee: Applied Materials, Inc.
    Inventors: Prashant Kumar Kulshreshtha, Jiarui Wang, Kwangduk Douglas Lee, Milind Gadre, Xiaoquan Min, Paul Connors
  • Patent number: 10727059
    Abstract: Implementations described herein generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of amorphous carbon films on a substrate. In one implementation, a method of forming an amorphous carbon film is provided. The method comprises depositing an amorphous carbon film on an underlayer positioned on a susceptor in a first processing region. The method further comprises implanting a dopant or inert species into the amorphous carbon film in a second processing region. The dopant or inert species is selected from carbon, boron, nitrogen, silicon, phosphorous, argon, helium, neon, krypton, xenon or combinations thereof. The method further comprises patterning the doped amorphous carbon film. The method further comprises etching the underlayer.
    Type: Grant
    Filed: November 13, 2018
    Date of Patent: July 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Sarah Bobek, Prashant Kumar Kulshreshtha, Rajesh Prasad, Kwangduk Douglas Lee, Harry Whitesell, Hidetaka Oshio, Dong Hyung Lee, Deven Matthew Raj Mittal
  • Publication number: 20200234932
    Abstract: Embodiments of the present disclosure generally relate to a pedestal for increasing temperature uniformity in a substrate supported thereon. The pedestal comprises a body having a heater embedded therein. The body comprises a patterned surface that includes a first region having a first plurality of posts extending from a base surface of the body at a first height, and a second region surrounding the central region having a second plurality of posts extending from the base surface at a second height that is greater than the first height, wherein an upper surface of each of the first plurality of posts and the second plurality of posts are substantially coplanar and define a substrate receiving surface.
    Type: Application
    Filed: December 4, 2019
    Publication date: July 23, 2020
    Inventors: Venkata Sharat Chandra PARIMI, Zubin HUANG, Jian LI, Satish RADHAKRISHNAN, Rui CHENG, Diwakar N. KEDLAYA, Juan Carlos ROCHA-ALVAREZ, Umesh M. KELKAR, Karthik JANAKIRAMAN, Sarah Michelle BOBEK, Prashant Kumar KULSHRESHTHA, Vinay K. PRABHAKAR, Byung Seok KWON
  • Publication number: 20200234982
    Abstract: Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield.
    Type: Application
    Filed: April 2, 2020
    Publication date: July 23, 2020
    Inventors: Saptarshi BASU, Jeongmin LEE, Paul CONNORS, Dale R. DU BOIS, Prashant Kumar KULSHRESHTHA, Karthik Thimmavajjula NARASIMHA, Brett BERENS, Kalyanjit GHOSH, Jianhua ZHOU, Ganesh BALASUBRAMANIAN, Kwangduk Douglas LEE, Juan Carlos ROCHA-ALVAREZ, Hiroyuki OGISO, Liliya KRIVULINA, Rick GILBERT, Mohsin WAQAR, Venkatanarayana SHANKARAMURTHY, Hari K. PONNEKANTI
  • Publication number: 20200224310
    Abstract: Aspects of the present disclosure relate generally to pedestals, components thereof, and methods of using the same for substrate processing chambers. In one implementation, a pedestal for disposition in a substrate processing chamber includes a body. The body includes a support surface. The body also includes a stepped surface that protrudes upwards from the support surface. The stepped surface is disposed about the support surface to surround the support surface. The stepped surface defines an edge ring such that the edge ring is integrated with the pedestal to form the body that is monolithic. The pedestal also includes an electrode disposed in the body, and one or more heaters disposed in the body.
    Type: Application
    Filed: December 16, 2019
    Publication date: July 16, 2020
    Inventors: Sarah Michelle BOBEK, Venkata Sharat Chandra PARIMI, Prashant Kumar KULSHRESHTHA, Vinay K. PRABHAKAR, Kwangduk Douglas LEE, Sungwon HA, Jian LI
  • Patent number: 10679830
    Abstract: Embodiments of the invention generally relate to methods for removing a boron-carbon layer from a surface of a processing chamber using water vapor plasma treatment. In one embodiment, a method for cleaning a surface of a processing chamber includes positioning the pedestal at a first distance from the showerhead, and exposing a deposited boron-carbon layer to a first plasma process where the first plasma process comprises generating a plasma that comprises water vapor and a first carrier gas by biasing a showerhead that is disposed over a pedestal, and positioning the pedestal at a second distance from the showerhead and exposing the deposited boron-carbon layer to a second plasma process where the second plasma process comprises generating a plasma that comprises water vapor and a second carrier gas by biasing the showerhead and biasing a side electrode relative to the showerhead.
    Type: Grant
    Filed: June 16, 2017
    Date of Patent: June 9, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Feng Bi, Prashant Kumar Kulshreshtha, Kwangduk Douglas Lee, Paul Connors
  • Publication number: 20200176296
    Abstract: Aspects of the present disclosure relate to one or more implementations of a substrate support for a processing chamber. In one implementation, a substrate support includes a body having a center, and a support surface on the body configured to at least partially support a substrate. The substrate support includes a first angled wall that extends upward and radially outward from the support surface, and a first upper surface disposed above the support surface. The substrate support also includes a second angled wall that extends upward and radially outward from the first upper surface, the first upper surface extending between the first angled wall and the second angled wall. The substrate support also includes a second upper surface extending from the second angled wall. The second upper surface is disposed above the first upper surface.
    Type: Application
    Filed: November 7, 2019
    Publication date: June 4, 2020
    Inventors: Abdul Aziz KHAJA, Venkata Sharat Chandra PARIMI, Sarah Michelle BOBEK, Prashant Kumar KULSHRESHTHA, Vinay K. PRABHAKAR
  • Publication number: 20200140999
    Abstract: A method of cleaning a component of a semiconductor processing chamber is provided. The method includes exposing residue in a component to a process plasma containing a nitrogen-containing gas and an oxygen-containing gas. The residue in the component undergoes a chemical reaction, cleaning the component. The component is cleaned, restoring the component to the conditions before the process chemistry is run.
    Type: Application
    Filed: November 6, 2018
    Publication date: May 7, 2020
    Inventors: Byung Seok KWON, Prashant Kumar KULSHRESHTHA, Kwangduk LEE, Sarah Michelle BOBEK
  • Patent number: 10636684
    Abstract: Implementations disclosed herein describe a bevel etch apparatus within a loadlock bevel etch chamber and methods of using the same. The bevel etch apparatus has a mask assembly within the loadlock bevel etch chamber. During an etch process, the mask assembly delivers a gas flow to control bevel etch without the use of a shadow frame. As such, the edge exclusion at the bevel edge can be reduced, thus increasing product yield.
    Type: Grant
    Filed: August 14, 2019
    Date of Patent: April 28, 2020
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Saptarshi Basu, Jeongmin Lee, Paul Connors, Dale R. Du Bois, Prashant Kumar Kulshreshtha, Karthik Thimmavajjula Narasimha, Brett Berens, Kalyanjit Ghosh, Jianhua Zhou, Ganesh Balasubramanian, Kwangduk Douglas Lee, Juan Carlos Rocha-Alvarez, Hiroyuki Ogiso, Liliya Krivulina, Rick Gilbert, Mohsin Waqar, Venkatanarayana Shankaramurthy, Hari K. Ponnekanti
  • Patent number: 10504727
    Abstract: Implementations of the present disclosure generally relate to the fabrication of integrated circuits. More particularly, the implementations described herein provide techniques for deposition of thick hardmask films on a substrate. In one implementation, a method of forming a hardmask layer on a substrate is provided. The method comprises applying a chucking voltage to a substrate positioned on an electrostatic chuck in a processing chamber, forming a seed layer comprising boron on a film stack disposed on a substrate by supplying a seed layer gas mixture in the processing chamber while maintaining the chucking voltage, forming a transition layer comprising boron and tungsten on the seed layer by supplying a transition layer gas mixture in the processing chamber and forming a bulk hardmask layer on the transition layer by supplying a main deposition gas mixture in the processing chamber.
    Type: Grant
    Filed: September 5, 2017
    Date of Patent: December 10, 2019
    Assignee: APPLIED MATERIALS, INC.
    Inventors: Jiarui Wang, Prashant Kumar Kulshreshtha, Eswaranand Venkatasubramanian, Susmit Singha Roy, Kwangduk Douglas Lee