Patents by Inventor Pratik Patel

Pratik Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12660304
    Abstract: An integrated circuit (IC) structure, an IC device, an IC device assembly, and a method of forming the same. The IC structure includes a transistor device on a substrate comprising: a gate structure including a metal, the gate structure on a channel structure; a source structure in a first trench at a first side of the gate structure; a drain structure in a second trench at a second side of the gate structure; a capping layer on individual ones of the source structure and of the drain structure. The capping layer comprising a semiconductor material of a same group as a semiconductor material of a corresponding one of the source structure or of the drain structure, wherein an isotope of a p-type dopant in the capping layer represents an atomic percentage of at least about 95% of a p-type isotope content of the capping layer; and metal contact structures coupled to respective ones of the source structure and of the drain structure.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: June 16, 2026
    Assignee: Intel Corporation
    Inventors: Cory C. Bomberger, Nicholas Minutillo, Ryan Cory Haislmaier, Yulia Tolstova, Yoon Jung Chang, Tahir Ghani, Szuya S. Liao, Anand Murthy, Pratik Patel
  • Patent number: 12628818
    Abstract: A transport container and methods for preserving a heart at a hypothermic temperature. The transport container can maintain the heart at a temperature of 6-8° C. for improved results after transplantation. The preservation of the heart within this range can improve transplantation outcomes.
    Type: Grant
    Filed: April 7, 2025
    Date of Patent: May 19, 2026
    Assignee: Paragonix Technologies, Inc.
    Inventors: William Lucas Churchill, Michael Tajima, Ben Bulka, Pratik Patel
  • Publication number: 20260122977
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to integrated circuits utilizing gate plugs to induce compressive channel strain. Other embodiments may be described or claimed.
    Type: Application
    Filed: December 22, 2025
    Publication date: April 30, 2026
    Inventors: Mohammad HASAN, Wonil CHUNG, Biswajeet GUHA, Saptarshi MANDAL, Pratik PATEL, Tahir GHANI, Stephen M. CEA, Anand S. MURTHY
  • Publication number: 20260122990
    Abstract: Gate-all-around integrated circuit structures having necked features, and methods of fabricating gate-all-around integrated circuit structures having necked features, are described. In an example, an integrated circuit structure includes a vertical stack of horizontal nanowires. Each nanowire of the vertical stack of horizontal nanowires has a channel portion with a first vertical thickness and has end portions with a second vertical thickness greater than the first vertical thickness. A gate stack is surrounding the channel portion of each nanowire of the vertical stack of horizontal nanowires.
    Type: Application
    Filed: December 15, 2025
    Publication date: April 30, 2026
    Inventors: Rishabh MEHANDRU, Cory WEBER, Varun MISHRA, Tahir GHANI, Pratik PATEL, Wonil CHUNG, Mohammad HASAN
  • Publication number: 20260083632
    Abstract: A system and method for maintaining an oxygen concentration of a biological sample. The oxygen concentration can be maintained by measuring the oxygen concentration within the biological sample and adjusting a rate of an oxygen supplier in response to this measurement. For example, when the oxygen concentration is below a threshold, oxygen can be delivered to the biological sample at a higher rate.
    Type: Application
    Filed: December 1, 2025
    Publication date: March 26, 2026
    Inventors: Ben Bulka, Arkady Shinder-Lerner, William Lucas Churchill, Michael Tajima, Pratik Patel
  • Publication number: 20260026039
    Abstract: Gate-all-around integrated circuit structures having source or drain structures with regrown central portions, and methods of fabricating gate-all-around integrated circuit structures having source or drain structures with regrown central portions, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires. A gate stack is over the vertical arrangements of nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of nanowires. A second epitaxial source or drain structure is at a second end of the vertical arrangement of nanowires. One or both of the first or second epitaxial source or drain structures has a central portion within an outer portion, and an interface between the central portion and the outer portion.
    Type: Application
    Filed: September 26, 2025
    Publication date: January 22, 2026
    Inventors: Mohammad HASAN, Nitesh KUMAR, Rushabh SHAH, Anand S. MURTHY, Pratik PATEL, Leonard P. GULER, Tahir GHANI
  • Publication number: 20260026332
    Abstract: Integrated circuit structures having recessed self-aligned deep boundary vias are described. For example, an integrated circuit structure includes a plurality of gate lines. A plurality of trench contacts extends over a plurality of source or drain structures, individual ones of the plurality of trench contacts alternating with individual ones of the plurality of gate lines. A backside metal routing layer is extending beneath one or more of the plurality of gate lines and beneath one or more of the plurality of trench contacts. A conductive structure couples the backside metal routing layer to one of the one or more of the plurality of trench contacts. The conductive structure includes a pillar portion in contact with the one of the one or more of the plurality of trench contacts, the pillar portion on a line portion, the line portion in contact with and extending along the backside metal routing layer.
    Type: Application
    Filed: September 26, 2025
    Publication date: January 22, 2026
    Inventors: Mohit HARAN, Sukru YEMENICIOGLU, Pratik PATEL, Charles H. WALLACE, Leonard P. GULER, Conor P. PULS, Makram ABD EL QADER, Tahir GHANI
  • Patent number: 12527078
    Abstract: Gate-all-around integrated circuit structures having epitaxial source or drain region lateral isolation are described. For example, an integrated circuit structure includes a first vertical arrangement of nanowires and a second vertical arrangement of nanowires. A gate stack is over the first and second vertical arrangements of nanowires. First epitaxial source or drain structures are at ends of the first vertical arrangement of nanowires. Second epitaxial source or drain structures are at ends of the second vertical arrangement of nanowires. An intervening dielectric structure is between neighboring ones of the first epitaxial source or drain structures and the second epitaxial source or drain structures. The intervening dielectric structure has a top surface co-planar with a top surface of the gate structure.
    Type: Grant
    Filed: December 21, 2021
    Date of Patent: January 13, 2026
    Assignee: Intel Corporation
    Inventors: Mohammad Hasan, Mohit K. Haran, Leonard P. Guler, Pratik Patel, Tahir Ghani, Anand S. Murthy, Makram Abd El Qader
  • Patent number: 12520573
    Abstract: Integrated circuit structures having source or drain structures with low resistivity are described. In an example, integrated circuit structure includes a fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first source or drain structure includes an epitaxial structure embedded in the fin at the first side of the gate stack. A second source or drain structure includes an epitaxial structure embedded in the fin at the second side of the gate stack. Each epitaxial structure of the first and second source or drain structures include silicon, germanium, gallium and boron. The first and second source or drain structures have a resistivity less than 2E-9 Ohm cm2.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: January 6, 2026
    Assignee: Intel Corporation
    Inventors: Debaleena Nandi, Imola Zigoneanu, Gilbert Dewey, Anant H. Jahagirdar, Harold W. Kennel, Pratik Patel, Anand S. Murthy, Chi-Hing Choi, Mauro J. Kobrinsky, Tahir Ghani
  • Patent number: 12507449
    Abstract: Gate-all-around integrated circuit structures having necked features, and methods of fabricating gate-all-around integrated circuit structures having necked features, are described. In an example, an integrated circuit structure includes a vertical stack of horizontal nanowires. Each nanowire of the vertical stack of horizontal nanowires has a channel portion with a first vertical thickness and has end portions with a second vertical thickness greater than the first vertical thickness. A gate stack is surrounding the channel portion of each nanowire of the vertical stack of horizontal nanowires.
    Type: Grant
    Filed: March 21, 2022
    Date of Patent: December 23, 2025
    Assignee: Intel Corporation
    Inventors: Rishabh Mehandru, Cory Weber, Varun Mishra, Tahir Ghani, Pratik Patel, Wonil Chung, Mohammad Hasan
  • Patent number: 12485064
    Abstract: A system and method for maintaining an oxygen concentration of a biological sample. The oxygen concentration can be maintained by measuring the oxygen concentration within the biological sample and adjusting a rate of an oxygen supplier in response to this measurement. For example, when the oxygen concentration is below a threshold, oxygen can be delivered to the biological sample at a higher rate.
    Type: Grant
    Filed: August 23, 2024
    Date of Patent: December 2, 2025
    Assignee: Paragonix Technologies, Inc.
    Inventors: Ben Bulka, Arkady Shinder-Lerner, William Lucas Churchill, Michael Tajima, Pratik Patel
  • Patent number: 12469780
    Abstract: Integrated circuit structures having recessed self-aligned deep boundary vias are described. For example, an integrated circuit structure includes a plurality of gate lines. A plurality of trench contacts extends over a plurality of source or drain structures, individual ones of the plurality of trench contacts alternating with individual ones of the plurality of gate lines. A backside metal routing layer is extending beneath one or more of the plurality of gate lines and beneath one or more of the plurality of trench contacts. A conductive structure couples the backside metal routing layer to one of the one or more of the plurality of trench contacts. The conductive structure includes a pillar portion in contact with the one of the one or more of the plurality of trench contacts, the pillar portion on a line portion, the line portion in contact with and extending along the backside metal routing layer.
    Type: Grant
    Filed: June 27, 2022
    Date of Patent: November 11, 2025
    Assignee: Intel Corporation
    Inventors: Mohit Haran, Sukru Yemenicioglu, Pratik Patel, Charles H. Wallace, Leonard P. Guler, Conor P. Puls, Makram Abd El Qader, Tahir Ghani
  • Publication number: 20250339335
    Abstract: Systems and methods herein generally relate to prolonging viability of bodily tissue, especially an organ, by adjusting pressure as needed to maintain a constant pressure within the organ even during external pressure fluctuations due, for example, to transportation of the organ in an airplane. The systems and methods herein can include an electronic pump that pumps gas into an organ and a mechanical pressure regulator to release gas based on organ pressure.
    Type: Application
    Filed: July 14, 2025
    Publication date: November 6, 2025
    Inventors: Ben Bulka, Arkady Shinder-Lerner, William Lucas Churchill, Michael Tajima, Pratik Patel
  • Publication number: 20250311717
    Abstract: A transport container and methods for preserving a heart at a hypothermic temperature. The transport container can maintain the heart at a temperature of 6-8° C. for improved results after transplantation. The preservation of the heart within this range can improve transplantation outcomes.
    Type: Application
    Filed: April 7, 2025
    Publication date: October 9, 2025
    Inventors: William Lucas Churchill, Michael Tajima, Ben Bulka, Pratik Patel
  • Publication number: 20250311718
    Abstract: Systems and methods for cooling an organ to an individualized temperature based on organ parameters. A transport container can store the organ at a target temperature determined based on characteristics of the organ and the donor. A processor can determine the target temperature for preservation of the organ. The determination may be based on preservation time, the type of the organ, the age of the donor, the circulatory condition of the donor, the brain condition of the donor, and the metabolic rate of the donor.
    Type: Application
    Filed: April 7, 2025
    Publication date: October 9, 2025
    Inventors: William Lucas Churchill, Michael Tajima, Ben Bulka, Pratik Patel
  • Publication number: 20250311719
    Abstract: Systems and methods for cooling a biological sample with different temperature cooling blocks. Warmer cooling blocks can be placed around a container and cooler cooling blocks can be placed above the container. The biological sample can be a pancreas, heart or other organs. The method and system can rely on convection, or gravity-based fluid movement, to make the temperature within the container consistent.
    Type: Application
    Filed: April 7, 2025
    Publication date: October 9, 2025
    Inventors: William Lucas Churchill, Michael Tajima, Ben Bulka, Pratik Patel
  • Patent number: 12426299
    Abstract: Fin shaping, and integrated circuit structures resulting therefrom, are described. For example, an integrated circuit structure includes a semiconductor fin having a protruding fin portion above an isolation structure above a substrate. The protruding fin portion has substantially vertical upper sidewalls and outwardly tapered lower sidewalls. A gate stack is over and conformal with the protruding fin portion of the semiconductor fin. A first source or drain region is at a first side of the gate stack, and a second source or drain region is at a second side of the gate stack opposite the first side of the gate stack.
    Type: Grant
    Filed: December 23, 2022
    Date of Patent: September 23, 2025
    Assignee: Intel Corporation
    Inventors: Szuya S. Liao, Rahul Pandey, Rishabh Mehandru, Anupama Bowonder, Pratik Patel
  • Patent number: 12357533
    Abstract: Systems and methods herein generally relate to prolonging viability of bodily tissue, especially an organ, by adjusting pressure as needed to maintain a constant pressure within the organ even during external pressure fluctuations due, for example, to transportation of the organ in an airplane. The systems and methods herein can include an electronic pump that pumps gas into an organ and a mechanical pressure regulator to release gas based on organ pressure.
    Type: Grant
    Filed: August 23, 2024
    Date of Patent: July 15, 2025
    Assignee: Paragonix Technologies, Inc.
    Inventors: Ben Bulka, Arkady Shinder-Lerner, William Lucas Churchill, Michael Tajima, Pratik Patel
  • Publication number: 20250223279
    Abstract: The present invention relates to a process for the preparation of belumosudil mesylate and its crystalline form. Further, the present invention relates to a pharmaceutical composition comprising a therapeutically effective amount of the crystalline form of belumosudil mesylate obtained by the process of the present invention.
    Type: Application
    Filed: March 30, 2023
    Publication date: July 10, 2025
    Inventors: Venkata Raghavendra Acharyulu PALLE, Pratik PATEL, Gaurav KUMAR, Subbiah RAMAR, Datta SWARUP, Rajendra JAGDHANE, Navnath GUNJAL, Kotaiah CHAPALA
  • Publication number: 20250204518
    Abstract: Systems and methods are provided herein for transporting a biological sample. Systems and methods provided herein also include providing electrical monitoring of the donor tissue to track electrical activity during transportation. A potential QRS-like wave can be detected even in resting heart tissue to determine viability.
    Type: Application
    Filed: February 26, 2025
    Publication date: June 26, 2025
    Inventor: Pratik Patel