Patents by Inventor Pratik Patel

Pratik Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230207560
    Abstract: An integrated circuit (IC) structure, an IC device, an IC device assembly, and a method of forming the same. The IC structure includes a transistor device on a substrate comprising: a gate structure including a metal, the gate structure on a channel structure; a source structure in a first trench at a first side of the gate structure; a drain structure in a second trench at a second side of the gate structure; a capping layer on individual ones of the source structure and of the drain structure. The capping layer comprising a semiconductor material of a same group as a semiconductor material of a corresponding one of the source structure or of the drain structure, wherein an isotope of a p-type dopant in the capping layer represents an atomic percentage of at least about 95% of a p-type isotope content of the capping layer; and metal contact structures coupled to respective ones of the source structure and of the drain structure.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Applicant: Intel Corporation
    Inventors: Cory C. Bomberger, Nicholas Minutillo, Ryan Cory Haislmaier, Yulia Tolstova, Yoon Jung Chang, Tahir Ghani, Szuya S. Liao, Anand Murthy, Pratik Patel
  • Publication number: 20230207696
    Abstract: Embodiments of the disclosure are directed to advanced integrated circuit structure fabrication and, in particular, to integrated circuits utilizing gate plugs to induce compressive channel strain. Other embodiments may be described or claimed.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Mohammad HASAN, Wonil CHUNG, Biswajeet GUHA, Saptarshi MANDAL, Pratik PATEL, Tahir GHANI, Stephen M. CEA, Anand S. MURTHY
  • Publication number: 20230207651
    Abstract: Gate-all-around integrated circuit structures having source or drain structures with substrate connection portions, and methods of fabricating gate-all-around integrated circuit structures having source or drain structures with substrate connection portions, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires. A gate stack is over the vertical arrangements of nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of nanowires. A second epitaxial source or drain structure is at a second end of the vertical arrangement of nanowires. One or both of the first or second epitaxial source or drain structures has an upper portion and a lower epitaxial extension portion.
    Type: Application
    Filed: December 23, 2021
    Publication date: June 29, 2023
    Inventors: Mohammad HASAN, Nitesh KUMAR, Rushabh SHAH, Anand S. MURTHY, Pratik PATEL, Tahir GHANI, Tricia MEYER, Cory BOMBERGER, Glenn A. GLASS, Stephen M. CEA, Anant H. JAHAGIRDAR
  • Publication number: 20230197714
    Abstract: Gate-all-around integrated circuit structures having backside contact self-aligned to epitaxial source or drain region are described. For example, an integrated circuit structure includes a first vertical arrangement of nanowires and a second vertical arrangement of nanowires. A gate stack is over the first and second vertical arrangements of nanowires. First epitaxial source or drain structures are at ends of the first vertical arrangement of nanowires. Second epitaxial source or drain structures are at ends of the second vertical arrangement of nanowires. A conductive structure is vertically beneath and in contact with one of the first epitaxial source or drain structures.
    Type: Application
    Filed: December 20, 2021
    Publication date: June 22, 2023
    Inventors: Guillaume BOUCHE, Aryan NAVABI-SHIRAZI, Andy Chih-Hung WEI, Mauro J. KOBRINSKY, Shaun MILLS, Pratik PATEL
  • Publication number: 20230197855
    Abstract: Gate-all-around integrated circuit structures having source or drain structures with regrown central portions, and methods of fabricating gate-all-around integrated circuit structures having source or drain structures with regrown central portions, are described. For example, an integrated circuit structure includes a vertical arrangement of nanowires. A gate stack is over the vertical arrangements of nanowires. A first epitaxial source or drain structure is at a first end of the vertical arrangement of nanowires. A second epitaxial source or drain structure is at a second end of the vertical arrangement of nanowires. One or both of the first or second epitaxial source or drain structures has a central portion within an outer portion, and an interface between the central portion and the outer portion.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: Mohammad HASAN, Nitesh KUMAR, Rushabh SHAH, Anand S. MURTHY, Pratik PATEL, Leonard P. GULER, Tahir GHANI
  • Publication number: 20230197838
    Abstract: Gate-all-around integrated circuit structures having source or drain-last structures, and methods of fabricating gate-all-around integrated circuit structures having source or drain-last structures, are described. For example, a method of fabricating an integrated circuit structure includes forming a vertical arrangement of nanowires. A permanent gate stack is then formed over the vertical arrangements of nanowires. The permanent gate stack includes a high-k gate dielectric layer and a metal gate electrode. Subsequent to forming the permanent gate stack, a first epitaxial source or drain structure is formed at a first end of the vertical arrangement of nanowires, and a second epitaxial source or drain structure is formed at a second end of the vertical arrangement of nanowires.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: Mohammad HASAN, Leonard P. GULER, Anand S. Murthy, Pratik PATEL, Tahir GHANI
  • Publication number: 20230197290
    Abstract: A system configured to receive health data pertaining to a user; select a user health profile from a plurality of user health profiles based on the collected health data, each of the plurality of user health profiles being associated with a health and wellness program and a set of interventions; receive user activity data and updated health data pertaining to, or during the user's participation in the associated health and wellness program from health devices; select a new set of interventions based on the user activity data; and select a new user health profile from the plurality of user health profiles based on at least one of the user activity data and the updated health data.
    Type: Application
    Filed: February 9, 2023
    Publication date: June 22, 2023
    Inventors: Samir B. DAMANI, Vincent VALENTINO, Pratik PATEL
  • Publication number: 20230197722
    Abstract: Gate-all-around integrated circuit structures having epitaxial source or drain region lateral isolation are described. For example, an integrated circuit structure includes a first vertical arrangement of nanowires and a second vertical arrangement of nanowires. A gate stack is over the first and second vertical arrangements of nanowires. First epitaxial source or drain structures are at ends of the first vertical arrangement of nanowires. Second epitaxial source or drain structures are at ends of the second vertical arrangement of nanowires. An intervening dielectric structure is between neighboring ones of the first epitaxial source or drain structures and the second epitaxial source or drain structures. The intervening dielectric structure has a top surface co-planar with a top surface of the gate structure.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 22, 2023
    Inventors: Mohammad HASAN, Mohit K. HARAN, Leonard P. GULER, Pratik PATEL, Tahir GHANI, Anand S. MURTHY, Makram ABD EL QADER
  • Patent number: 11645629
    Abstract: Technologies for providing real-time visualizations of a behavior of an autonomous vehicle (AV) associated with a ride request. In some examples, a method for providing real-time visualizations of a behavior of an AV associated with a ride request can include receiving a user request for a ride from an AV, wherein the user request specifies a pick-up location associated with a user; receiving sensor data from one or more sensors associated with the AV; determining, based on the sensor data, a state and context of the AV while the AV is en route to the pick-up location; and presenting, at a display interface, a map depicting one or more visual indicators of the state and context of the AV, the state and context of the AV including a location of the AV and one or more AV operations.
    Type: Grant
    Filed: September 12, 2019
    Date of Patent: May 9, 2023
    Assignee: GM Cruise Holdings LLC.
    Inventors: Jessica Leary, Jonathon Staff, John Logan Anderson, Max Meyers, Pratik Patel, Robin Yang, Bradley Ryan, Josh Berlin, Teresa Lin, Stanley Shiao, Michael Magnoli, Chau-Yan Wang, Christopher Fry
  • Publication number: 20230131126
    Abstract: Fin shaping, and integrated circuit structures resulting therefrom, are described. For example, an integrated circuit structure includes a semiconductor fin having a protruding fin portion above an isolation structure above a substrate. The protruding fin portion has substantially vertical upper sidewalls and outwardly tapered lower sidewalls. A gate stack is over and conformal with the protruding fin portion of the semiconductor fin. A first source or drain region is at a first side of the gate stack, and a second source or drain region is at a second side of the gate stack opposite the first side of the gate stack.
    Type: Application
    Filed: December 23, 2022
    Publication date: April 27, 2023
    Inventors: Szuya S. LIAO, Rahul PANDEY, Rishabh MEHANDRU, Anupama BOWONDER, Pratik PATEL
  • Publication number: 20230095191
    Abstract: Methods, transistors, and systems are discussed related to anisotropically etching back deposited epitaxial source and drain semiconductor materials for reduced lateral source and drain spans in the fabricated transistors. Such lateral width reduction of the source and drain materials enables improved transistor scaling and perturbation reduction in the resultant source and drain semiconductor materials.
    Type: Application
    Filed: September 24, 2021
    Publication date: March 30, 2023
    Applicant: Intel Corporation
    Inventors: Koustav Ganguly, Ryan Keech, Anand Murthy, Mohammad Hasan, Pratik Patel, Tahir Ghani, Subrina Rafique
  • Patent number: 11610691
    Abstract: A system configured to receive health data pertaining to a user; select a user health profile from a plurality of user health profiles based on the collected health data, each of the plurality of user health profiles being associated with a health and wellness program and a set of interventions; receive user activity data and updated health data pertaining to, or during the user's participation in the associated health and wellness program from health devices; select a new set of interventions based on the user activity data; and select a new user health profile from the plurality of user health profiles based on at least one of the user activity data and the updated health data.
    Type: Grant
    Filed: April 1, 2016
    Date of Patent: March 21, 2023
    Assignee: MD REVOLUTION, INC.
    Inventors: Samir B. Damani, Vincent Valentino, Pratik Patel
  • Publication number: 20220006459
    Abstract: A detection circuit includes a tunable delay circuit that generates a delayed signal and that receives a supply voltage. The detection circuit includes a control circuit that adjusts a delay provided by the tunable delay circuit to the delayed signal. The detection circuit includes a time-to-digital converter circuit that converts the delay provided by the tunable delay circuit to the delayed signal to a digital code and adjusts the digital code based on changes in the supply voltage. The control circuit causes the tunable delay circuit to maintain the delay provided to the delayed signal constant in response to the digital code reaching an alignment value. The detection circuit may continuously monitor timing margin of a data signal relative to a clock signal and update the digital code in every clock cycle. The detection circuit may be a security sensor that detects changes in the supply voltage.
    Type: Application
    Filed: September 20, 2021
    Publication date: January 6, 2022
    Applicant: Intel Corporation
    Inventors: Miguel Bautista Gabriel, Sriram Vangal, Patrick Koeberl, Pratik Patel, Muhammad Khellah, James Tschanz, Carlos Tokunaga, Suyoung Bang
  • Publication number: 20210407851
    Abstract: Integrated circuit structures having source or drain structures with a high germanium concentration capping layer are described. In an example, an integrated circuit structure includes source or drain structures including an epitaxial structure embedded in a fin at a side of a gate stack. The epitaxial structure has a lower semiconductor layer and a capping semiconductor layer on the lower semiconductor layer with an abrupt interface between the capping semiconductor layer and the lower semiconductor layer. The lower semiconductor layer includes silicon, germanium and boron, the germanium having an atomic concentration of less than 40% at the abrupt interface. The capping semiconductor layer includes silicon, germanium and boron, the germanium having an atomic concentration of greater than 50% at the abrupt interface and throughout the capping semiconductor layer.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Inventors: Cory BOMBERGER, Suresh VISHWANATH, Yulia TOLSTOVA, Pratik PATEL, Szuya S. LIAO, Anand S. MURTHY
  • Publication number: 20210408275
    Abstract: Integrated circuit structures having high surface germanium concentrations are described. In an example, an integrated circuit structure includes a fin having a lower fin portion and an upper fin portion. A gate stack is over the upper fin portion of the fin, the gate stack having a first side opposite a second side. A first source or drain structure has an epitaxial structure embedded in the fin at the first side of the gate stack. A second source or drain structure has an epitaxial structure embedded in the fin at the second side of the gate stack. Each of the epitaxial structures of the first and second source or drain structures includes silicon, germanium and boron, the germanium having an atomic concentration of greater than 55% at a top surface of each of the epitaxial structures of the first and second source or drain structures.
    Type: Application
    Filed: June 26, 2020
    Publication date: December 30, 2021
    Inventors: Cory BOMBERGER, Suresh VISHWANATH, Pratik PATEL, Szuya S. LIAO, Anand S. MURTHY
  • Patent number: 11090354
    Abstract: The present invention provides compositions and methods for treatment of metabolic syndromes. Namely, the presently disclosed compositions and methods are provided for affecting the function of the gastrointestinal endocrine system in key regions of the gut, thereby, producing therapeutic effects on obesity, diabetes and other metabolic disorders. The compositions include components for forming luminal barriers within the gastrointestinal tract of a subject where the barrier is created in-situ via interaction of resident mucin with the mucin-interacting agent.
    Type: Grant
    Filed: August 5, 2016
    Date of Patent: August 17, 2021
    Assignee: The Johns Hopkins University
    Inventors: Thomas Jozefiak, Michael Parlato, Pratik Patel, Kevin Colbert, Ashish Nimgaonkar, Pankaj Pasricha
  • Patent number: 11081238
    Abstract: User-specific medical, genetic, fitness, environmental and nutritional data is collected to develop personalized health and wellness programs for improving a user's health and wellness. The user-specific data may be collected from medical or genetic tests, mobile health devices worn by the user and applications through which the user manually inputs information. The user-specific data is then collected and analyzed together based on knowledge of the interrelationships between medical, genetic, fitness, environmental and nutrition data to develop a comprehensive user profile and personalized health and wellness programs that are targeted to improving specific areas of the user's health by implementing changes in fitness, nutrition, medical treatment, environment, etc.
    Type: Grant
    Filed: December 20, 2017
    Date of Patent: August 3, 2021
    Assignee: MD REVOLUTION, INC.
    Inventors: Samir B. Damani, Vincent Valentino, Pratik Patel
  • Publication number: 20210167209
    Abstract: Fin shaping, and integrated circuit structures resulting therefrom, are described. For example, an integrated circuit structure includes a semiconductor fin having a protruding fin portion above an isolation structure above a substrate. The protruding fin portion has substantially vertical upper sidewalls and outwardly tapered lower sidewalls. A gate stack is over and conformal with the protruding fin portion of the semiconductor fin. A first source or drain region is at a first side of the gate stack, and a second source or drain region is at a second side of the gate stack opposite the first side of the gate stack.
    Type: Application
    Filed: December 2, 2019
    Publication date: June 3, 2021
    Inventors: Szuya S. LIAO, Rahul PANDEY, Rishabh MEHANDRU, Anupama BOWONDER, Pratik PATEL
  • Publication number: 20210097866
    Abstract: Technologies for providing augmented reality wayfinding experiences in ridesharing applications are provided. In some examples, a method for providing augmented reality wayfinding experiences can include determining a first location of an autonomous vehicle (AV) relative to a second location of a client device associated with a user that requested a ride from the AV; based on the first location of the AV relative to the second location of the client device, determining a direction from the second location of the client device to the first location of the AV; presenting, at the client device, a feed from a camera sensor associated with the client device, the feed including a local scene captured by the camera sensor; and presenting a virtual content overlay on the feed, the virtual content overlay including an indication of the direction from the second location of the client device to the first location of the AV.
    Type: Application
    Filed: September 30, 2019
    Publication date: April 1, 2021
    Inventors: Jessica LEARY, Jonathon STAFF, Pratik PATEL, Bradley RYAN, Josh BERLIN, John Logan ANDERSON, Michael MAGNOLI, Stanley SHIAO
  • Publication number: 20210080279
    Abstract: Technologies for providing real-time visualizations of a behavior of an autonomous vehicle (AV) associated with a ride request. In some examples, a method for providing real-time visualizations of a behavior of an AV associated with a ride request can include receiving a user request for a ride from an AV, wherein the user request specifies a pick-up location associated with a user; receiving sensor data from one or more sensors associated with the AV; determining, based on the sensor data, a state and context of the AV while the AV is en route to the pick-up location; and presenting, at a display interface, a map depicting one or more visual indicators of the state and context of the AV, the state and context of the AV including a location of the AV and one or more AV operations.
    Type: Application
    Filed: September 12, 2019
    Publication date: March 18, 2021
    Inventors: Jessica LEARY, Jonathon STAFF, John Logan Anderson, Max MEYERS, Pratik PATEL, Robin YANG, Bradley RYAN, Josh BERLIN, Teresa LIN, Stanley SHIAO, Michael MAGNOLI, Chau-Yan WANG, Christopher FRY