Patents by Inventor Pravin Patel

Pravin Patel has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20080301347
    Abstract: A system for allowing a designer to implement Universal Serial Bus (USB) 2.0 in topologies not anticipated by a USB 2.0 specification and with reduced channel losses, the system comprising: a bus channel having a plurality of electrical elements; and a boost circuit connected at a predetermined location on the bus channel; a plurality of USB signals transmitted through the system; wherein edges of the plurality of USB signals are boosted without impacting the bi-directional nature of the bus channel.
    Type: Application
    Filed: June 1, 2007
    Publication date: December 4, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Justin P. Bandholz, Robert J. Christopher, Joseph M. Jacobs, Pravin Patel
  • Publication number: 20080301352
    Abstract: A system and method for implementing a bus. In one embodiment, the system includes a bus switch operative to couple to a bus, and a plurality of trace segments coupled to the bus switch, where the trace segments have different lengths. The bus switch is operative to connect one of the trace segments to the bus based on at least one system requirement, and the selected trace segment cancels signal reflections on the bus.
    Type: Application
    Filed: June 4, 2007
    Publication date: December 4, 2008
    Applicant: International Business Machines Corporation
    Inventors: P. Maurice Bland, Moises Cases, Jonathan R. Hinkle, Pravin Patel, Nam H. Pham
  • Publication number: 20080278207
    Abstract: Embodiments of the invention address deficiencies of the art in respect to digital signal transmissions and provide a novel and non-obvious fall time accelerator circuit for use in a USB interface. In one embodiment of the invention, the USB interface can include a USB port driver coupled to a host controller driver over a USB bus. The USB interface also can include a fall time accelerator circuit coupled to the USB bus between the USB port driver and the host controller driver. The fall time accelerator circuit can include a pulse signal generator coupled to an inbound signal path from the USB bus and arranged to generate a tunable pulse upon detecting a falling edge of a digital signal on the inbound signal path. The circuit further can include an active timer additionally coupled to the inbound signal path to hold the tunable pulse for a set period of time.
    Type: Application
    Filed: May 9, 2007
    Publication date: November 13, 2008
    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Henry G. McMillan, Pravin Patel, Challis L. Purrington, Gwendolyn R. Tobin, Christopher C. West, Ivan R. Zapata
  • Publication number: 20080188095
    Abstract: Connector and methods of connector design and manufacture are disclosed for achieving a desired phase relationship between signals carried along conductors of different lengths, while maintaining a desired impedance of the conductors. In one embodiment, a PCB connector includes a first plurality of electronic terminals and a second plurality of electronic terminals disposed on a connector body. A substrate has a dielectric constant that varies with location within the substrate. A first electronic conductor follows a first pathway within the substrate to experience a first effective dielectric constant. A second electronic conductor follows a second pathway within the substrate to experience a second effective dielectric constant. The first electronic conductor is longer than the second electronic conductor and the first effective dielectric constant is less than the second effective dielectric constant, to at least reduce phase error between signals.
    Type: Application
    Filed: February 1, 2007
    Publication date: August 7, 2008
    Inventors: Robert Joseph Christopher, Pravin Patel, Tony Carl Sass
  • Publication number: 20080084679
    Abstract: Printed circuit boards for countering signal distortion are disclosed that include: a conductive pathway on a printed circuit board between a transmitter and a receiver, the conductive pathway comprised of traces and vias connected together for conductive transfer of a signal from the transmitter to the receiver; a parasitic element on the printed circuit board, the parasitic element having a parasitic effect that distorts the signal; and one or more passive elements mounted adjacent to the conductive pathway without connecting to the conductive pathway, the passive elements having a corrective effect to reduce the distortion from the parasitic effect on the signal.
    Type: Application
    Filed: October 10, 2006
    Publication date: April 10, 2008
    Inventors: Brian A. Baker, James E. Hughes, Thomas D. Pahel, Pravin Patel, Challis L. Purrington, Christopher C. West
  • Publication number: 20070257699
    Abstract: A multi-memory module circuit topology is disclosed that includes a memory controller, a plurality of memory modules connected to the memory controller through a memory bus, and a resonator connected to the plurality of memory modules in a starburst topology. A method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing a plurality of memory modules connected to a memory controller through a memory bus, selecting a starburst topology, and connecting a resonator to the plurality of memory module in dependence upon the selected starburst topology. An additional method for reducing impedance discontinuities in a multi-memory module circuit is disclosed that includes providing by a resonator a predetermined discontinuity reducing impedance at a predetermined location in the multi-memory module circuit between at least two memory modules, the multi-memory module circuit having a plurality of components of logically arranged around the predetermined location.
    Type: Application
    Filed: April 20, 2006
    Publication date: November 8, 2007
    Inventors: Moises Cases, Daniel De Araujo, Erdem Matoglu, Pravin Patel, Nam Pham
  • Publication number: 20070178289
    Abstract: An electronic system includes a circuit board formed from a composite material. The composite material includes fibers embedded within a substrate and the fibers are oriented substantially orthogonal to one another. A plurality of traces are formed on the board, and the plurality of traces are oriented relative to at least one of the fibers at an angle between about 17.5° and about 27.5° or between about 20.0° and about 25.0°. A pair of the traces are oriented substantially orthogonal to one another, and a pair of the traces are oriented relative to one another at an angle of about 45.0°. The fibers are fiberglass, and the substrate is an epoxy resin. The fibers have a different dielectric constant than the substrate.
    Type: Application
    Filed: January 27, 2006
    Publication date: August 2, 2007
    Applicant: International Business Machines Corporation
    Inventors: Moises Cases, Daniel N. de Araujo, Bradley D. Herrman, Erdem Matoglu, Pravin Patel, Nam H. Pham, Joffre A. Ratcliffe
  • Publication number: 20060205703
    Abstract: Stabilized, 17-substituted hydrocortisone containing compositions and methods of manufacture are disclosed. Isomerization of the hydrocortisone component of topical steroid compositions is markedly reduced by including an omega-6 acid component in the form of a free acid or as a compound such as an ester. Specifically disclosed are methods for preventing the isomerization of hydrocortisone 17-butyrate into hydrocortisone 21-butyrate through the use of safflower oil.
    Type: Application
    Filed: May 11, 2006
    Publication date: September 14, 2006
    Inventor: Pravin Patel
  • Publication number: 20060170473
    Abstract: A method and apparatus independently controls the increasing rate and the decreasing rate a P-channel power FET and an N-channel power FET driving an inductive load. Circuits inhibit turning ON the P-channel FET until the voltage on the gate of the N-channel FET falls below its turn-on voltage threshold, and turning ON the N-channel FET until the voltage on the gate of the P-channel FET falls below its turn-on voltage threshold.
    Type: Application
    Filed: January 31, 2006
    Publication date: August 3, 2006
    Inventors: Jim Childers, Pravin Patel
  • Patent number: 4901280
    Abstract: A circuit for assisting the charging of a line conductor having a distributed resistance and capacitance, such as a word line in a semiconductor memory device, is disclosed. In the conventional memory device, a driver circuit is disposed at one end of a word line, with a circuit for holding unselected word lines at the discharged voltage being disposed at the end of the word line opposite from the drive circuit. The invention is directed towards a pull-up circuit being disposed at the end of the word line opposite the driver circuit, the pull-up circuit having a transistor which is precharged to a high voltage prior to the active cycle. The precharged transistor is discharged as the selected word line is charged by the driver circuit, causing a driving node in the circuit to be connected to a high supply voltage.
    Type: Grant
    Filed: April 19, 1989
    Date of Patent: February 13, 1990
    Assignee: Texas Instruments Incorporated
    Inventor: Pravin Patel
  • Patent number: 3932576
    Abstract: In melt spinning, in order to permit high rates of spinning without deterioration in yarn quality, the area in which the filaments enter the quench bath is partially surrounded by baffle means and at at least two symmetrical locations about the periphery of that area wetting agent is introduced into the area.
    Type: Grant
    Filed: December 23, 1974
    Date of Patent: January 13, 1976
    Assignee: Concorde Fibers, Inc.
    Inventor: Pravin Patel