Patents by Inventor Pu Wang

Pu Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250149401
    Abstract: A manufacturing method of a package structure includes: forming a first package component, where the first package component includes a first insulating encapsulation laterally covering semiconductor dies and a redistribution structure formed on the first insulating encapsulation and the semiconductor dies; coupling the first package component to a second package component; forming an underfill layer between the first and second package component, where the underfill layer extends to cover a sidewall of the first package component; forming a metallic layer on opposing surfaces of the semiconductor dies and the first insulating encapsulation by using a jig, where a window of the jig accessibly exposes the opposing surfaces of the semiconductor dies and the first insulating encapsulation, and a peripheral region of the opposing surface of the first insulating encapsulation is shielded by the jig.
    Type: Application
    Filed: January 9, 2025
    Publication date: May 8, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Patent number: 12278162
    Abstract: A method includes bonding a first package and a second package over a package component, adhering a first Thermal Interface Material (TIM) and a second TIM over the first package and the second package, respectively, dispensing an adhesive feature on the package component, and placing a heat sink over and contacting the adhesive feature. The heat sink includes a portion over the first TIM and the second TIM. The adhesive feature is then cured.
    Type: Grant
    Filed: August 7, 2023
    Date of Patent: April 15, 2025
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Yu-Hsun Wang, Ping-Yin Hsieh, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 12266633
    Abstract: A semiconductor structure includes a first semiconductor package, a second semiconductor package, a heat spreader and an dielectric layer. The first semiconductor package includes a plurality of first semiconductor chips and a first dielectric encapsulation layer disposed around the plurality of the first semiconductor chips. The second semiconductor package is disposed over and corresponds to one of the plurality of first semiconductor chips, wherein the second semiconductor package includes a plurality of second semiconductor chips and a second dielectric encapsulation layer disposed around the plurality of second semiconductor chips. The heat spreader is disposed over and corresponds to another of the plurality of first semiconductor chips. The dielectric layer is disposed over the first semiconductor package and around the second semiconductor package and the heat spreader.
    Type: Grant
    Filed: July 12, 2023
    Date of Patent: April 1, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Chien Pan, Pu Wang, Li-Hui Cheng, An-Jhih Su, Szu-Wei Lu
  • Publication number: 20250105086
    Abstract: Various embodiments include integrated circuit packages and methods of forming integrated circuit packages. In an embodiment, a device includes: a package substrate; an integrated circuit device attached to the package substrate; a stiffener ring around the integrated circuit device and attached to the package substrate; a lid attached to the stiffener ring; a channel connected to an area between the lid and the integrated circuit device, the channel extending along at least one side of the integrated circuit device in a top-down view; and a thermal interface material in the channel and in the area between the lid and the integrated circuit device.
    Type: Application
    Filed: September 21, 2023
    Publication date: March 27, 2025
    Inventors: Chun-Yen Lan, Chih-Chien Pan, Pu Wang, Li-Hui Cheng, Ying-Ching Shih
  • Publication number: 20250086814
    Abstract: A method of image reconstruction of a structure of a scene comprises collecting measurements of intensities of a wave over a period of time. The intensities of the wave are modified by propagation of the wave in the scene. The method also comprises collecting depth information indicative of the structure of the scene at different values of depth of the scene. The different values of depth correlate with different time segments forming the period of time. The method also comprises processing the measurements with a guided recurrent neural network to sequentially learn features of the structure of the scene using the depth information as a guidance and rendering one or multiple images indicative of the features of the structure learned by the recurrent neural network.
    Type: Application
    Filed: September 13, 2023
    Publication date: March 13, 2025
    Applicant: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Pu Wang, Toshiaki Koike-Akino, Petros Boufounos, Wataru Tsujita
  • Patent number: 12248054
    Abstract: The present disclosure provides a multiple-input multiple-output (MIMO) radar system and a method for detecting an object in a scene. The method comprises transmitting frequency modulated continuous wave (FMCW) in a radio frequency (RF) band, and collecting radar measurements of the scene sampled in a time-frequency domain within an intermediate frequency (IF) bandwidth. The method further comprises transforming the radar measurements into range-doppler space to produce measurements of different segments of the scene for different range-doppler bins formed by intersections of different range bins with different Doppler bins, classifying a presence of the hypothetical transmitter at different segments of the scene according to a signal model with an internal classification, combining the results of the classification to produce parameters of the object, and outputting the parameters of the object.
    Type: Grant
    Filed: August 30, 2022
    Date of Patent: March 11, 2025
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Pu Wang, Sian Jin, Petros Boufounos, Philip Orlik
  • Publication number: 20250054900
    Abstract: A package structure includes a circuit substrate, a package unit, a thermal interface material and a cover. The package unit is disposed on and electrically connected with the circuit substrate. The package unit includes a first surface facing the circuit substrate and a second surface opposite to the first surface. A underfill is disposed between the package unit and the circuit substrate, surrounding the package unit and partially covering sidewalls of the package unit. The cover is disposed over the package unit and over the circuit substrate. An adhesive is disposed on the circuit substrate and between the cover and the circuit substrate. The thermal interface material includes a metal-type thermal interface material and is disposed between the cover and the package unit. The thermal interface material physically contacts the second surface and the sidewalls of the package unit and physically contacts the underfill.
    Type: Application
    Filed: August 7, 2023
    Publication date: February 13, 2025
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chun-Yen Lan, Chih-Chien Pan, Pu Wang, Li-Hui Cheng, Ying-Ching Shih, Yu-Wei Lin
  • Patent number: 12224224
    Abstract: A package structure includes first and second package components, an underfill layer disposed between the first and second package components, and a metallic layer. The first package component includes semiconductor dies, a first insulating encapsulation laterally encapsulating the semiconductor dies, and a redistribution structure underlying first surfaces of the semiconductor dies and the first insulating encapsulation. The second package component underlying the first package component is electrically coupled to the semiconductor dies through the redistribution structure. The underfill layer extends to cover a sidewall of the first package component, the metallic layer overlying second surfaces of the semiconductor dies and the first insulating encapsulation, and a peripheral region of the second surface of the first insulating encapsulation is accessibly exposed by the metallic layer, where the first surfaces are opposite to the second surfaces.
    Type: Grant
    Filed: March 14, 2022
    Date of Patent: February 11, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Po-Yuan Cheng, Pu Wang, Li-Hui Cheng
  • Patent number: 12210114
    Abstract: A radar system for tracking an object in a scene by transmitting frequency modulated continuous wave (FMCW) is provided. The radar system is configured to collect radar measurements of the scene sampled in a time-frequency domain within an intermediate frequency (IF) bandwidth to which reflection of the transmitted FMCW is shifted by mixing with a copy of the FMCW, where a frequency dimension of the time-frequency domain is quantized into multiple frequency bins forming the frequency bandwidth, where a time dimension of the time-frequency domain is quantized into multiple time instances forming a time interval corresponding to the PRI, count a number of amplitude peaks of the radar measurements for each frequency bin at different instances of time, identify a number of frequency bins with their counts of the number of peaks above a pre-determined threshold, and determine at least a distance to the object based on frequency analysis of the radar measurements.
    Type: Grant
    Filed: March 18, 2022
    Date of Patent: January 28, 2025
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Pu Wang, Sian Jin
  • Patent number: 12213177
    Abstract: A computer-executed method is provided for IEEE 802.15.4 devices based on a suspendable carrier-sense multiple access with collision avoidance (CSMA/CA) control program and standard CSMA/CA control program for an IEEE 802.15.4 network composing of IEEE 802.15.4 devices. The computer-executed method is provided on an IEEE 802.15.4 device, and causes a processor of the IEEE 802.15.4 device to perform steps that include determining the permission of backoff suspension and the intention of IEEE 802.15.4 device to perform backoff suspension, selecting the suspendable CSMA/CA control program if the backoff suspension is permitted and IEEE 802.15.4 device intends to perform backoff suspension.
    Type: Grant
    Filed: November 13, 2023
    Date of Patent: January 28, 2025
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: Jianlin Guo, Yukimasa Nagai, Takenori Sumi, Kieran Parsons, Philip Orlik, Pu Wang
  • Patent number: 12211818
    Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.
    Type: Grant
    Filed: July 26, 2023
    Date of Patent: January 28, 2025
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Chih-Chien Pan, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20250020500
    Abstract: Disclosed are a liquid level switch system and a liquid level measurement method. The liquid level switch system has a transmitting probe, a receiving probe and a main unit. The transmitting probe is located at a warning position on the outer wall of a tank body, the receiving probe is located on the outer wall of the tank body, and the transmitting probe and the receiving probe are respectively connected to the main unit by means of cables. A piezoelectric plate is placed on an inclined block to change the incident angle of an ultrasonic signal entering the tank wall so as to generate a longitudinal wave signal and a transverse wave signal, and the main unit judges, according to a signal strength difference value between a longitudinal wave receiving signal and a transverse wave receiving signal, whether the liquid level of the tank body reaches the warning position.
    Type: Application
    Filed: August 8, 2024
    Publication date: January 16, 2025
    Inventors: Pu WANG, Dinghua WANG, Rui WANG
  • Patent number: 12196679
    Abstract: Systems and methods are provided for multi-spectral or hyper-spectral fluorescence imaging. In one example, a spectral encoding device may be positioned in a detection light path between a detection objective and an imaging sensor of a microscope. In one example, the spectral encoding device includes a first dichroic mirror having a sine transmittance profile and a second dichroic mirror having a cosine transmittance profile. In addition to collecting transmitted light, reflected light from each dichroic mirror is collected and used for total intensity normalization and image analysis.
    Type: Grant
    Filed: March 12, 2021
    Date of Patent: January 14, 2025
    Assignee: University of Southern California
    Inventors: Francesco Cutrale, Pu Wang, Scott E. Fraser
  • Publication number: 20240395727
    Abstract: Semiconductor devices and methods of manufacture are provided, in which an adhesive is removed from a semiconductor die embedded within an encapsulant, and an interface material is utilized to remove heat from the semiconductor device. The removal of the adhesive leaves behind a recess adjacent to a sidewall of the semiconductor, and the recess is filled.
    Type: Application
    Filed: July 31, 2024
    Publication date: November 28, 2024
    Inventors: Chih-Hao Chen, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Patent number: 12154194
    Abstract: A method for a target image reconstruction is provided. The method includes emitting stepped frequency waveforms having different constant frequencies at different periods of time, modulating the stepped frequency waveforms into frequency ranges each having a first frequency and a second frequency, wherein each of the stepped frequency waveforms are increased from the first frequency to the second frequency based on a range function, wherein the modulated stepped frequency waveforms are arranged with some sparsity factor.
    Type: Grant
    Filed: July 10, 2020
    Date of Patent: November 26, 2024
    Assignee: Mitsubishi Electric Research Laboratories, Inc.
    Inventors: David Millar, Okan Atalar, Keisuke Kojima, Toshiaki Koike-Akino, Pu Wang, Kieran Parsons
  • Publication number: 20240387446
    Abstract: A jig for manufacturing a semiconductor package includes a bottom piece and an upper piece. The bottom piece includes a base, a support plate, and at least one elastic connector. The support plate is located in a central region of the base. The at least one elastic connector is interposed between the support plate and the base. The upper piece includes a cap and outer flanges. The cap overlays the support plate when the upper piece is disposed on the bottom piece. The outer flanges are disposed at edges of the cap, connected with the cap. The outer flanges contact the base of the bottom piece when the upper piece is disposed on the bottom piece. The cap includes an opening which is a through hole. When the upper piece is disposed on the bottom piece, a vertical projection of the opening falls entirely on the support plate.
    Type: Application
    Filed: July 29, 2024
    Publication date: November 21, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chih-Hao Chen, Chih-Chien Pan, Pu Wang, Li-Hui Cheng, Szu-Wei Lu
  • Publication number: 20240381425
    Abstract: A computer-executed method is provided for IEEE 802.15.4 devices based on a suspendable carrier-sense multiple access with collision avoidance (CSMA/CA) control program and standard CSMA/CA control program for an IEEE 802.15.4 network composing of IEEE 802.15.4 devices. The computer-executed method is provided on an IEEE 802.15.4 device, and causes a processor of the IEEE 802.15.4 device to perform steps that include determining the permission of backoff suspension and the intention of IEEE 802.15.4 device to perform backoff suspension, selecting the suspendable CSMA/CA control program if the backoff suspension is permitted and IEEE 802.15.4 device intends to perform backoff suspension.
    Type: Application
    Filed: November 13, 2023
    Publication date: November 14, 2024
    Applicants: Mitsubishi Electric Research Laboratories, Inc., Mitsubishi Electric Corporation
    Inventors: Jianlin Guo, Yukimasa Nagai, Takenori Sumi, Kieran Parsons, Philip Orlik, Pu Wang
  • Publication number: 20240379429
    Abstract: Some embodiments of the present disclosure provide a method of manufacturing a semiconductor device. The method includes: forming a carrier; forming a sacrificial layer on the carrier; forming a through via on the sacrificial layer, wherein the through via includes a seed layer and a metal feature; disposing a die on the sacrificial layer, wherein the die has a plurality of metal pillars disposed at a side of the die facing away from the sacrificial layer; forming a molding compound on the sacrificial layer to cover and surround the die and the through via; removing a portion of the molding compound and a portion of the through via above the die to expose the metal feature of the through via; and removing the carrier and sacrificial layer to expose the seed layer of the through via.
    Type: Application
    Filed: July 23, 2024
    Publication date: November 14, 2024
    Inventors: JING-CHENG LIN, YING-CHING SHIH, PU WANG, CHEN-HUA YU
  • Publication number: 20240371724
    Abstract: A package structure includes a substrate, a first die, a second die, a first thermal conductive layer, a heat spreader and a second thermal conductive layer. The first die and the second die are bonded to the substrate. The first thermal conductive layer is inserted between the first die and the second die. The heat spreader is disposed on the substrate to cover the first die and the second die. The second thermal conductive layer is different from the first thermal conductive layer, wherein the second thermal conductive layer is disposed between the first thermal conductive layer and the heat spreader.
    Type: Application
    Filed: July 14, 2024
    Publication date: November 7, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Pu Wang, Chin-Fu Kao, Szu-Wei Lu
  • Publication number: 20240371722
    Abstract: An embodiment thermal interface material may include a first component including a first thermal conductivity that is between 20 W/cm·K and 30 W/cm·K and a second component including a second thermal conductivity that is between 30 W/cm·K and 40 W/cm·K. Each of the first component and the second component may include a thermally conductive material including one or more of graphite, graphene, carbon nanotubes, a metal, and a phase change material. For example, each of the first component and the second component include graphite dispersed within a polymer matrix that may include one or more of a hydrogenated hydrocarbon resin, polybutene, polyisobutylene, and an acrylic acid ester copolymer. According to an embodiment, the first component may include 40 wt % to 60 wt % graphite and the second component may include 60 wt % to 70 wt % graphite.
    Type: Application
    Filed: May 4, 2023
    Publication date: November 7, 2024
    Inventors: Chih-Chien Pan, Li-Hui Cheng, Pu Wang