Abstract: A method for bonding a plastic member onto a metal housing is provided. A metal housing having an inner surface and an outer surface is prepared. The inner surface of the metal housing is subjected to physical processing to thereby form a bonding area. An adhesive layer is formed on the bonding area. A plastic mold member is formed on the adhesive layer by plastic injection molding.

Abstract: This invention relates to a wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: An enclosure includes a main body, a cover for covering the main body, a movable member movably attached to an inner surface of the main body, and a latch member. The main body defines a through hole. The cover defines a through hole aligning with the through hole of the main body. The movable member defines a locking hole. The locking hole includes a small part and a large part communicating with the small part. The movable member is moved to align the large part of the locking hole with the through hole of the second sidewall. The latch member extends through the through hole of the cover, the through hole of the second sidewall, and the large part of the locking hole. The movable member then is restored, thereby the latch portion engaging in the small part of the locking hole.

Abstract: A wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: An enclosure includes a main body, a cover for covering the main body, a movable member movably attached to an inner surface of the main body, and a latch member. The main body defines a through hole. The cover defines a through hole aligning with the through hole of the main body. The movable member defines a locking hole. The locking hole includes a small part and a large part communicating with the small part. The movable member is moved to align the large part of the locking hole with the through hole of the second sidewall. The latch member extends through the through hole of the cover, the through hole of the second sidewall, and the large part of the locking hole. The movable member then is restored, thereby the latch portion engaging in the small part of the locking hole.

Abstract: A mechanical keypad with touch panel function includes a key set including a plurality of keycaps and a keytop covering the keycaps, a backlight layer under the key set, a capacitive touch unit selectively disposed under several keycaps, an elastic layer including an elastomer and a plunger corresponding to the keycaps and disposed under the capacitive touch unit as well as a circuit board including metal domes and dome sheets corresponding to the keycaps. Each metal dome provides a mechanical feedback force so that the keycaps are able to be in indirect contact with the metal domes and the dome sheets by means of the plunger.

Abstract: A metal plate press-forming process with a fine line pattern, in which the metal plate is heated and applied with a gas or liquid pressure in several stages so as to be pressed against a molding die to be formed into a shape and simultaneously to obtain a second fine-line pattern transferred from a first fine-line pattern on the molding die. A press-formed metal housing obtained using the aforesaid metal plate press-forming process is also disclosed. Also, a method of forming a fine line pattern on a molding die is disclosed, in which a patterned photoresist layer is formed on a block, and a fine line pattern on the block is formed by etching the block using the patterned photoresist layer as a mask.

Abstract: A mechanical keypad with touch panel function includes a key set including a plurality of keycaps and a keytop covering the keycaps, a backlight layer under the key set, a capacitive touch unit selectively disposed under several keycaps, an elastic layer including an elastomer and a plunger corresponding to the keycaps and disposed under the capacitive touch unit as well as a circuit board including metal domes and dome sheets corresponding to the keycaps. Each metal dome provides a mechanical feedback force so that the keycaps are able to be in indirect contact with the metal domes and the dome sheets by means of the plunger.

Abstract: A coating composition comprising an effective corrosion-inhibiting amount of a rare earth compound, a neutral to slightly acidic generating extender or an acidic generating extender, or combinations thereof is provided. In one embodiment, the corrosion-inhibiting components are combined with other components such as extenders, amino acids and amino acid derivatives, gelatin and gelatin derivatives, organic-based exchange resins, and combinations thereof, to enhance the corrosion resistance of the resultant coating film. The coating compositions have good adhesion to substrates such as metals, including aluminum and aluminum alloys.

Abstract: A structure for reducing stress for vias and a fabricating method thereof are provided. One or more wires or vias in the thickness direction are enframed with the use of a stress block in a lattice structure to be isolated from being directly contacted with the major portion of insulating materials with a high coefficient of thermal expansion. Thus, the shear stress resulting from temperature loading can be blocked or absorbed by the stress block.

Abstract: A media for storing information comprises a substrate, a conductive layer formed over the substrate, and a ferroelectric layer epitaxially formed on the conductive layer. The ferroelectric layer includes an a-lattice constant that is substantially matched to an a-lattice constant of the conductive layer and an average c-lattice constant that is longer than an average c-lattice constant of a bulk-grown ferroelectric layer.

Abstract: A coating composition comprising an effective corrosion-inhibiting amount of a carbon pigment is provided. In one embodiment, the corrosion-inhibiting carbon pigment is further comprising other components such as extenders, including neutral to slightly acidic generating extenders and acidic generating extenders, are earth compounds, amino acids and amino acid derivatives, gelatin and gelatin derivatives, organic-based exchange resins, and combinations thereof, to enhance the corrosion resistance of the resultant coating film. In one embodiment, the carbon pigment is a surface-modified carbon pigment. The coating compositions have good adhesion to substrates such as metals, including aluminum and aluminum alloys.

Abstract: This invention relates to a packaging structure and method of an image sensor module. The method comprises: providing a transparent substrate having a first patterned conductive layer; carrying an image sensor integrated circuit chip having a photosensitive active area and at least one passive chip on the transparent substrate, wherein the photosensitive active area faces the transparent substrate; forming an insulating build-up film over the transparent substrate; and forming a plurality of conductive vias in the insulating build-up film wherein the ends of the conductive vias are connected with the passive chip or the first patterned conductive layer of the transparent substrate while the other ends of the conductive vias are exposed on the surface of the insulating build-up film. The packaging method is capable of down-sizing the construction of the image sensor module and simplifying the processing steps.

Abstract: A structure for reducing stress for vias and a fabricating method thereof are provided. One or more wires or vias in the thickness direction are enframed with the use of a stress block in a lattice structure to be isolated from being directly contacted with the major portion of insulating materials with a high coefficient of thermal expansion. Thus, the shear stress resulting from temperature loading can be blocked or absorbed by the stress block.

Abstract: An image sensor module includes a first substrate, a second substrate provided over the first substrate, an image sensor device for receiving an image signal flip-chip bonded to the second substrate, and a semiconductor device for processing the image signal from the image sensor device embedded in the first substrate.

Abstract: A structure for reducing stress for vias and a fabricating method thereof are provided. One or more wires or vias in the thickness direction are enframed with the use of a stress block in a lattice structure to be isolated from being directly contacted with the major portion of insulating materials with a high coefficient of thermal expansion. Thus, the shear stress resulting from temperature loading can be blocked or absorbed by the stress block.

Abstract: This invention relates to a wafer-leveled chip packaging method, comprising the steps of: providing a wafer; attaching at least one first chip to the wafer; forming a first insulating layer on the wafer; forming a plurality of first conductive vias penetrating the first insulating layer, wherein parts of the first conductive vias are electrically connected with the first chip; forming a conductive pattern layer on the surface of the first insulating layer wherein the conductive pattern layer is electrically connected with the first conductive vias; forming a plurality of through holes penetrating the wafer; filling a second insulating layer in the through holes; and forming a plurality of second conductive vias in the second insulating layer, wherein the second conductive vias are electrically connected with the first conductive vias.

Abstract: A method and a device for enhancing the solderability of a lead-free component are provided. The provided method is compatible with the conventional soldering process and is capable of improving the wetting ability of the solder so as to enhance the solderability and the ability of anti-oxidation thereof. Besides, it is also achievable for providing a recognizable lead-free device so as to prevent the process confusion.

Abstract: An image sensor module includes a first substrate, a second substrate provided over the first substrate, an image sensor device for receiving an image signal flip-chip bonded to the second substrate, and a semiconductor device for processing the image signal from the image sensor device embedded in the first substrate.

Abstract: This invention relates to a packaging structure and method of an image sensor module. The method comprises: providing a transparent substrate having a first patterned conductive layer; carrying an image sensor integrated circuit chip having a photosensitive active area and at least one passive chip on the transparent substrate, wherein the photosensitive active area faces the transparent substrate; forming an insulating build-up film over the transparent substrate; and forming a plurality of conductive vias in the insulating build-up film wherein the ends of the conductive vias are connected with the passive chip or the first patterned conductive layer of the transparent substrate while the other ends of the conductive vias are exposed on the surface of the insulating build-up film. The packaging method is capable of down-sizing the construction of the image sensor module and simplifying the processing steps.