Patents by Inventor Qiang Wan

Qiang Wan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11414388
    Abstract: The present invention relates to a crystal form of 3-(4-methyl-1H-imidazol-1-yl)-5-trifluoromethylaniline monohydrochloride and the use thereof. Specifically, disclosed are a crystal form A of a monohydrochloride anhydrous substance of 3-(4-methyl-1H-imidazol-1-yl)-5-trifluoromethylaniline monohydrochloride, a method for preparing the crystal form A and the use of the crystal form in the synthesis of nilotinib. The crystal form A of the present invention has good stability and purity, and can be directly used in the preparation and production of nilotinib. The method for preparing nilotinib in the present invention is easy to operate and has high industrial application value.
    Type: Grant
    Filed: April 8, 2019
    Date of Patent: August 16, 2022
    Assignees: Arizest (Shanghai) Pharmatech Co., Ltd., Jiangsu Xidi Pharmaceuticals Co., Ltd., Shanghai Acebright Pharmaceuticals Group Co., Ltd.
    Inventors: Deliang Niu, Bojun Ma, Zhanqun Zhu, Qiang Wan
  • Publication number: 20220254782
    Abstract: A method for manufacturing a memory and a memory is provided. The method for manufacturing a memory includes: providing a substrate; stacking an electrode support structure, a protective layer and a first mask layer in sequence on the substrate; patterning the first mask layer on an array region, and etching the protective layer, the electrode support structure and the substrate by using the patterned first mask layer as a mask, to form capacitor holes penetrating the protective layer and the electrode support structure and extending into the substrate; removing the first mask layer; and forming a first electrode layer on side walls and bottom walls of the capacitor holes, a top surface of the first electrode layer being flush with a top surface of the electrode support structure.
    Type: Application
    Filed: December 6, 2021
    Publication date: August 11, 2022
    Inventors: Qiang WAN, Jun XIA, Kangshu ZHAN, Sen LI, Tao LIU, Penghui XU
  • Publication number: 20220246437
    Abstract: An embodiment of the application provides a method for forming a semiconductor structure. The semiconductor structure includes a first region and a second region. The method includes the following steps: providing a base, an insulating layer, and a mask layer that are stacked in sequence, where the first region has at least one trench penetrating the mask layer and the insulating layer, and the mask layer has an upper surface in the second region higher than that in the first region; forming a first protection layer, where an upper surface and a sidewall of the mask layer in the first region are covered with the first protection layer; after the first protection layer is formed, removing the mask layer in the second region; subsequent to removal of the mask layer in the second region, removing the first protection layer; and removing the mask layer in the first region.
    Type: Application
    Filed: October 19, 2021
    Publication date: August 4, 2022
    Applicant: CHANGXIN MEMORY TECHNOLOGIES, INC.
    Inventors: JUN XIA, Kangshu ZHAN, Sen LI, Penghui XU, Qiang WAN, Tao LIU
  • Publication number: 20220246616
    Abstract: An embodiment of the disclosure provides a method for manufacturing a semiconductor structure, including: providing a substrate, where the substrate has a peripheral region and an array region; stacking and forming an insulating layer and a mask layer with a mask pattern on the substrate; etching the insulating layer with the mask layer as a mask to form a contact hole penetrating the insulating layer at the array region; reserving the mask layer; in a direction perpendicular to a surface of the substrate, providing a thickness difference between the mask layer of the peripheral region and the mask layer of the array region; forming a first material layer; forming a second material layer; etching a part of the mask layer with the second material layer as the mask; and removing the remaining second material layer, the remaining mask layer and the first material layer on the remaining mask layer.
    Type: Application
    Filed: December 2, 2021
    Publication date: August 4, 2022
    Inventors: Jun XIA, Qiang WAN, Penghui XU, Tao LIU, Sen LI, Kangshu ZHAN
  • Publication number: 20220246617
    Abstract: A method for manufacturing a semiconductor structure includes: a substrate is provided, in which the substrate is provided with a peripheral area and an array area; an insulation layer is formed on the substrate; a first mask layer with a first mask pattern is formed on the insulation layer; the insulation layer is etched by taking the first mask layer as a mask, to form a contact hole in the array area; a first electrode layer is formed; a second mask layer with a second mask pattern is formed, in which the second mask layer is arranged on the first electrode layer; and the first electrode layer and the first mask layer are etched by taking the second mask layer as a mask until the insulation layer in the array area is exposed, in which a remaining portion of the first electrode layer forms a lower electrode layer.
    Type: Application
    Filed: October 18, 2021
    Publication date: August 4, 2022
    Inventors: Jun Xia, Qiang Wan, Penghui Xu, Sen Li, Kangshu Zhan, Tao Liu
  • Publication number: 20220208764
    Abstract: Embodiments provide a memory and a fabrication method thereof, and relates to the field of storage device technology to solve the technical problem of lower storage density of the memory. The fabrication method of the memory includes: providing a substrate including a central region and an edge region connected to each other, a first contact structure electrically connected to a wordline structure in the substrate being formed in the edge region; forming a second contact structure electrically connected to the first contact structure on the edge region; forming a capacitor structure electrically connected to the wordline structure on the central region; forming a third contact structure electrically connected to the second contact structure on the second contact structure; and forming a transistor structure electrically connected to the wordline structure on the capacitor structure and the third contact structure.
    Type: Application
    Filed: August 16, 2021
    Publication date: June 30, 2022
    Inventors: Kangshu ZHAN, Jun XIA, Qiang WAN, Tao LIU, Sen LI
  • Publication number: 20220139919
    Abstract: An array structure of capacitors are provided. The array structure of capacitors includes a substrate and a first connection pad, a second connection pad, a first capacitive structure and a second capacitive structure that are disposed on the substrate. The first capacitive structure is disposed outside the second capacitive structure and adjacent to an edge of the substrate. The bottom surface of the first capacitive structure towards the substrate and the top surface of the first connection pad are disposed at intervals.
    Type: Application
    Filed: January 14, 2022
    Publication date: May 5, 2022
    Inventors: Sen LI, Qiang WAN, Tao LIU, Penghui XU
  • Publication number: 20220093400
    Abstract: A manufacturing method of a semiconductor structure is disclosed, which includes: an initial structure is provided; a filling layer covering a spacer is formed on the initial structure; a filling layer with a first preset thickness is removed at a high first etching rate through a first etching process, then a filling layer with a second preset thickness is removed at a low second etching rate through a second etching process, and the partial spacer is exposed; and the filling layer and the spacer are patterned.
    Type: Application
    Filed: August 17, 2021
    Publication date: March 24, 2022
    Inventors: Qiang WAN, Tao LIU, Sen LI
  • Publication number: 20220085024
    Abstract: A Dynamic Random Access Memory (DRAM) and a manufacturing method thereof are provided. The DRAM comprises a substrate and connection pads and capacitors disposed on the substrate. Here, the capacitor comprises a first electrode layer; the first electrode layer is provided with an extension part extending towards the substrate, and the extension part is coated on a top surface and a side surface of the connection pad.
    Type: Application
    Filed: September 9, 2021
    Publication date: March 17, 2022
    Inventors: Sen Li, Qiang Wan, Tao Liu, Penghui Xu
  • Publication number: 20220085030
    Abstract: A method for manufacturing a semiconductor structure includes: a first mask layer is formed on a dielectric layer, in which a first etching hole extending along a first direction parallel to the dielectric layer is formed in the first mask layer; a side of the first mask layer away from the dielectric layer is planarized; a second mask layer is formed on the first mask layer, in which a second etching hole extending along a second direction parallel to the dielectric layer is formed in the second mask layer, the first etching hole and the second etching hole constitute an etching hole; and the dielectric layer is etched along the etching hole to form the capacitor hole.
    Type: Application
    Filed: August 11, 2021
    Publication date: March 17, 2022
    Inventors: Qiang WAN, Sen Li, Tao Liu
  • Publication number: 20210376059
    Abstract: The method for preparing the hole in the semiconductor device includes: providing a base to be etched and forming a mask layer on the base to be etched; forming a first pattern layer arranged in an array on the mask layer; etching the mask layer by using the first pattern layer as a mask to form a first hole and a second pattern layer; depositing a protective layer on a side of the second pattern layer away from the base to be etched, the protective layer simultaneously covering a side wall and a bottom portion of the first hole; etching the protective layer which covers the bottom portion of the first hole; and etching a supporting layer by using the second pattern layer and the protective layer which covers the side wall of the first hole as a mask to form a second hole.
    Type: Application
    Filed: August 13, 2021
    Publication date: December 2, 2021
    Inventors: Jun XIA, Tao Liu, Qiang Wan, Jungsu Kang, Kangshu Zhan, Sen Li
  • Publication number: 20210139433
    Abstract: The present invention relates to a crystal form of 3-(4-methyl-1H-imidazol-1-yl)-5-trifluoromethylaniline monohydrochloride and the use thereof. Specifically, disclosed are a crystal form A of a monohydrochloride anhydrous substance of 3-(4-methyl-1H-imidazol-1-yl)-5-trifluoromethylaniline monohydrochloride, a method for preparing the crystal form A and the use of the crystal form in the synthesis of nilotinib. The crystal form A of the present invention has good stability and purity, and can be directly used in the preparation and production of nilotinib. The method for preparing nilotinib in the present invention is easy to operate and has high industrial application value.
    Type: Application
    Filed: April 8, 2019
    Publication date: May 13, 2021
    Inventors: Deliang NIU, Bojun MA, Zhanqun ZHU, Qiang WAN
  • Publication number: 20200226185
    Abstract: System and methods for automatically publishing Representational State Transfer (REST) Application Programming Interface (API) changes in a cloud environment are described. A publish/subscribe server (PSS) may receive from a subscriber a customized request for monitoring a registered REST API supported by a REST service provider (RSP) and registered with the PSS. The subscriber is configured to invoke the registered REST API at the RSP. The PSS may monitor the registered REST API for any changes at the RSP based on the customized request. In response to a determination that the registered REST API is changed at the RSP, the PSS may generate a REST API change report indicating a change event occurred to the registered REST API at the RSP after being registered with the PSS. The PSS may then transmit the REST API change report to the subscriber. The subscriber is configured to not invoke the registered REST API at the RSP based on the REST API change report.
    Type: Application
    Filed: February 25, 2019
    Publication date: July 16, 2020
    Applicant: VMware, Inc.
    Inventors: Shuying YAN, Qiang WAN, Changhui TAN, Ming LIU
  • Publication number: 20160196319
    Abstract: A system and method for generating a multi-dimensional data structures are provided. One or more data sources including data formats are obtained. Based on data processing requirements, a multi-dimensional data structured is developed and processing definitions for the source data is developed including the alignment of data attributes and the definition of metric calculations. Thereafter, the source data may be queried using the definitions. Additionally, the data definitions may be dynamically modified without requiring the modification of the source data.
    Type: Application
    Filed: March 16, 2016
    Publication date: July 7, 2016
    Inventors: Qiang Wan, Ping Luo
  • Patent number: 9350383
    Abstract: A system, method and data structure for processing a sequential set of data. A set of data is processed such the repetitive sequences of data are represented by a value and an offset of the last array element in the sequence. The resulting compressed array facilitates binary searching of data element values, modification of data element values, and/or addition/deletion of data array elements without requiring a regeneration of the array.
    Type: Grant
    Filed: November 12, 2012
    Date of Patent: May 24, 2016
    Assignee: Pivotlink Corp.
    Inventors: Qiang Wan, James Boorn
  • Patent number: 8787315
    Abstract: The present invention discloses a method and apparatus for handoff between base stations. A target base station bears its PILOT_INC information into a handoff request acknowledge message to inform a source base station when sending a handoff request acknowledge message to the source base station after receiving a handoff request from the source base station, thus, even if a UE requesting handoff reports PILOT_PN_PHASE under the target BS in a residual set, the source BS can determine PILOT_PN corresponding to the PILOT_PN_PHASE through the PILOT_INC information of the target base station, thereby completing cell handoff between the base stations successfully. The present invention is a supplement to the existing handoff between the base stations with configurations of the PILOT_INC information being different, and augments the success rate of handoff between the base stations of the UE, thereby improving the traffic service quality of a CDMA system.
    Type: Grant
    Filed: September 24, 2009
    Date of Patent: July 22, 2014
    Assignee: ZTE Corporation
    Inventors: Boqiu Huang, Yu Liu, Yankun Zou, Qiang Wan, Wei Wang
  • Patent number: 8311994
    Abstract: A system, method and data structure for processing a sequential set of data. A set of data is processed such the repetitive sequences of data are represented by a value and an offset of the last array element in the sequence. The resulting compressed array facilitates binary searching of data element values, modification of data element values, and/or addition/deletion of data array elements without requiring a regeneration of the array.
    Type: Grant
    Filed: October 14, 2005
    Date of Patent: November 13, 2012
    Assignee: Pivotlink Corp.
    Inventors: Qiang Wan, James Boorn
  • Publication number: 20120069818
    Abstract: The present invention discloses a method and apparatus for handoff between base stations. A target base station bears its PILOT_INC information into a handoff request acknowledge message to inform a source base station when sending a handoff request acknowledge message to the source base station after receiving a handoff request from the source base station, thus, even if a UE requesting handoff reports PILOT_PN_PHASE under the target BS in a residual set, the source BS can determine PILOT_PN corresponding to the PILOT_PN_PHASE through the PILOT_INC information of the target base station, thereby completing cell handoff between the base stations successfully. The present invention is a supplement to the existing handoff between the base stations with configurations of the PILOT_INC information being different, and augments the success rate of handoff between the base stations of the UE, thereby improving the traffic service quality of a CDMA system.
    Type: Application
    Filed: September 24, 2009
    Publication date: March 22, 2012
    Applicant: ZTE CORPORATION
    Inventors: Boqiu Huang, Yu Liu, Yankun Zou, Qiang Wan, Wei Wang
  • Publication number: 20070162472
    Abstract: A system and method for generating a multi-dimensional data structures are provided. One or more data sources including data formats are obtained. Based on data processing requirements, a multi-dimensional data structured is developed and processing definitions for the source data is developed including the alignment of data attributes and the definition of metric calculations. Thereafter, the source data may be queried using the definitions. Additionally, the data definitions may be dynamically modified without requiring the modification of the source data.
    Type: Application
    Filed: December 26, 2006
    Publication date: July 12, 2007
    Applicant: SEATAB SOFTWARE, INC.
    Inventors: Qiang Wan, Ping Luo
  • Patent number: D683046
    Type: Grant
    Filed: November 1, 2012
    Date of Patent: May 21, 2013
    Assignee: Snova Biotechnologies Co., Ltd.
    Inventors: Shanshan Yin, Qiang Wan