Abstract: A panel testing unit is provided, an array substrate including the panel testing unit and a liquid crystal display device including the array substrate. The panel testing unit includes at least a shorting bar set, each shorting bar set including at least a shorting line; at least a signal line set, each signal line set including at least a signal line. Any one of the signal lines is connected to a corresponding one of the shorting lines through a diode. A novel technical scheme is provided, a unidirectional diode is disposed between the signal line and the shorting line (test line), after the test is finished, a laser cutting process is not necessary, a processing of a next step can be performed directly, thus the processing cost is reduced, and the productivity is increased.

Abstract: The present invention provides a liquid crystal display panel and a manufacturing method thereof, in which aligned carbon nanotube arrays are provided to replace photo spacers that are used in the prior art and takes advantage of the excellent mechanic property and excellent stability of the aligned carbon nanotubes to significantly enhance the performance and service life of a liquid crystal display panel. The manufacturing method of the liquid crystal display panel of the present invention grows aligned carbon nanotubes on one substrate of a liquid crystal display panel to obtain spacers formed of aligned carbon nanotube arrays, so as to take advantage of the excellent mechanic property and excellent stability of the aligned carbon nanotubes to significantly enhance the performance and service life of a liquid crystal display panel.

Abstract: The present invention provides an array substrate and a LCD panel. The array substrate, which comprises: a display area and a peripheral area, wherein the display area has at least two types of pixel electrodes, gate lines and data lines, which are arranged in rows and columns, one of the gate line is connected to two columns of the corresponding pixel electrodes and two of the data lines are connected to one row of the corresponding pixel electrodes. By the above description, the present invention can resolve requirements of testing HG2D (half-gate two-data line) drive circuit.

Abstract: The array substrate includes a plurality of pixel structures, each of the pixel structure comprising thin film transistor (TFTs) and a pixel electrodes on a glass substrate. A passivation layer is arranged between the TFT and the pixel electrode. The pixel electrode electrically connects to the TFT via a through hole of the passivation layer. The passivation layer includes a groove structure having a plurality of recess portions arranged periodically and at least one protrusion portion between every two adjacent recess portions. The passivation layer includes a second groove surrounding a rim of the groove structure. The second groove connects the plurality of the recess portions. The pixel electrode is substantially a surface covering the recess portions and the protrusion portions, and edges of the pixel electrode extend into the second groove. In addition, a liquid crystal panel includes the above array substrate is also disclosed.

Abstract: The present invention provides a PSVA liquid crystal display panel, comprising an upper substrate (1), a lower substrate (2) oppositely located to the upper substrate (1) and a liquid crystal layer (3) located between the upper substrate (1) and the lower substrate (2); the lower substrate (2) comprises a second substrate (21), a thin film transistor, a passivation layer (22) and a pixel electrode (23); the lower substrate (2) comprises a plurality of pixel areas, and the passivation layer (22) is a passivation layer which is patterned, and is respectively formed the same pattern corresponding to the plurality of pixel areas, and the pattern comprises a plurality of trenches (221) extending toward various directions; the pixel electrode (23) is entirely attached to the passivation layer (22) which is patterned and comprises a corresponding pattern with the passivation layer (22); a depth of the trench (221) is 2000-4000 ?.

Abstract: The present invention provides a PSVA liquid crystal display panel and a manufacture method thereof. The PSVA liquid crystal display panel of the present invention comprises a patterned passivation layer, and the upper surface of the passivation layer is provided with the trenches having kinds of depths. It can remedy the transmittance homogeneity in certain degree, which is beneficial to promote the large view angle property of the PSVA liquid crystal display panel; the manufacture method of the PSVA liquid crystal display panel according to the present invention employs the multi tone mask to form the via hole and the trenches having kinds of depths at the same time by one photolithographic process with one multi tone mask. The production cost is reduced and the production efficiency is promoted.

Abstract: The present invention provides a PSVA liquid crystal display panel, comprising an upper substrate (1), a lower substrate (2) oppositely located to the upper substrate (1) and a liquid crystal layer (3) located between the upper substrate (1) and the lower substrate (2); the lower substrate (2) comprises a second substrate (21), a thin film transistor, a passivation layer (22) and a pixel electrode (23); the lower substrate (2) comprises a plurality of pixel areas, and the passivation layer (22) is a passivation layer which is patterned, and is respectively formed the same pattern corresponding to the plurality of pixel areas, and the pattern comprises a plurality of trenches (221) extending toward various directions; the pixel electrode (23) is entirely attached to the passivation layer (22) which is patterned and comprises a corresponding pattern with the passivation layer (22); a depth of the trench (221) is 2000-4000 ?.

Abstract: A thin film transistor array substrate and a method of fabricating the same are disclosed. The thin film transistor array substrate has a device lamination layer, a passivation layer and a pixel electrode layer; the device lamination layer has a substrate, a first signal line layer, a semiconductor layer and a second signal line layer; the passivation layer is formed with a through hole and grooves; the pixel electrode layer is disposed on the passivation layer and inside the grooves; and the pixel electrode layer is connected with the second signal line layer through the through hole. The fabricating cost can be saved and the fabricating efficiency can be improved.

Abstract: The array substrate includes a plurality of pixel structures, each of the pixel structure comprising thin film transistor (TFTs) and a pixel electrodes on a glass substrate. A passivation layer is arranged between the TFT and the pixel electrode. The pixel electrode electrically connects to the TFT via a through hole of the passivation layer. The passivation layer includes a groove structure having a plurality of recess portions arranged periodically and at least one protrusion portion between every two adjacent recess portions. The passivation layer includes a second groove surrounding a rim of the groove structure. The second groove connects the plurality of the recess portions. The pixel electrode is substantially a surface covering the recess portions and the protrusion portions, and edges of the pixel electrode extend into the second groove. In addition, a liquid crystal panel includes the above array substrate is also disclosed.

Abstract: A pixel structure having a substrate, an insulating layer and a pixel electrode is disclosed. The pixel electrode has first sub-electrodes and second sub-electrodes. The first sub-electrodes are arranged on a first region of the insulating layer and spaced apart from each other, and the second sub-electrodes are continuously disposed on a second region of the insulating layer. The first region is a flat region of the insulating layer, and the second region is a grooved region of the insulating layer.

Abstract: A test lead wire structure for connecting signal lines in a display device with test lines outside, includes a first insulating layer, a second insulating layer, first lead wires, and second lead wires. The projections of the first lead wires on the second insulating layer and the projections of the second lead wires on the second insulating layer are alternately disposed. During the cutting operation, short circuits are effectively prevented from occurring between the different test lead wires.

Abstract: A liquid crystal display panel is provided. The liquid crystal display panel has an array substrate having a plurality of pixel units disposed thereon. Each of the pixel units has a plurality of sub-pixels. Each of the sub-pixels has a first common electrode, a pixel electrode, and four domains. The domains are formed by patterning the pixel electrode, or by patterning the pixel electrode and the first common electrode simultaneously.