Patents by Inventor Qing Xue

Qing Xue has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030023819
    Abstract: A data formatter includes a shift register and a pointer manager. The shift register receives data from a providing RAM and shifts that data in response to reading data from the providing RAM and writing data to a receiving FIFO. A pointer manager maintains a pointer that points to a first valid byte in a sub-block of data into the correct bytes lanes of the FIFO by moving the pointer as data is shifted into and out of the shift register.
    Type: Application
    Filed: November 30, 2001
    Publication date: January 30, 2003
    Inventors: Eric Peel, Bradley Roach, Qing Xue
  • Patent number: 6496514
    Abstract: A hub port in a Fibre Channel loop for detecting and bypassing attached node ports in an OLD-PORT state is disclosed. The hub port includes a hub data source, a detect circuits, and an output control circuit. The hub data source supplies data to the hub port from a Fibre Channel loop. The detect circuit is configured to detect a valid non-Arbitrated Loop sequence from an attached node port indicating that the node port is in an OLD-PORT state. The output control circuit operates to bypass the node port from the loop when the valid non-Arbitrated Loop sequence is detected.
    Type: Grant
    Filed: December 4, 2000
    Date of Patent: December 17, 2002
    Assignee: Emulex Corporation
    Inventors: Sam Su, David Baldwin, Qing Xue, Hossein Hashemi
  • Patent number: 6483843
    Abstract: A hub port in a loop network is disclosed. The hub port includes a hub data source, first and second detect circuits, and a processor. The hub data source supplies data to the hub port from the loop network. The first detect circuit is configured to detect a first sequence from an attached node port establishing a loop circuit. The second sequence from the attached node port indicates to terminate the loop circuit. The processor is configured to receive the first sequence from the first detect circuit. Further, the processor operates to close a detect window and to increment a sequence origination count, if the detect window is open. The second detect circuit is configured to detect the second sequence from the hub data source confirming the termination of the loop circuit.
    Type: Grant
    Filed: October 12, 2000
    Date of Patent: November 19, 2002
    Assignee: Emulex Corporation
    Inventors: Sam Su, Qing Xue, Hossein Hashemi
  • Publication number: 20020108032
    Abstract: In an embodiment, an initialization extension device may provide an extended initialization period to enable a processor to configure a device, for example, an application specific integrated circuit (ASIC), prior to entering an operating mode. The device may include a number of control registers that may be configured to default settings in a register initialization period commenced in response to a reset signal. The reset signal may also trigger an extension timer to countdown a timer extended initialization period. During the timer extended initialization period, the processor may write an extension control signal, e.g., an extension bit, to a register. An initialization extension unit may maintain the device in an initialization mode during the timer extended initialization period and/or while the register contains the extension control signal. The processor may configure the control registers for one or more operations the device may perform when it enters the operating mode.
    Type: Application
    Filed: February 7, 2001
    Publication date: August 8, 2002
    Inventors: Sam Su, Hossein Hashemi, Qing Xue
  • Publication number: 20020067738
    Abstract: A hub port in a Fibre Channel loop for detecting and bypassing attached node ports in an OLD-PORT state is disclosed. The hub port includes a hub data source, a detect circuits, and an output control circuit. The hub data source supplies data to the hub port from a Fibre Channel loop. The detect circuit is configured to detect a valid non-Arbitrated Loop sequence from an attached node port indicating that the node port is in an OLD-PORT state. The output control circuit operates to bypass the node port from the loop when the valid non-Arbitrated Loop sequence is detected.
    Type: Application
    Filed: December 4, 2000
    Publication date: June 6, 2002
    Inventors: Sam Su, David Baldwin, Qing Xue, Hossein Hashemi
  • Patent number: 6051385
    Abstract: The invention provides compositions a methods of identifying and testing therapeutics against HSV infection, and in particular, compositions comprising receptors which enable cell specific entry of HSV. The invention also provides a novel DNA sequence that encodes a protein B5T74 that confers the ability of herpes simplex virus (HSV) to infect and replicate in otherwise non-permissive cells. Also provided are vectors comprising the isolated nucleic acids encoding HSV receptors in host suitable for expression of the nucleic acids encoding the HSV receptors, fragments of the HSV receptors, or homologs of the HSV receptor. Further provided is a porcine cell system which expresses a herpes simplex virus receptor, but does not express endogenous, HSV entry receptors.
    Type: Grant
    Filed: October 22, 1997
    Date of Patent: April 18, 2000
    Assignee: The Regents of the University of Michigan
    Inventors: A. Oveta Fuller, Qing-xue Li, Ning-hun C. McLaren, Aleida Perez, Gangadharan Subramanian