Abstract: A flexible touch panel, a method of manufacturing the same, and a flexible touch display including the same are disclosed. The flexible touch panel includes: a flexible substrate including a flexible substrate body and at least one flexible substrate extension, the flexible substrate body being contiguous with the at least one flexible substrate extension; a plurality of touch units on the flexible substrate body; and a plurality of signal lines which are disposed on the flexible substrate and electrically connected to the plurality of touch units, wherein each of the signal lines includes a first portion on the flexible substrate body and a second portion on the flexible substrate extension so that each of the signal lines is directly connectable to an external driving circuit, and some of the signal lines include a material different from others of the signal lines.

Abstract: A thin film transistor, an array substrate, a manufacturing method and a display device are provided. The thin film transistor includes a substrate and a gate layer, a source layer and a drain layer disposed on the substrate. The source layer and the drain layer are disposed in different layers and the drain layer and the gate layer are disposed in same and one layer.

Abstract: A repairing apparatus for removal of metal residuals on a display substrate is provided. The apparatus includes a storage container, comprising at least a first container configured to store a metal etchant; an adsorption component, configured to be adsorbed on a surface to be repaired on the display substrate and to cooperate with the surface to be repaired to define collectively a closed chamber therebetween; and a circulating pipe assembly, arranged to be connected and in fluid communication between the storage container and the adsorption component. The repairing apparatus may include a first fluid circuit arranged to be connected and in fluid communication between the first container and the adsorption component and configured to guide the metal etchant within the first container to flow to the adsorption component and into the chamber and then back into the first container.

Abstract: A one-glass-solution (OGS) touch screen substrate bridge structure and its manufacturing method, an OGS touch screen and its manufacturing method as well as a display device. The OGS touch screen substrate bridge structure includes: one insulating layer and two layers of transparent electrodes provided on the substrate, the two layers of transparent electrodes are the first transparent electrode and the second transparent electrode, the insulating layer is provided on the first transparent electrode, and the second transparent electrode is provided on the insulating layer, the first transparent electrode includes several sub-electrodes arranged at a certain spacing from each other, the second transparent electrode keeps the sub-electrodes in electrical connection.

Abstract: A voltage level shift circuit comprises a first pair of transistors and a second pair of transistors. A first transistor of the second pair of transistors is coupled with an input signal terminal. A second transistor of the transistors of the second pair of transistors is coupled with an inverted input signal terminal. The transistors of the second pair of transistors are cross-coupled with the transistors of the first pair of transistors. The voltage level shift circuit also comprises a third pair of transistors. The transistors of the third pair of transistors are coupled with the transistors of the first pair of transistors and the transistors of the second pair of transistors. A first transistor of the third pair of transistors is directly coupled with an output signal terminal and second transistor of the third pair of transistors is directly coupled with an inverted output signal terminal.

Abstract: A device includes a transistor cascode circuit including a first transistor configured to pull up voltage of a bulk and a node in response to a first control signal, and a second transistor configured to pull up voltage of an interface (I/O) pin in response to a second control signal. The device further includes a third transistor configured to pull down voltage of the I/O pin in response to a third control signal, and a feedback circuit configured to turn off the first transistor when the voltage of the I/O pin is above a predetermined level during a failsafe period.

Abstract: A one-glass-solution (OGS) touch screen substrate bridge structure and its manufacturing method, an OGS touch screen and its manufacturing method as well as a display device. The OGS touch screen substrate bridge structure includes: one insulating layer and two layers of transparent electrodes provided on the substrate, the two layers of transparent electrodes are the first transparent electrode and the second transparent electrode, the insulating layer is provided on the first transparent electrode, and the second transparent electrode is provided on the insulating layer, the first transparent electrode includes several sub-electrodes arranged at a certain spacing from each other, the second transparent electrode keeps the sub-electrodes in electrical connection.

Abstract: A device includes a transistor cascode circuit including a first transistor configured to pull up voltage of a bulk and a node in response to a first control signal, and a second transistor configured to pull up voltage of an interface (I/O) pin in response to a second control signal. The device further includes a third transistor configured to pull down voltage of the I/O pin in response to a third control signal, and a feedback circuit configured to turn off the first transistor when the voltage of the I/O pin is above a predetermined level during a failsafe period.

Abstract: A thin film transistor, an array substrate, a manufacturing method and a display device are provided. The thin film transistor includes a substrate and a gate layer, a source layer and a drain layer disposed on the substrate. The source layer and the drain layer are disposed in different layers and the drain layer and the gate layer are disposed in same and one layer.

Abstract: An array substrate, comprising: a substrate; a metal pattern formed on the substrate; an insulation layer formed on the metal pattern and formed with a via therein; and a transparent conductive pattern formed on the insulation layer and electrically connected to the metal pattern through the via, wherein the via has a cross section exhibiting an irregular geometry shape having a curved side edge.

Abstract: A device includes a first level shifter, a switch, and a control circuit. The first level shifter is electrically connected to a pad. The switch has an input terminal electrically connected to an input terminal of the first level shifter, and an output terminal electrically connected to an output terminal of the first level shifter. The control circuit is electrically connected to a control terminal of the switch.

Abstract: There are provided a pixel unit driving circuit and driving method, pixel unit and display apparatus. The pixel unit driving circuit is used for driving a light-emitting device to emit light, and comprises a first thin film transistor (T1), a second thin film transistor (T2), a third thin film transistor (T3) and a storage capacitor (Cs). A gate of the first thin film transistor (T1) is connected with a control line (Gate), a first electrode thereof is connected with a data line (Data), and a second electrode thereof is connected with a first node (A). One gate of the second thin film transistor (T2) is connected with the control line (Gate) and the other gate is connected with a second scan line (Scan2), a first electrode thereof is connected with the storage capacitor (Cs), and a second electrode thereof is connected with a second node (B).

Abstract: Some embodiments relate to an IC that includes an ESD-susceptible circuit. The IC includes a number of IC pads that are electrically coupled to respective nodes on the ESD-susceptible circuit. The IC pads are electrically accessible from external to the IC, and include one or more power supply pads and one or more I/O pads. The IC also includes a number of ESD protection devices coupled to the plurality of IC pads, respectively. A trigger circuit on the IC is configured to detect an ESD event impingent on a power supply pad and, in response to the detection, to trigger concurrent shunting of energy of the ESD event over both an ESD clamp element of an I/O pad and an ESD clamp element of the power supply pad. Other embodiments are also disclosed.

Abstract: A device includes a first level shifter, a switch, and a control circuit. The first level shifter is electrically connected to a pad. The switch has an input terminal electrically connected to an input terminal of the first level shifter, and an output terminal electrically connected to an output terminal of the first level shifter. The control circuit is electrically connected to a control terminal of the switch.

Abstract: A voltage level shift circuit comprises a first pair of transistors and a second pair of transistors. A first transistor of the second pair of transistors is coupled with an input signal terminal. A second transistor of the transistors of the second pair of transistors is coupled with an inverted input signal terminal. The transistors of the second pair of transistors are cross-coupled with the transistors of the first pair of transistors. The voltage level shift circuit also comprises a third pair of transistors. The transistors of the third pair of transistors are coupled with the transistors of the first pair of transistors and the transistors of the second pair of transistors. A first transistor of the third pair of transistors is directly coupled with an output signal terminal and second transistor of the third pair of transistors is directly coupled with an inverted output signal terminal.

Abstract: An array substrate, comprising: a substrate; a metal pattern formed on the substrate; an insulation layer formed on the metal pattern and formed with a via therein; and a transparent conductive pattern formed on the insulation layer and electrically connected to the metal pattern through the via, wherein the via has a cross section exhibiting an irregular geometry shape having a curved side edge.

Abstract: There are provided a pixel unit driving circuit and driving method, pixel unit and display apparatus. The pixel unit driving circuit is used for driving a light-emitting device to emit light, and comprises a first thin film transistor (T1), a second thin film transistor (T2), a third thin film transistor (T3) and a storage capacitor (Cs). A gate of the first thin film transistor (T1) is connected with a control line (Gate), a first electrode thereof is connected with a data line (Data), and a second electrode thereof is connected with a first node (A). One gate of the second thin film transistor (T2) is connected with the control line (Gate) and the other gate is connected with a second scan line (Scan2), a first electrode thereof is connected with the storage capacitor (Cs), and a second electrode thereof is connected with a second node (B).

Abstract: An over-driver, voltage level shift circuit for use with multiple voltage integrated circuits. The voltage level shift circuit includes a first pair of PMOS transistors, a second pair PMOS transistors and a third pair of PMOS transistors using a high supply voltage source VDDH and a low supply voltage source to voltage level shift input signals having a first voltage operating range to an output signal having a second voltage operating range higher then the first voltage operating range. Some embodiments include a fourth set of transistors and a fifth set of transistors to receive a medium supply voltage source VDDM between the high supply voltage source VDDH and a low supply voltage source and another set of input signals operating a voltage operating range different than the first operating range. The voltage level shift circuit selectably switches between a plurality of different voltage operating ranges for the second voltage operating range.

Abstract: An over-driver, voltage level shift circuit for use with multiple voltage integrated circuits. The voltage level shift circuit includes a first pair of PMOS transistors, a second pair PMOS transistors and a third pair of PMOS transistors using a high supply voltage source VDDH and a low supply voltage source to voltage level shift input signals having a first voltage operating range to an output signal having a second voltage operating range higher then the first voltage operating range. Some embodiments include a fourth set of transistors and a fifth set of transistors to receive a medium supply voltage source VDDM between the high supply voltage source VDDH and a low supply voltage source and another set of input signals operating a voltage operating range different than the first operating range. The voltage level shift circuit selectably switches between a plurality of different voltage operating ranges for the second voltage operating range.

Abstract: Some embodiments relate to an IC that includes an ESD-susceptible circuit. The IC includes a number of IC pads that are electrically coupled to respective nodes on the ESD-susceptible circuit. The IC pads are electrically accessible from external to the IC, and include one or more power supply pads and one or more I/O pads. The IC also includes a number of ESD protection devices coupled to the plurality of IC pads, respectively. A trigger circuit on the IC is configured to detect an ESD event impingent on a power supply pad and, in response to the detection, to trigger concurrent shunting of energy of the ESD event over both an ESD clamp element of an I/O pad and an ESD clamp element of the power supply pad. Other embodiments are also disclosed.