Abstract: The present disclosure relates to a terminal device, a display apparatus, a display panel, and a manufacturing method thereof, which is related to the field of display. The display panel includes a drive back plate, having a light transmitting region and a drive region at least partially surrounding the light transmitting region, wherein the drive region has a plurality of pixel circuits and at least includes first pixel circuits and second pixel circuits; a transfer layer, provided on a side of the drive back plate and including a plurality of layers of mutually insulated lead layers, wherein each of the lead layers includes a plurality of mutually insulated leads; each lead extends from the light transmitting region to the drive region and is connected to one of the first pixel circuits; a light emitting layer, provided on a side of the transfer layer away from the drive back plate.

Abstract: Display substrate and display device are provided. The display substrate includes: a base and sub-pixels thereon, the sub-pixel includes a light-emitting element and a sub-pixel driving circuit including a driving transistor and a compensation transistor; the compensation transistor has a first electrode coupled to a second electrode of the driving transistor, and a second electrode coupled to a gate electrode of the driving transistor; the compensation transistor includes a gate electrode and an active layer including a channel portion; the display substrate includes a pixel definition layer and shielding patterns, at least a portion of the shielding pattern is located between the pixel definition layer and the gate electrode of the compensation transistor, and an orthographic projection of the shielding pattern onto the base at least partially overlaps with an orthographic projection of corresponding channel portion of the compensation transistor onto the base.

Abstract: Provided are a display substrate and a display device. The display substrate includes a base substrate, and a driving circuit layer and a light-emitting device layer on the base substrate. The display substrate includes a light-transmitting display area and a normal display area, the normal display area surrounds at least a portion of the light-transmitting display area. The normal display area includes multiple normal driving circuits and multiple dummy driving circuits; some dummy driving circuit are used for driving light-emitting devices located in the light-transmitting display area. The display substrate further includes multiple normal data lines coupled to the normal driving circuits; at least one normal data line is coupled to a data signal input terminal through a data lead; an orthographic projection of the data lead onto the base substrate at least partially overlaps an orthographic projection of the dummy driving circuit onto the base substrate.

Abstract: A display panel includes: a drive backplane having a transparent region and a pixel region surrounding the transparent region, wherein a plurality of pixel circuits are provided in the pixel region, and the pixel circuits include a plurality of columns of first pixel circuits and a plurality of columns of second pixel circuits distributed along a row direction; and a light-emitting layer including a plurality of light-emitting devices, wherein the light-emitting devices include a plurality of first light-emitting devices located in the transparent region and a plurality of second light-emitting devices located in the pixel region, each of the first light-emitting devices is connected to one of the first pixel circuits via one of transparent electric conductors, and a deviation between delay time of a signal transmitted by any of the electric conductors and a standard delay time is not greater than a deviation threshold.

Abstract: A free-form prism-lens group includes: a primary prism, a first auxiliary lens and a second auxiliary lens, the primary prism includes three optical surfaces, the first auxiliary lens is arranged adjacent to the primary prism and is not used for imaging the image light entering the first auxiliary lens; the second auxiliary lens is arranged adjacent to the primary prism and a gap with a predetermined thickness is arranged between the second auxiliary lens and the primary prism, the second auxiliary lens extends in a direction perpendicular to an optical axis to cover an effective aperture of the image light entering the second auxiliary lens from the primary prism.

Abstract: The present application provides a method for game object control in a game map, a mobile terminal and a computer readable storage medium. The method for game object control includes: constructing a game map; creating a random path in each map layer to connect the map units within each map layer; configuring an attribute threshold value for the each map layer, wherein an attribute threshold value of a subsequent map layer is greater than or equal to an attribute threshold value of a preceding map layer; controlling a game object to move along any map unit connected on the random path from the map starting point to the jump unit in any map layer, and granting the game object an attribute bonus with an attribute point when the game object falls into the any map unit; and freely adding the attribute bonus for the game object to improve an attribute, wherein a sum of the attribute point of the attribute bonus added is less than or equal to an attribute threshold value for a current map layer.

Abstract: A display substrate and a display device are provided. In the display substrate, a first signal line transmitting a first scan signal extends along a first direction and a second signal line transmitting a data signal extends along a second direction; the data writing transistor transmits the data signal to the driving transistor under control of the first scan signal, the first scan signal is transmitted on the first signal line, and the data signal is transmitted on the second signal line; the driving transistor controls magnitude of a driving current according to the data signal; the channel region at least partially overlaps with the gate electrode; a planar shape of the channel region of the driving transistor is a strip shape extending along the second direction; the light emitting device receives the driving current and is driven by the driving current to emit light.

Abstract: A display substrate and a display device are provided. In the display substrate, the driving transistor includes an active pattern and a gate electrode, the active pattern includes a channel region, and an orthographic projection of the channel region on the base substrate at least partially overlaps with an orthographic projection of the gate electrode on the base substrate; the storage capacitor includes a first electrode plate and a second electrode plate. The first electrode plate is electrically connected with the gate electrode of the driving transistor; an orthographic projection of the second electrode plate on the base substrate at least partially overlaps with an orthographic projection of the first electrode plate on the base substrate, and does not overlap with an orthographic projection of the channel region of the driving transistor on the base substrate.

Abstract: A display substrate includes a base substrate (100), a circuit structure layer (20), a light emitting structure layer (4), at least one conductive layer, and at least one capacitance compensation layer (51). The base substrate (100) includes a first display region (A1) and a second display region (A2) at least partially surrounding the first display region (A1). The capacitance compensation layer (51) is located in the first display region (A1) and on a side of the light emitting structure layer (4) close to the base substrate (100). The capacitance compensation layer (51) includes at least one compensation capacitance electrode plate (511). An anode (411) of at least one first light emitting element (13) is electrically connected with the compensation capacitance electrode plate (511) of the capacitance compensation layer (51).

Abstract: A display substrate and a display device are provided. The display substrate includes a base substrate, a plurality of pixel driving circuits, a first planarization layer, a plurality of light-emitting elements, a first power supply signal wire and a data signal wire, the base substrate includes a first display region and a second display, the first planarization layer includes an element connection via hole electrically connecting at least one of the plurality of pixel driving circuits with at least one of the plurality of light-emitting elements, a power supply via hole electrically connecting at least one of the plurality of pixel driving circuits with the first power supply signal wire, and a data via hole electrically connecting at least one of the plurality of pixel driving circuits with the data signal wire, and the element connection via hole, the power supply via hole and the data via hole are arranged in a first direction.

Abstract: The application discloses a process integration method for improving leakage in MV devices, comprising: step I: forming gate structures, step II: depositing a first spacer material layer, step III: forming an additional spacer material layer, step IV: forming a first mask layer to cover an MV device formation region and open an LV device formation region, step V: performing an isotropic first etching to remove the additional spacer material layer from the LV device formation region, step VI: performing an anisotropic second etching to form a first layer of spacers of the low voltage region, step VII: forming a second mask layer to open the MV device formation region and to cover the LV device formation region, step VIII: performing an anisotropic third etching to form a first layer of spacers of the medium voltage region and additional spacers, and step IX: depositing and etching a second spacer material layer.

Abstract: A downhole injection system in selective communication with a wellhead assembly and a wellbore, the downhole injection system including a pumping chamber in selective communication with the wellhead assembly, the pumping chamber defining a wellhead pressure portion defining a wellhead pressure inlet in selective communication with the wellhead assembly and a wellhead pressure outlet in selective communication with the wellhead assembly, where the wellhead pressure portion is maintained at a wellhead pressure, and a chemical portion in selective communication with the wellbore, and a movable plate positioned within the pumping chamber, where the chemical portion is separated from the wellhead pressure portion by the movable plate.

Abstract: A display panel has a first region and a second region. The display panel includes: a plurality of first light-emitting devices in the first region; a plurality of second light-emitting devices, a plurality of first pixel circuits, and a plurality of second pixel circuits in the second region; and a plurality of connection lines in the first region and the second region. At least one first pixel circuit is electrically connected to at least one first light-emitting device through at least one connection line, at least one second pixel circuit is electrically connected to at least one second light-emitting device. The at least one row of first light-emitting devices includes light-emitting repeat units arranged in a first direction, and a light-emitting repeat unit includes first light-emitting devices; and connection lines connected to at least two first light-emitting devices in the light-emitting repeat units are made of different materials.

Abstract: A display panel has a first display region, at least one second display region and a third display region. The display panel includes a substrate, an anode layer and a pixel definition layer. The anode layer is disposed on the substrate and includes a plurality of anodes. The pixel definition layer is disposed on a side of the anode layer away from the substrate. The pixel definition layer is provided with a plurality of openings therein, an opening corresponds to an anode, and the opening exposes at least a portion of the anode corresponding thereto. The first display region, the at least one second display region and the third display region are each provided with openings of the plurality of openings, and aperture ratios of the first display region, the at least one second display region and the third display region sequentially decrease.

Abstract: A method for managing roles of device nodes in an aggregated system. Information regarding a device node of an aggregated node group is determined. Each device node of the aggregated node group has multiple power level states. One of a plurality of roles of the device node is determined based upon the information. Each role has an associated power level state. The power level state associated with the role or function of the device node is enabled. The device node is instructed to actuate the determined role.

Abstract: In one example, a method of relaying energy to device nodes is disclosed. The method includes transmitting energy waves into an aggregated node group with multiple device nodes. The transmitted energy waves are to actuate the device nodes into a higher power state and in part for storage by the device nodes. Energy streams reflected by the aggregated node group may be captured to indicate actuated and non-actuated device nodes. The method determines a target low power state device node from the non-actuated low power state device nodes and determine neighboring higher power state device nodes proximate to the target low power state device node. A communication signal may be transmitted to the neighboring higher power state device nodes directing them to relay the stored energy to the target low power state device node to actuate the target low power state device node into a higher power state.

Abstract: Provided is a pixel circuit. The pixel circuit includes a semiconductor layer disposed on a side of a base substrate, wherein the semiconductor layer is configured to form active layers of transistors in the pixel circuit, the active layer including a channel region, and a source region and a drain region disposed on two sides of the channel region; and a first gate metal layer disposed on the side of the base substrate, wherein the first gate metal layer is configured to form gates of the transistors, the gates of the transistors being arranged in sequence along a first direction, and the gate of each of the transistors being partially overlapped with the channel region.

Abstract: This disclosure relates to methods for reducing or preventing the formation of calcium sulfate scaling in disposal wells by treating produced water with water-soluble barium salts.

Abstract: A display substrate and a display device are provided. In the display substrate, the driving transistor includes an active pattern and a gate electrode, the active pattern includes a channel region, and an orthographic projection of the channel region on the base substrate at least partially overlaps with an orthographic projection of the gate electrode on the base substrate; the storage capacitor includes a first electrode plate and a second electrode plate. The first electrode plate is electrically connected with the gate electrode of the driving transistor; an orthographic projection of the second electrode plate on the base substrate at least partially overlaps with an orthographic projection of the first electrode plate on the base substrate, and does not overlap with an orthographic projection of the channel region of the driving transistor on the base substrate.

Abstract: A display substrate and a display device are provided. In the display substrate, a first signal line transmitting a first scan signal extends along a first direction and a second signal line transmitting a data signal extends along a second direction; the data writing transistor transmits the data signal to the driving transistor under control of the first scan signal, the first scan signal is transmitted on the first signal line, and the data signal is transmitted on the second signal line; the driving transistor controls magnitude of a driving current according to the data signal; the channel region at least partially overlaps with the gate electrode; a planar shape of the channel region of the driving transistor is a strip shape extending along the second direction; the light emitting device receives the driving current and is driven by the driving current to emit light.