Abstract: Provided are a method for constructing a sequencing library based on a DNA sample and use. The method includes: digesting the DNA sample with endonuclease to obtain a DNA sample with single-strand nicks; polymerizing the DNA sample with the single-strand nicks by using polymerase, dATP, dTTP, dGTP, and methylated dCTP to obtain a hybrid DNA, the hybrid DNA including two reversely complementary strands, where a 5?-end of each strand is an original sequence of the DNA sample, a 3?-end of each strand is a synthetic sequence, and all bases C in the 3?-end of each strand are methylated; subjecting the hybrid DNA to bisulfite treatment or other treatment to obtain converted hybrid DNA; and amplifying the converted hybrid DNA to obtain the sequencing library. Thus, the method can be used for whole genome bisulfite sequencing or multiplex PCR targeted sequencing and probe capture sequencing.

Abstract: The invention discloses a global shutter CMOS image sensor. Each pixel unit of the global shutter CMOS image sensor includes a photo diode, a storage region and a first reset region, wherein the photo diode includes a first photosensitive doped region; a gate structure of a first transfer transistor is formed between the storage region and the first photosensitive doped region; a gate structure of a global shutter transistor is formed between the first reset region and the first photosensitive doped region; and inhomogeneous potentials are formed in the first photosensitive doped region through a doping structure. According to the invention, photo-induced carriers in the PDs of the pixel units, especially photo-induced carriers in the PDs of large pixel units, can be simultaneously and completely transferred to the storage region and the first reset region, and the overall performance of the device is improved.

Abstract: Treatment chemicals (for example, scale inhibition chemicals) can be applied to fluids in a pipeline by diverting a side stream of the produced water from a pipeline into a vessel containing a solid material to release of an active fluid treatment agent from the solid material into the diverted produced water; merging the diverted produced fluid containing the active fluid treatment agent into the pipeline; and adjusting a flow rate of the diverted side stream of the produced water to change a level of the active fluid treatment agent in the flow of produced water in the pipeline. Treatment systems can include a pipeline, a vessel containing a solid treatment material; a bypass line providing a fluid connection between the pipeline and an inlet of the vessel; and a return line providing a fluid connection between an outlet of the vessel and the pipeline.

Abstract: A method and system for constructing sequencing library, includes: obtaining a transformed DNA sample with a universal sequence; performing amplification using a first specific primer located upstream of the target region and a first universal primer at least partially matching or overlapping the universal sequence; and performing amplification using a second specific primer, a second universal primer and a tagged primer. The second specific primer is located downstream of the first specific primer and upstream of the target region, the second universal primer overlaps at least a partial sequence of the second specific primer, and the tagged primer overlaps a partial sequence of the first universal primer. Alternatively, the second specific primer is located downstream of the target region, the second universal primer overlaps at least a partial sequence of the first specific primer, and the tagged primer overlaps a partial sequence of the second specific primer.

Abstract: The present invention provides a manufacturing method for a semiconductor memory device. The method comprises: providing a substrate, wherein a gate structure of a memory transistor is formed on a memory area of the substrate, and a first layer used for forming a gate structure of a peripheral transistor is formed on a peripheral area of the substrate; performing lightly doped drain ion implantation on an upper part of a portion, on two sides of the gate structure of the memory transistor, of the memory area of the substrate by applying the first layer as a mask of the peripheral area; and etching the first layer to form the gate structure of the peripheral transistor. According to the present invention, an ion diffusion degree of source and drain electrodes of the memory area may be effectively increased, and the uniformity of a memory cell device is improved.

Abstract: The present invention provides a semiconductor structure for a split gate flash memory cell and a method of manufacturing the same. The split gate flash memory cell provided by the present invention at least includes a select gate and a floating gate formed on the substrate, one side of the select gate is formed with an isolation wall, and the floating gate is on the other side of the isolation wall. An ion implantation region is formed in an upper portion of the substrate below the isolation wall, wherein the ion implantation type of the ion implantation region is different from the ion implantation type of the substrate. The manufactured split gate flash memory cell can reduce the influence of the channel inversion region on the channel current, thereby improving the characteristics of the channel current of the flash cell and optimizing the device performance.

Abstract: The present disclosure provides a non-volatile flash memory device and a manufacturing method thereof. The non-volatile flash memory device comprises at least a plurality of memory cells in a memory area. The manufacturing method comprises: providing a substrate, and defining the memory area of the non-volatile flash memory device on the substrate; forming a plurality of stack gates of the plurality of memory cells on a substrate corresponding to the memory area, and the top of each stack gate is a memory control gate of the memory cell; etching the memory control gates to reduce the height of the memory control gates with the fluid photoresist filled among the plurality of stack gates of the plurality of memory cells as a mask; and removing the fluid photoresist.

Abstract: Dissolving iron sulfide on the carbon steel tubing to yield chelated iron is achieved by treating the carbon steel tubing with a composition including an iron chelant and an additive. The additive includes at least one of an oxidizing agent and a base. A weight ratio of the iron chelant to the additive is in a weight range of 50:1 to 5:1.

Abstract: A polymeric scale inhibitor composition and a method for inhibiting metal sulfide scale formation in a well are provided. The composition includes 80-82 mol % of a first monomeric unit, where the first monomeric unit is 2-acrylamido-2-methylpropane sulfonic acid (AMPS). The composition also includes 2-18 mol % of a second monomeric unit selected from N-vinyl formamide, N-vinyl pyrrolidone, and diallyl dimethyl ammonium chloride. The composition further includes 2-18 mol % of a third monomeric unit selected from acrylic acid, methacrylic acid, esters of acrylic acid or methacrylic acid with an alcohol having 1 to 4 carbon atoms, and carboxyethyl acrylate. The polymeric scale inhibitors show superior adsorption characteristics on rocks and their subsequent release behavior allows for scale inhibition over extended time periods respectively at a significant volume of coreflood fluids. They are especially suited for downhole application via field scale squeeze treatments.

Abstract: The present disclosure provides a semiconductor device and a manufacturing method therefor. The manufacturing method for a semiconductor device is provided for forming through-holes in a semiconductor device, comprising: forming a plurality of shallow trench isolations in portions of a substrate corresponding to memory cell regions; forming a plurality of gates on surfaces of the portions of the substrate; forming spacers on side walls at both sides of the gates extending in the first direction; depositing a sacrificial layer on the memory cell region; removing portions of the sacrificial layer corresponding to the shallow trench isolations at memory cell drain, and depositing an isolation dielectric on the shallow trench isolations at the memory cell drain to form isolation strips; and removing the remaining sacrificial layer to form bottom through-holes in spaces formed after removing the remaining sacrificial layer.

Abstract: A method for monitoring pitting corrosion of a production tubing in a hydrocarbon well under downhole conditions during a production process using a coupon segment, the method comprising the steps of placing the coupon segment in the hydrocarbon well at a placement depth, the coupon segment is exposed to produced fluids and comprises an outer layer, an inner layer, and a hollow middle layer comprises a tracer fluid operable to leak into the produced fluids when pitting corrosion penetrates the outer layer, operating the production process in the hydrocarbon well such that produced fluids flow through the production tubing to a surface of the hydrocarbon well and wherein the produced fluids contact the coupon segment such that pitting corrosion occurs on the coupon segment; obtaining a sample of the produced fluids at the surface of the hydrocarbon well; and measuring an amount of the tracer fluid in the sample.

Abstract: An optical imaging system having a free-form surface includes an image source for generating image light, a lens assembly for reflecting the image light incident thereon, a first reflective surface, a second reflective surface, and a beam splitter that are disposed opposite to each other. The present disclosure allows the image light to pass through the lens assembly twice, reduces the weight of the optical system, and makes the system structure more compact, thus providing an optical imaging system featuring low distortion, high image quality, and a compact structure. A reflective surface is disposed between the image source and the lens assembly, so that the distance between the image source and the lens assembly can be reduced. The second reflective surface is designed as a free-form surface and a first lens and a second lens are aspheric lenses.

Abstract: The present invention provides a semiconductor structure for forming a CMOS image sensor. The semiconductor structure includes at least a photodiode formed in the substrate for collecting photoelectrons, and the photodiode has a pinning layer, a first doped region and a second doped region in order from top to bottom in a height direction of the substrate. The semiconductor structure further includes a third doped region located in the substrate corresponding to a laterally extending region of the second doped region. The first doped region has an ion doping concentration greater than the ion doping concentration of the second doped region, the ion doping concentration of the second doped region is greater than the ion doping concentration of the third doped region, and the third doped region is in contact with the second doped region after diffusion. The present invention also provides a method of manufacturing the above-described semiconductor structure.

Abstract: A method for monitoring pitting corrosion of a production tubing in a hydrocarbon well under downhole conditions during a production process using a coupon segment, the method comprising the steps of placing the coupon segment in the hydrocarbon well at a placement depth, the coupon segment is exposed to produced fluids and comprises an outer layer, an inner layer, and a hollow middle layer comprises a tracer fluid operable to leak into the produced fluids when pitting corrosion penetrates the outer layer, operating the production process in the hydrocarbon well such that produced fluids flow through the production tubing to a surface of the hydrocarbon well and wherein the produced fluids contact the coupon segment such that pitting corrosion occurs on the coupon segment; obtaining a sample of the produced fluids at the surface of the hydrocarbon well; and measuring an amount of the tracer fluid in the sample.

Abstract: The present invention discloses a flash. A channel region comprises a first shallow trench formed in the surface area of a semiconductor substrate. A tunneling dielectric layer and a polysilicon floating gate are formed in the first shallow trench and extended to the outside of the first shallow trench. A control dielectric layer and a polysilicon control gate are sequentially formed on the two side surfaces in the width direction and the top surface of the polysilicon floating gate. A source region and a drain region are formed in a self-aligned manner in active regions on the two sides in the length direction of the polysilicon floating gate. The present invention further discloses a method for manufacturing a flash. The present invention can break through the limitation of the length of the channel on the size of the memory cell, thus reducing the area of the memory cell.

Abstract: The invention discloses a global shutter CMOS image sensor. Each pixel unit of the global shutter CMOS image sensor includes a photo diode, a storage region and a first reset region, wherein the photo diode includes a first photosensitive doped region; a gate structure of a first transfer transistor is formed between the storage region and the first photosensitive doped region; a gate structure of a global shutter transistor is formed between the first reset region and the first photosensitive doped region; and inhomogeneous potentials are formed in the first photosensitive doped region through a doping structure. According to the invention, photo-induced carriers in the PDs of the pixel units, especially photo-induced carriers in the PDs of large pixel units, can be simultaneously and completely transferred to the storage region and the first reset region, and the overall performance of the device is improved.

Abstract: The present invention provides a semiconductor structure for a split gate flash memory cell and a method of manufacturing the same. The split gate flash memory cell provided by the present invention at least includes a select gate and a floating gate formed on the substrate, one side of the select gate is formed with an isolation wall, and the floating gate is on the other side of the isolation wall. An ion implantation region is formed in an upper portion of the substrate below the isolation wall, wherein the ion implantation type of the ion implantation region is different from the ion implantation type of the substrate. The invention also provides a manufacturing method for manufacturing the above-mentioned split gate flash memory cell, and the manufacturing method provided by the invention can be compatible with the existing manufacturing process of the split gate flash memory cell without increasing the process cost and the process complexity.

Abstract: Mitigating corrosion and surface scale formation in a sour gas well includes providing an oil-based liquid to a sour gas well having carbon steel tubing with iron sulfide on a surface of the carbon steel tubing, contacting the carbon steel tubing with the oil-based liquid, and adsorbing a first portion of the oil-based liquid onto the iron sulfide, thereby yielding a hydrophobic coating on the carbon steel tubing.

Abstract: The present invention provides a cancer vaccine comprising DNA repair-deficient cancer cells, wherein the cancer cells are contacted with a PARP inhibitor to induce DNA breaks. In another aspect, a method of treating a subject afflicted with a cancer comprising administering to the subject a therapeutically effective amount of a cancer vaccine comprising DNA repair-deficient cancer cells, wherein the cancer cells are contacted with a PARP inhibitor to induce DNA breaks, is provided. The present invention also provides a kit comprising DNA repair-deficient cancer cells modified as described herein, PARP inhibitors, immune checkpoint inhibitors, and combinations thereof, packaged in a suitable container.

Abstract: The present invention provides an ultra-thin optical component, including a mirror projection device and a reflector, where the mirror projection device is configured to refract image light symmetrically, then form a real image, and project the real image to the reflector, where the real image is located between a human eye and the reflector; and the reflector is configured to reflect the image light to the human eye. The present invention further provides a display device using the ultra-thin optical component and a virtual imaging method. By means of the ultra-thin optical component, the display device, and the imaging method in the present invention, an optical component is made thinner and lighter, and an image source display device is easier to configure and package, to achieve the appearance of ordinary glasses.