Patents by Inventor Ra-Min Tain
Ra-Min Tain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20250105536Abstract: A connector and a manufacturing method thereof. The connector includes at least one circuit substrate, at least one contact and a first elastic body. The at least one circuit substrate has a first surface. The at least one contact includes a fixed part and a first contact part that are connected to each other. The fixed part is disposed on the at least one circuit substrate. The first contact part protrudes out of the first surface and covers a part of the first surface. The first elastic body is disposed on the first surface and is electrically insulated. At least a part of the first elastic body is located between the first contact part and the first surface.Type: ApplicationFiled: March 14, 2024Publication date: March 27, 2025Applicant: UNIMICRON TECHNOLOGY CORP.Inventors: Ra-Min TAIN, Chunhsien CHIEN, Ching-Ho HSIEH, Ming-Hsing WU
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Publication number: 20250096145Abstract: An electronic packaging structure including a first circuit structure and a second circuit structure is provided. An electronic component is disposed between the first circuit structure and the second circuit structure. At least one of the first circuit structure and the second circuit structure (for example, the second circuit structure) has a cavity. The electronic component is embedded in the cavity, and may be encapsulated between the first circuit structure and the second circuit structure.Type: ApplicationFiled: December 2, 2024Publication date: March 20, 2025Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan, Chun-Hsien Chien
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Patent number: 12200861Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, at least one second build-up circuit layer, at least one conductive through hole, and a fine redistribution layer (RDL). The embedded block is fixed in a through cavity of the dielectric substrate. The electronic component is disposed in an opening of the embedded block. The first build-up circuit layer is disposed on a top surface of the dielectric substrate and electrically connected with the electronic component. The second build-up circuit layer is disposed on a bottom surface of the dielectric substrate and covers the embedded block. The conductive through hole is disposed in a via of the embedded block and electrically connects the first and the second build-up circuit layers. The fine RDL is disposed on and electrically connected to the first build-up circuit layer.Type: GrantFiled: November 2, 2022Date of Patent: January 14, 2025Assignee: Unimicron Technology Corp.Inventors: Guang-Hwa Ma, Chin-Sheng Wang, Ra-Min Tain
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Publication number: 20240414850Abstract: A circuit board structure includes a core layer, at least one electroplating metal layer, at least one dielectric layer and at least one conductive metal layer. The core layer includes at least one dielectric portion and at least one metal portion. The electroplating metal layer is disposed on at least one of a first surface and a second surface of the core layer, exposing a portion of at least one of the first surface and the second surface and at least connecting the at least one metal part. The dielectric layer is disposed on at least one of the first surface and the second surface and on the electroplating metal layer. The dielectric layer has at least one opening exposing a portion of the electroplating metal layer. The conductive metal layer is disposed in the opening of the dielectric layer and is correspondingly connected to the electroplating metal layer.Type: ApplicationFiled: January 4, 2024Publication date: December 12, 2024Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan, Shih-Lian Cheng
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Publication number: 20240159473Abstract: A vapor chamber structure includes a first flexible substrate, a second flexible substrate, a spacer, a flexible sealing member, and a working fluid. The first flexible substrate includes a first organic material layer, a first copper foil layer, and a first capillary structure layer. The second flexible substrate includes a second organic material layer, a second copper foil layer, and a second capillary structure layer. The first copper foil layer, the first capillary structure layer, the spacer, the second copper foil layer, and the second capillary structure layer are retracted by a distance relative to the first and second organic material layers to form a space. The first and second organic material layers and the flexible sealing member define a sealed chamber. The working fluid is disposed in the sealed chamber and located among the first and second capillary structure layers and grooves of the spacer.Type: ApplicationFiled: January 22, 2024Publication date: May 16, 2024Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain
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Publication number: 20230420818Abstract: A multi-layered resonator circuit structure and a multi-layered filter circuit structure. The multi-layered resonator circuit structure includes a multi-layered substrate, a plurality of resonators and a plurality of conductive components. The multi-layered substrate has a top surface, a bottom surface, and a ground layer. The top surface and the bottom surface face away from each other. The ground layer is located between the top surface and the bottom surface. A part of the plurality of resonators is/are disposed on the top surface. Another part of the plurality of resonators is/are disposed on the bottom surface. The plurality of conductive components is located in the multi-layered substrate. The plurality of resonators is electrically connected to the ground layer, respectively, via the plurality of conductive components.Type: ApplicationFiled: March 14, 2023Publication date: December 28, 2023Applicants: UNIMICRON TECHNOLOGY CORP., TUNGHAI UNIVERSITYInventors: Chi-Feng CHEN, Po-Sheng YEN, Ruey-Beei WU, Ra-Min TAIN, Chin-Sheng WANG, Jun-Ho CHEN
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Patent number: 11808787Abstract: A probe card testing device includes a first sub-circuit board, a second sub-circuit board, a connecting structure layer, a fixing plate, a probe head and a plurality of conductive probes. The first sub-circuit board is electrically connected to the second sub-circuit board by the connecting structure layer. The fixing plate is disposed on the second sub-circuit board and includes an opening and an accommodating groove. The opening penetrates the fixing plate and exposes a plurality of pads on the second sub-circuit board. The accommodating groove is located on a side of the fixing plate relatively far away from the second sub-circuit board and communicates with the opening. The probe head is disposed in the accommodating groove of the fixing plate. The conductive probes are set on the probe head and in the opening of the fixing plate. One end of the conductive probes is in contact with the corresponding pads, respectively.Type: GrantFiled: June 9, 2021Date of Patent: November 7, 2023Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, John Hon-Shing Lau, Kuo Ching Tien, Ra-Min Tain
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Publication number: 20230335466Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The bottom side of the first circuit structure has at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.Type: ApplicationFiled: June 20, 2023Publication date: October 19, 2023Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan, Jun-Ho Chen
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Publication number: 20230335506Abstract: An electronic packaging structure including a first circuit structure, a second circuit structure and at least one electronic device is provided. The first circuit structure includes a bottom conductive plate having at least one cavity. The first circuit structure is disposed on the second circuit structure. The first circuit structure and the second circuit structure are electrically connected to each other. The electronic device is disposed on the second circuit structure. The electronic device is disposed corresponding to the cavity of the first circuit structure.Type: ApplicationFiled: June 20, 2023Publication date: October 19, 2023Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain, Chih-Kai Chan
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Publication number: 20230268257Abstract: An electronic package structure and its manufacturing method are provided. The electronic package structure includes an interposer, a circuit board, a chip, and a circuit structure. The interposer includes an interposer substrate and a coaxial conductive element located in the interposer substrate. The interposer substrate includes a cavity. The coaxial conductive element includes a first conductive structure, a second conductive structure surrounding the first conductive structure, and a first insulation structure. The first insulation structure is disposed between the first and second conductive structures. The circuit board is disposed on a lower surface of the interposer substrate and electrically connected to the coaxial conductive element. The chip is disposed in the cavity and located on the circuit board, so as to be electrically connected to the circuit board.Type: ApplicationFiled: September 5, 2022Publication date: August 24, 2023Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain, Wen-Yu Lin, Tse-Wei Wang, Jun-Ho Chen, Guang-Hwa Ma
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Publication number: 20230268256Abstract: An electronic package structure and manufacturing method thereof. The electronic package structure includes a circuit board, an interposer, a chip, a circuit structure, and a coaxial conductive element. The interposer is disposed on the circuit board. The interposer has a through groove. The chip is disposed in the through groove and located on the circuit board to electrically connect with the circuit board. The circuit structure is disposed on the interposer. The coaxial conductive element penetrates the interposer to electrically connect the circuit structure and the circuit board. The coaxial conductive element includes a first conductive structure, a second conductive structure, and a first insulating structure. The second conductive structure surrounds the first conductive structure. The first insulating structure is disposed between the first conductive structure and the second conductive structure.Type: ApplicationFiled: August 18, 2022Publication date: August 24, 2023Applicant: Unimicron Technology Corp.Inventors: Chin-Sheng Wang, Ra-Min Tain, Wen-Yu Lin, Tse-Wei Wang, Jun-Ho Chen, Guang-Hwa Ma
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Patent number: 11690173Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, and at least one second build-up circuit layer. The dielectric substrate includes a through cavity penetrating the dielectric substrate. The embedded block is fixed in the through cavity. The embedded block includes a first through hole and a second through hole. The electronic component is disposed in the through hole of the embedded block. The first build-up circuit layer is disposed on the top surface of the dielectric substrate and covers the embedded block. The second build-up circuit layer is disposed on the bottom surface of the dielectric substrate and covers the embedded block.Type: GrantFiled: February 18, 2022Date of Patent: June 27, 2023Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Chin-Sheng Wang, Ra-Min Tain
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Patent number: 11678441Abstract: A circuit carrier board structure includes a first substrate, a second substrate, an adhesive layer, and a plurality of contact pads. The first substrate includes a first surface and a second surface, and also includes a plurality of first build-up layers sequentially stacked. The first build-up layers include a first dielectric layer and a first circuit layer. The second substrate includes a third surface and a fourth surface, and also includes a plurality of second build-up layers sequentially stacked. The second build-up layers include a second dielectric layer and a second circuit layer. The second surface is combined to the third surface. The connection pads are on the first surface and electrically connected to the first circuit layer. The first substrate is electrically connected to the second substrate. A manufacturing method of the circuit carrier board structure is also provided.Type: GrantFiled: November 18, 2020Date of Patent: June 13, 2023Assignee: Unimicron Technology Corp.Inventors: Wei-Ti Lin, Chun-Hsien Chien, Chien-Chou Chen, Fu-Yang Chen, Ra-Min Tain
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Publication number: 20230137841Abstract: A circuit carrier includes a substrate, a first build-up circuit structure, a second build-up circuit structure, a fine redistribution structure and at least one conductive through hole. The substrate has a top surface and a bottom surface opposite to each other. The first build-up circuit structure is disposed on the top surface of the substrate and electrically connected to the substrate. The second build-up circuit structure is disposed on the bottom surface of the substrate and electrically connected to the substrate. The fine redistribution structure is directly attached on the first build-up circuit structure, wherein a line width and a line spacing of the fine redistribution structure are smaller than those of the first build-up circuit structure. The conductive through hole penetrates the fine redistribution structure and a portion of the first build-up circuit structure and is electrically connected to the fine redistribution structure and the first build-up circuit structure.Type: ApplicationFiled: December 27, 2022Publication date: May 4, 2023Applicant: Unimicron Technology Corp.Inventors: John Hon-Shing Lau, Ra-Min Tain, Cheng-Ta Ko, Tzyy-Jang Tseng, Chun-Hsien Chien
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Patent number: 11641720Abstract: A circuit board includes a composite structure layer, at least one conductive structure, a thermally conductive substrate, and a thermal interface material layer. The composite structure layer has a cavity and includes a first structure layer, a second structure layer, and a connecting structure layer. The first structure layer includes at least one first conductive member, and the second structure layer includes at least one second conductive member. The cavity penetrates the first structure layer and the connecting structure layer to expose the second conductive member. The conductive structure at least penetrates the connecting structure layer and is electrically connected to the first conductive member and the second conductive member. The thermal interface material layer is disposed between the composite structure layer and the thermally conductive substrate, and the second structure layer is connected to the thermally conductive substrate through the thermal interface material layer.Type: GrantFiled: April 6, 2021Date of Patent: May 2, 2023Assignee: Unimicron Technology Corp.Inventors: Pei-Wei Wang, Shao-Chien Lee, Ra-Min Tain, Chi-Chun Po, Po-Hsiang Wang, Pei-Chang Huang, Chin-Min Hu
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Patent number: 11631626Abstract: A package structure includes a first circuit board, a second circuit board, at least one electronic component, at least one conductive lead, and a molding compound. The first circuit board includes a first circuit layer and a second circuit layer. The second circuit board includes a third circuit layer and a fourth circuit layer. The electronic component is disposed between the first circuit board and the second circuit board. The conductive lead contacts at least one of the second circuit layer and the third circuit layer. The conductive lead has a vertical height, and the vertical height is greater than a vertical distance between the second circuit layer and the third circuit layer. The molding compound covers the first circuit board, the second circuit board, the electronic component, and the conductive lead. The molding compound exposes the first circuit layer and the fourth circuit layer, and the conductive lead extends outside the molding compound.Type: GrantFiled: March 18, 2021Date of Patent: April 18, 2023Assignee: Unimicron Technology Corp.Inventors: Ra-Min Tain, Po-Hsiang Wang, Chi-Chun Po
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Publication number: 20230067112Abstract: A vapor chamber structure includes a thermally conductive shell, a capillary structure layer, and a working fluid. The thermally conductive shell includes a first thermally conductive portion and a second thermally conductive portion. The first thermally conductive portion and the second thermally conductive portion are a thermally conductive plate that is integrally formed, and the thermally conductive shell is formed by folding the thermally conductive plate in half and then sealing the thermally conductive plate. The first thermally conductive portion has at least one first cavity, the second thermally conductive portion has at least one second cavity. At least one sealed chamber is defined between the thermally conductive plate, the first cavity and the second cavity. A pressure in the sealed chamber is lower than a standard atmospheric pressure. The capillary structure layer covers an inner wall of the sealed chamber. The working fluid is filled in the sealed chamber.Type: ApplicationFiled: November 9, 2022Publication date: March 2, 2023Applicant: Unimicron Technology Corp.Inventors: Ra-Min Tain, John Hon-Shing Lau, Pu-Ju Lin, Wei-Ci Ye, Chi-Hai Kuo, Cheng-Ta Ko, Tzyy-Jang Tseng
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Publication number: 20230046699Abstract: A circuit board structure includes a dielectric substrate, at least one embedded block, at least one electronic component, at least one first build-up circuit layer, at least one second build-up circuit layer, at least one conductive through hole, and a fine redistribution layer (RDL). The embedded block is fixed in a through cavity of the dielectric substrate. The electronic component is disposed in an opening of the embedded block. The first build-up circuit layer is disposed on a top surface of the dielectric substrate and electrically connected with the electronic component. The second build-up circuit layer is disposed on a bottom surface of the dielectric substrate and covers the embedded block. The conductive through hole is disposed in a via of the embedded block and electrically connects the first and the second build-up circuit layers. The fine RDL is disposed on and electrically connected to the first build-up circuit layer.Type: ApplicationFiled: November 2, 2022Publication date: February 16, 2023Applicant: Unimicron Technology Corp.Inventors: Guang-Hwa Ma, Chin-Sheng Wang, Ra-Min Tain
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Patent number: 11545412Abstract: A package structure including a circuit board and a heat generating element is provided. The circuit board includes a plurality of circuit layers and a composite material layer. A thermal conductivity of the composite material layer is between 450 W/mK and 700 W/mK. The heat generating element is disposed on the circuit board and electrically connected to the circuit layers. Heat generated by the heat generating element is transmitted to an external environment through the composite material layer.Type: GrantFiled: November 19, 2020Date of Patent: January 3, 2023Assignee: Unimicron Technology Corp.Inventors: Pei-Wei Wang, Ching Sheng Chen, Ra-Min Tain, Ming-Hao Wu, Hsuan-Wei Chen
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Patent number: 11540396Abstract: A circuit board structure includes a first sub-circuit board, a second sub-circuit board, and a third sub-circuit board. The first sub-circuit board has an upper surface and a lower surface opposite to each other, and includes at least one first conductive through hole. The second sub-circuit board is disposed on the upper surface of the first sub-circuit board and includes at least one second conductive through hole. The third sub-circuit board is disposed on the lower surface of the first sub-circuit board and includes at least one third conductive through hole. At least two of the first conductive through hole, the second conductive through hole, and the third conductive through hole are alternately arranged in an axial direction perpendicular to an extending direction of the first sub-circuit board. The first sub-circuit board, the second sub-circuit board, and the third sub-circuit board are electrically connected to one another.Type: GrantFiled: March 3, 2021Date of Patent: December 27, 2022Assignee: Unimicron Technology Corp.Inventors: Tzyy-Jang Tseng, Shao-Chien Lee, John Hon-Shing Lau, Chen-Hua Cheng, Ra-Min Tain