Abstract: Systems, methods, and apparatus for communication over a serial bus in accordance with an I3C protocol are described that enable a non-participating device to cause a master device on an I3C bus transmit a STOP condition that terminates a transaction with a slave device coupled to the I3C bus. A method performed at a master device coupled to a serial bus includes initiating a transaction between the master device and a first slave device, terminating the transaction before completion of the transaction when a second slave device intervenes in the transaction, and servicing the second slave device after terminating the transaction. The transaction may include transmissions of data frames over the serial bus. The second slave device may intervene when it is not a party to the transaction.

Abstract: Systems, methods, and apparatus for a slave-to-slave communication over a serial communication link are provided. An apparatus includes an interface adapted to couple the apparatus to a serial bus, and a processing circuit. The processing circuit may be configured to receive a request for a slave-to-slave transaction while servicing an in-band interrupt detected on a serial bus, the request for the slave-to-slave transaction indicating a source address and a target address, generate a first frame that includes the source address, the target address and a command code configured to initiate the slave-to-slave transaction between the source slave device and at least one target slave device, and initiate a data transfer on the serial bus between the source slave device and the at least one target slave device by transmitting the first frame on the serial bus.

Abstract: In an aspect, an integrated circuit obtains a set of general purpose input/output (GPIO) signals for one or more peripheral devices, obtains a first virtual GPIO packet that includes the set of GPIO signals independent of a central processing unit, and transmits the first virtual GPIO packet to the one or more peripheral devices over an I3C bus independent of the central processing unit. The integrated circuit may further obtain a set of configuration signals for configuring one or more GPIO pins of the one or more peripheral devices, obtain a second virtual GPIO packet that includes the set of configuration signals independent of the central processing unit, and transmit the second virtual GPIO packet to the one or more peripheral devices over the I3C bus independent of the central processing unit.

Abstract: System, methods and apparatus are described that offer improved performance of an Inter-Integrated Circuit (I2C) bus. A method of testing a spike filter in a legacy I2C device includes generating a command to be transmitted on a serial bus in accordance with an I2C protocol, where the command includes an address corresponding to the legacy slave device, merging the command with a sequence of pulses to obtain a test signal, transmitting the test signal on the serial bus, and determining the efficacy of a spike filter in the first slave device based on whether the legacy slave device acknowledges the test signal. Each pulse in the sequence of pulses has a duration that is less than 50 ns. The spike filter is expected to suppress pulses that have a duration of less than 50 ns.

Abstract: Time-sequenced multi-device address assignment is provided. In this regard, an electronic device includes a plurality of client devices that are daisy-chained to a host interface port in a host controller by a reset line. The host controller is configured to assert the reset line to reset the daisy-chained client devices and then sequentially de-assert the reset line for the daisy-chained client devices according to a determined time sequence. Accordingly, the host controller assigns a unique client device address to each of the client devices when the reset line is de-asserted for the client device. By daisy-chaining the client devices via the reset line and sequentially assigning the unique client device addresses based on the determined time sequence, it is possible to assign the unique client device addresses from a single host interface port, thus reducing design complexity, footprint, and power consumption in the electronic device.

Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.

Abstract: Methods and apparatuses are described for obtaining a timestamp of an interface event. In one configuration, a host receives an in-band interrupt (IBI) from a sensor. The IBI indicates an interface event occurring at a first time on the sensor. The host issues a first host-initiated event at a second time after the first time in response to the IBI and starts a first host count of cycles of a host clock, wherein a start of the first host count of cycles is concurrent with issuing the first host-initiated event. The host further detects whether reception of the IBI was delayed. If the reception of the IBI was not delayed, the host obtains the timestamp of the interface event based on a first set of variables. If the reception of the IBI was delayed, the host obtains the timestamp of the interface event based on a second set of variables.

Abstract: Systems, methods, and apparatus are described that enable communication of flow-control signals over a serial bus. A method performed at a device coupled to the serial bus includes transmitting first data over the serial bus, transmitting one or more preamble bits preceding second data, disabling a driver coupled to a first wire of the serial bus while transmitting the preamble bits and while the first wire is in a first signaling state, terminating data transmission when the first wire has transitioned from the first signaling state to a second signaling state while the preamble bits are being transmitted, and transmitting second data after transmitting the preamble bits when the first wire has remained in the first signaling state during transmission of the preamble bits.

Abstract: Systems, methods, and apparatus are described that enable communication of flow-control signals over a serial bus that is operated in a phase differential mode of operation. A method performed at a device coupled to the serial bus includes transmitting first data while the serial bus is configured for a phase differential mode of operation, transmitting flow-control signaling after the first data has been transmitted, disabling a driver coupled to a first wire of the serial bus while transmitting the flow-control signaling and while the first wire is in a first signaling state, terminating data transmission when the first wire of the serial bus has transitioned to a second signaling state while the flow-control signaling is transmitted, and transmitting second data over the serial bus after transmitting the flow-control signaling when the first wire of the serial bus has remained in the first signaling state during transmission of the flow-control signaling.

Abstract: A device is provided that has a bus including a first line and a second line. A first set of devices are coupled to the bus and, in a first mode of operation, configured to use the first line for data transmissions and use the second line for a first clock signal. One or more additional lines are connected between two or more of the devices in the first set of devices for transmitting signaling between the two or more devices. A second set of devices are configured to use the bus and at least one of the additional lines for data transmissions in a second mode of operation, where in the second mode of operation symbols are encoded across the first line, the second line, and the at least one of the additional lines.

Abstract: Systems, methods, and apparatus are described that enable communication of in-band reset signals over a serial bus. A method performed at a slave device coupled to the serial bus includes configuring a reset controller to operate in one of plural modes, identifying a first reset pattern in signaling received from a multi-wire serial bus, complying with one or more transmissions defined by the protocol, asserting a reset input of a processing circuit in the slave device responsive to an identification of the first reset pattern when the reset controller is operated in a first mode, and ignoring the first reset pattern when the reset controller is operated in a second mode. The signaling received from the multi-wire serial bus may include one or more transmissions defined by a protocol used on the multi-wire serial bus. The reset controller may operate autonomously from the processing circuit in the first mode.

Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.

Abstract: Systems, methods, and apparatus are described that enable communication of in-band reset signals over a serial bus. A method performed at a slave device coupled to the serial bus includes configuring a reset controller to operate in one of plural modes, identifying a first reset pattern in signaling received from a multi-wire serial bus, complying with one or more transmissions defined by the protocol, asserting a reset input of a processing circuit in the slave device responsive to an identification of the first reset pattern when the reset controller is operated in a first mode, and ignoring the first reset pattern when the reset controller is operated in a second mode. The signaling received from the multi-wire serial bus may include one or more transmissions defined by a protocol used on the multi-wire serial bus. The reset controller may operate autonomously from the processing circuit in the first mode.

Abstract: System, methods and apparatus are described that facilitate a device to encode/decode data in a data communications interface coupled to a plurality of wires. The device determines a value of a sequence of data bits allocated to a frame, converts the value into a sequence of symbols associated with the frame, and transmits the sequence of symbols to a receiver. The device performs the converting by calculating base-N coefficients of a base-N number polynomial for the frame based on the value, where N is greater than 2, calculating base-2 coefficients of a base-2 number polynomial for each symbol according to a respective base-N coefficient corresponding to each symbol, determining changes of states of the plurality of wires for each symbol according to the base-2 coefficients respectively calculated for each symbol, and generating the sequence of symbols based on the changes of states of the plurality of wires for each symbol.

Abstract: A device is provided comprising a shared bus including a first and a second line, a first subset of devices and a second subset of devices coupled to the shared bus. The first subset of devices may be configured to operate according to a first protocol mode. The second subset of devices may be configured to operate according to a second protocol mode, wherein the second protocol mode is distinct from the first protocol mode. A first device within the first subset of devices may include a receiver circuit adapted to adjust a signal transition occurring on the first line while the second line is in a first logical state so that the signal transition instead occurs when the second line is in a second logical state. The signal transition is adjusted only if it occurs within a threshold amount of time from a second transition on the second line.

Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A first command is transmitted to devices coupled to a serial bus operated in a first mode in accordance with a first protocol to cause the serial bus to be operated in a second mode. After communicating in accordance with a second protocol while the serial bus is operated in the second mode, a second command is transmitted to the plurality of devices in accordance with the first protocol to terminate the second mode. In the second mode, extra symbols inserted into a sequence of symbols transmitted on the serial bus prevent the occurrence of an unintended signaling state on the serial bus. Pulses transmitted on a wire of the serial bus in the second mode may have their duration limited such that a filter of a second device suppresses the limited-duration pulses.

Abstract: Systems, methods and apparatus are described that offer improved performance of a sensor bus. A method includes transmitting a first command on a serial bus while operating in a first mode of operation, exchanging first data with the first device in accordance with a second protocol associated with the second mode of operation, and exchanging second data with the first device in accordance with the second protocol after the first period of time. The first command may be transmitted in accordance with a first protocol to cause a first device to operate in a second mode of operation. The first device may be idle for a first period of time after the first data has been exchanged.

Abstract: A device is provided that has a bus including a first line and a second line. A first set of devices are coupled to the bus and, in a first mode of operation, configured to use the first line for data transmissions and use the second line for a first clock signal. One or more additional lines are connected between two or more of the devices in the first set of devices for transmitting signaling between the two or more devices. A second set of devices are configured to use the bus and at least one of the additional lines for data transmissions in a second mode of operation, where in the second mode of operation symbols are encoded across the first line, the second line, and the at least one of the additional lines.

Abstract: Disclosed is an apparatus and method for automatically configuring a mobile device for collecting and inferring heart rate data of a user. The method may include capturing heart rate data for a user with a heart rate sensor that is coupled with a mobile device. The method may also include monitoring a activity state of the user from activity data captured by the mobile device, and detecting a constant activity state of the user. The method may also include inferring heart rate data for the user from the captured heart rate data during a period in which the user remains in the constant activity state. The method may also include providing the inferred heart rate data, as captured heart rate data, to a heart rate calculator during the period in which the user remains in the constant activity state.

Abstract: Time-sequenced multi-device address assignment is provided. In this regard, an electronic device includes a plurality of client devices that are daisy-chained to a host interface port in a host controller by a reset line. The host controller is configured to assert the reset line to reset the daisy-chained client devices and then sequentially de-assert the reset line for the daisy-chained client devices according to a determined time sequence. Accordingly, the host controller assigns a unique client device address to each of the client devices when the reset line is de-asserted for the client device. By daisy-chaining the client devices via the reset line and sequentially assigning the unique client device addresses based on the determined time sequence, it is possible to assign the unique client device addresses from a single host interface port, thus reducing design complexity, footprint, and power consumption in the electronic device.