Patents by Inventor Rainald Sander

Rainald Sander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10950509
    Abstract: A semiconductor device includes a first chip pad, a power semiconductor chip arranged on the first chip pad and including at least a first and a second power electrode, and a clip connected to the first power electrode. In this case, an integral part of the clip forms a shunt resistor and a first contact finger of the shunt resistor is embodied integrally with the clip.
    Type: Grant
    Filed: April 30, 2019
    Date of Patent: March 16, 2021
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Thomas Bemmerl, Steffen Thiele
  • Patent number: 10802053
    Abstract: This disclosure is directed to techniques that may accurately determine the amount of current flowing through a power switch circuit by measuring the voltage across the inherent impedance of the circuit connections. One connection may include a low impedance connection between the power switch output and ground, where the low impedance connection may be on the order of milliohms. By using a four-wire measurement, the sensing connections are not in the current path, so the measured value may not be affected by the current. The connection that makes up the current path can be accomplished with a variety of conductive materials. Conductive materials may have a temperature coefficient of resistivity that may impact a measurement of electric current as the temperature changes. Measuring the temperature of the current path, along with the voltage across the connection, may allow a more accurate current measurement.
    Type: Grant
    Filed: September 22, 2016
    Date of Patent: October 13, 2020
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Stephan Leisenheimer, Stefan Mieslinger
  • Publication number: 20190348333
    Abstract: A semiconductor device comprises a first chip pad, a power semiconductor chip arranged on the first chip pad and comprising at least a first and a second power electrode, and a clip connected to the first power electrode. In this case, an integral part of the clip forms a shunt resistor and a first contact finger of the shunt resistor is embodied integrally with the clip.
    Type: Application
    Filed: April 30, 2019
    Publication date: November 14, 2019
    Inventors: Rainald Sander, Thomas Bemmerl, Steffen Thiele
  • Patent number: 10468405
    Abstract: An electric circuit includes a semiconductor device. The semiconductor device includes a first transistor and a second transistor in a common semiconductor substrate. The first transistor is of the same conductivity type as the second transistor. A first source region of the first transistor is electrically connected to a first source terminal via a first main surface of the semiconductor substrate. A second drain region of the second transistor is electrically connected to a second drain terminal via a first main surface of the semiconductor substrate. A first drain region of the first transistor and a second source region of the second transistor are electrically connected to an output terminal via a second main surface of the semiconductor substrate. The electric circuit further includes a control circuit operable to control a first gate electrode of the first transistor and a second gate electrode of the second transistor.
    Type: Grant
    Filed: January 27, 2017
    Date of Patent: November 5, 2019
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Till Schloesser
  • Patent number: 10290567
    Abstract: A package which comprises an electrically conductive chip carrier, a first chip comprising a first connection terminal, a second connection terminal located on the chip carrier and a control terminal, a second chip comprising a first connection terminal, a second connection terminal located on the chip carrier and a control terminal, wherein the first chip and the second chip are connected to form a half bridge having inlet terminals and an outlet terminal, and a clip having three connection sections connecting the second connection terminal of the first chip with the first connection terminal of the second chip and with the outlet terminal of the half bridge.
    Type: Grant
    Filed: September 1, 2017
    Date of Patent: May 14, 2019
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Liu Chen, Teck Sim Lee
  • Patent number: 10277219
    Abstract: In accordance with an embodiment, an electronic circuit includes a first transistor device, at least one second transistor device, and a drive circuit. The first transistor device is integrated in a first semiconductor body, and includes a first load pad at a first surface of the first semiconductor body and a control pad and a second load pad at a second surface of the first semiconductor body. The at least one second transistor device is integrated in a second semiconductor body, and includes a first load pad at a first surface of the second semiconductor body and a control pad and a second load pad at a second surface of the second semiconductor body. The first load pad of the first transistor device and the first load pad of the at least one second transistor device are mounted to an electrically conducting carrier.
    Type: Grant
    Filed: June 30, 2017
    Date of Patent: April 30, 2019
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Rainald Sander, Andreas Meiser
  • Publication number: 20190074243
    Abstract: A package which comprises an electrically conductive chip carrier, a first chip comprising a first connection terminal, a second connection terminal located on the chip carrier and a control terminal, a second chip comprising a first connection terminal, a second connection terminal located on the chip carrier and a control terminal, wherein the first chip and the second chip are connected to form a half bridge having inlet terminals and an outlet terminal, and a clip having three connection sections connecting the second connection terminal of the first chip with the first connection terminal of the second chip and with the outlet terminal of the half bridge.
    Type: Application
    Filed: September 1, 2017
    Publication date: March 7, 2019
    Inventors: Rainald SANDER, Liu CHEN, Teck Sim LEE
  • Patent number: 10199491
    Abstract: A transistor is disclosed that includes a semiconductor body having a first horizontal surface. A drift region is arranged in the semiconductor body. A plurality of gate electrodes is arranged in trenches of the semiconductor body. The trenches have a longitudinal direction and extending parallel relative to each other. The longitudinal direction of the trenches extends in a first lateral direction of the semiconductor body. The body regions and the source regions are arranged between the trenches. The body regions are arranged between the drift region and the source regions in a vertical direction of the semiconductor body. In the first horizontal surface, the source regions and the body regions are arranged alternately in the first lateral direction. A source electrode is electrically connected to the source regions and the body regions in the first horizontal surface.
    Type: Grant
    Filed: August 3, 2016
    Date of Patent: February 5, 2019
    Assignee: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Rainald Sander, Markus Winkler, Michael Asam, Matthias Stecher
  • Patent number: 10069493
    Abstract: A circuit includes an electronic switch with an isolated gate, a measuring device for determining a charge at the isolated gate, and an energy supply for providing charge to the isolated gate based on the charge determined by the measuring device.
    Type: Grant
    Filed: October 21, 2016
    Date of Patent: September 4, 2018
    Assignee: INFINEON TECHNOLOGIES AG
    Inventors: Rainald Sander, Veli Kartal, Alfons Graf
  • Publication number: 20180080957
    Abstract: This disclosure is directed to techniques that may accurately determine the amount of current flowing through a power switch circuit by measuring the voltage across the inherent impedance of the circuit connections. One connection may include a low impedance connection between the power switch output and ground, where the low impedance connection may be on the order of milliohms. By using a four-wire measurement, the sensing connections are not in the current path, so the measured value may not be affected by the current. The connection that makes up the current path can be accomplished with a variety of conductive materials. Conductive materials may have a temperature coefficient of resistivity that may impact a measurement of electric current as the temperature changes. Measuring the temperature of the current path, along with the voltage across the connection, may allow a more accurate current measurement.
    Type: Application
    Filed: September 22, 2016
    Publication date: March 22, 2018
    Inventors: Rainald Sander, Stephan Leisenheimer, Stefan Mieslinger
  • Publication number: 20180006639
    Abstract: In accordance with an embodiment, an electronic circuit includes a first transistor device, at least one second transistor device, and a drive circuit. The first transistor device is integrated in a first semiconductor body, and includes a first load pad at a first surface of the first semiconductor body and a control pad and a second load pad at a second surface of the first semiconductor body. The at least one second transistor device is integrated in a second semiconductor body, and includes a first load pad at a first surface of the second semiconductor body and a control pad and a second load pad at a second surface of the second semiconductor body. The first load pad of the first transistor device and the first load pad of the at least one second transistor device are mounted to an electrically conducting carrier.
    Type: Application
    Filed: June 30, 2017
    Publication date: January 4, 2018
    Inventors: Rainald Sander, Andreas Meiser
  • Publication number: 20170221885
    Abstract: An electric circuit includes a semiconductor device. The semiconductor device includes a first transistor and a second transistor in a common semiconductor substrate. The first transistor is of the same conductivity type as the second transistor. A first source region of the first transistor is electrically connected to a first source terminal via a first main surface of the semiconductor substrate. A second drain region of the second transistor is electrically connected to a second drain terminal via a first main surface of the semiconductor substrate. A first drain region of the first transistor and a second source region of the second transistor are electrically connected to an output terminal via a second main surface of the semiconductor substrate. The electric circuit further includes a control circuit operable to control a first gate electrode of the first transistor and a second gate electrode of the second transistor.
    Type: Application
    Filed: January 27, 2017
    Publication date: August 3, 2017
    Inventors: Rainald Sander, Till Schloesser
  • Publication number: 20170041000
    Abstract: A circuit includes an electronic switch with an isolated gate, a measuring device for determining a charge at the isolated gate, and an energy supply for providing charge to the isolated gate based on the charge determined by the measuring device.
    Type: Application
    Filed: October 21, 2016
    Publication date: February 9, 2017
    Inventors: Rainald Sander, Veli Kartal, Alfons Graf
  • Patent number: 9525063
    Abstract: In an embodiment, a switching circuit includes input drain, source and gate nodes, a high voltage depletion mode transistor including a current path coupled in series with a current path of a low voltage enhancement mode transistor, and an overheating detection circuit for detecting overheating of the switching circuit.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: December 20, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Klaus Schiess, Rainald Sander
  • Publication number: 20160343850
    Abstract: A transistor is disclosed that includes a semiconductor body having a first horizontal surface. A drift region is arranged in the semiconductor body. A plurality of gate electrodes is arranged in trenches of the semiconductor body. The trenches have a longitudinal direction and extending parallel relative to each other. The longitudinal direction of the trenches extends in a first lateral direction of the semiconductor body. The body regions and the source regions are arranged between the trenches. The body regions are arranged between the drift region and the source regions in a vertical direction of the semiconductor body. In the first horizontal surface, the source regions and the body regions are arranged alternately in the first lateral direction. A source electrode is electrically connected to the source regions and the body regions in the first horizontal surface.
    Type: Application
    Filed: August 3, 2016
    Publication date: November 24, 2016
    Inventors: Rainald Sander, Markus Winkler, Michael Asam, Matthias Stecher
  • Patent number: 9479163
    Abstract: A circuit includes an electronic switch with an isolated gate, a measuring device for determining a charge at the isolated gate, and an energy supply for providing charge to the isolated gate based on the charge determined by the measuring device.
    Type: Grant
    Filed: July 30, 2013
    Date of Patent: October 25, 2016
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Veli Kartal, Alfons Graf
  • Patent number: 9431484
    Abstract: A transistor is disclosed that includes a semiconductor body having a first horizontal surface. A drift region is arranged in the semiconductor body. A plurality of gate electrodes is arranged in trenches of the semiconductor body. The trenches have a longitudinal direction and extending parallel relative to each other. The longitudinal direction of the trenches extends in a first lateral direction of the semiconductor body. The body regions and the source regions are arranged between the trenches. The body regions are arranged between the drift region and the source regions in a vertical direction of the semiconductor body. In the first horizontal surface, the source regions and the body regions are arranged alternately in the first lateral direction. A source electrode is electrically connected to the source regions and the body regions in the first horizontal surface.
    Type: Grant
    Filed: July 29, 2011
    Date of Patent: August 30, 2016
    Assignee: Infineon Technologies Austria AG
    Inventors: Rainald Sander, Markus Winkler, Michael Asam, Matthias Stecher
  • Patent number: 9429598
    Abstract: A semiconductor arrangement may include a multiplicity of semiconductor elements with controlling paths and controlled paths, the controlled paths having controllable conductivities and being connected parallel to each other. The semiconductor arrangement may also include a current evaluation circuit configured to measure current strengths of currents present in the controlled paths and to provide a signal representing the sum of the measured current strengths, and a control circuit connected to the controlling paths and configured to control the conductivities of the controlled paths in accordance with an input signal and the signal representing the sum of the current strengths. The at least one controlled path is controlled to have minimum conductivity if the signal representing the sum of the current strengths is below a threshold value.
    Type: Grant
    Filed: June 30, 2014
    Date of Patent: August 30, 2016
    Assignee: Infineon Technologies AG
    Inventor: Rainald Sander
  • Publication number: 20150377931
    Abstract: A semiconductor arrangement may comprise a multiplicity of semiconductor elements with controlling paths and controlled paths, the controlled paths having controllable conductivities and being connected parallel to each other. The semiconductor arrangement may also comprise a current evaluation circuit configured to measure current strengths of currents present in the controlled paths and to provide a signal representing the sum of the measured current strengths, and a control circuit connected to the controlling paths and configured to control the conductivities of the controlled paths in accordance with an input signal and the signal representing the sum of the current strengths, wherein at least one controlled path is controlled to have minimum conductivity if the signal representing the sum of the current strengths is below a threshold value.
    Type: Application
    Filed: June 30, 2014
    Publication date: December 31, 2015
    Inventor: Rainald Sander
  • Patent number: 9048838
    Abstract: In an embodiment, a switching circuit includes input drain, source and gate nodes, a high voltage depletion mode transistor including a current path coupled in series with a current path of a low voltage enhancement mode transistor, and a current sense circuit for sensing the current flowing through a current sense path.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: June 2, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Klaus Schiess, Rainald Sander