Patents by Inventor Rainald Sander

Rainald Sander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6269014
    Abstract: In order to supply a load, e.g. an electric motor, with current bidirectionally, an H bridge configuration containing four switching transistors is used. In order to attain outstanding electrical conductivity and also thermal conductivity, a half-bridge configuration containing two transistors of opposite conductivity types is constructed. Each of the transistors is realized on a chip, the rear sides of which chips are seated on a common conductive support preferably produced from metal. Each housing is equipped with a support of this type. The rear side of each of the two chips is formed from a drain or source electrode of the transistors. A load can be connected to the support. Two half-bridge configurations can advantageously be combined to form an H bridge configuration.
    Type: Grant
    Filed: July 27, 2000
    Date of Patent: July 31, 2001
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Chihao Xu, Josef-Matthias Gantioler, Frank Auer
  • Patent number: 6185118
    Abstract: In a driver circuit for driving a half bridge, that has a high-side semiconductor switch and a low-side semiconductor switch that are connected in series between a first and a second supply potential terminal, a drive is allocated to each of the two semiconductor switches that are respectively switched inhibited or transmissive by the respective semiconductor switches according to the direction of a drive signal. A load can be connected between the high-side semiconductor switch and the low-side semiconductor switch. For an inhibited state of a semiconductor switch, its drive terminal is charged approximately with the potential of the second supply potential terminal in order to attain a negative bias voltage of the drive terminal opposite the source terminal.
    Type: Grant
    Filed: April 20, 2000
    Date of Patent: February 6, 2001
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Axel Christoph
  • Patent number: 6118308
    Abstract: A circuit configuration for a comparator provides that first and second transistors on an input side are connected jointly by their two control terminals to a first input terminal, and that the first and second transistors have different cutoff voltages. Such a circuit configuration has the advantage that at a zero-volt input voltage, no current is consumed. The circuit configuration can be connected directly to a high-voltage supply without the aid of regulating voltages or high-precision reference voltages.
    Type: Grant
    Filed: March 24, 1999
    Date of Patent: September 12, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventor: Rainald Sander
  • Patent number: 6057712
    Abstract: An integrated comparator includes an inverter with a first depletion FET and a first enhancement FET, and a series circuit with a second depletion FET and a second enhancement FET. The second depletion and enhancement FETs are connected in series between a first supply voltage terminal and a first input terminal. A node between the second enhancement and depletion FETs is connected to the gate terminal of the first enhancement FET. The transfer characteristic curve of the second enhancement FET is steeper than the transfer characteristic curve of the first enhancement FET. All of the MOSFETs are of the same channel type. The voltage to be compared is connected between the second enhancement FET and ground. The switching point is determined by the transfer characteristics of the two enhancement FETs.
    Type: Grant
    Filed: October 27, 1994
    Date of Patent: May 2, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Holger Heil, Josef-Matthias Gantioler, Rainald Sander
  • Patent number: 6054738
    Abstract: Field-effect-controllable power semiconductor components with a source-connected load are made conducting via a control circuit with an integrated charge pump. When a generator connected to the source side is in operation, then the source potential becomes higher than the drain potential. A parasitic diode therefore carries current in the control circuit. That current turns on a parasitic bipolar transistor that limits the gate potential to a value that is no longer sufficient for making the power semiconductor component conducting. This effect is prevented by connecting a further diode in antiseries with the parasitic diode.
    Type: Grant
    Filed: August 19, 1998
    Date of Patent: April 25, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainald Sander, Chihao Xu
  • Patent number: 6034448
    Abstract: A semiconductor switch, particularly an MOS high-side power switch, having at least one power transistor for driving a load, and having a circuit for driving the power transistor via an external control signal by activating the power transistor over its gate. In order to also assure low dissipated power of the MOS power transistor given a reversal of the power supply, an auxiliary circuit is provided for the activation of the MOS power transistor via its gate given upon such reversal.
    Type: Grant
    Filed: September 24, 1998
    Date of Patent: March 7, 2000
    Assignee: Siemens Aktiengesellschaft
    Inventors: Chihao Xu, Rainald Sander
  • Patent number: 5994752
    Abstract: A field-effect-controllable power semiconductor component, such as a power MOSFET or IGBT, includes a semiconductor body, at least one cell field, a multiplicity of mutually parallel-connected transistor cells disposed in the at least one cell field, and at least two temperature sensors integrated in the semiconductor body and disposed at different locations from each other on the semiconductor body. Thus a temperature gradient between a strongly heated local region of the semiconductor body and one of the temperature sensors is reduced and a response time in the event of an overload is shortened.
    Type: Grant
    Filed: September 18, 1996
    Date of Patent: November 30, 1999
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainald Sander, Alfons Graf
  • Patent number: 5726478
    Abstract: An integrated power semiconductor component includes a substrate of a first conduction type. At least one first region of a second conduction type is embedded in the substrate and at least one second region of the second conduction type is embedded in the substrate. A substrate contact supplies a supply voltage. Contact-making semiconductor components are embedded in the first region and in the second region. At least a portion of the semiconductor components in the first region control at least a portion of the semiconductor components in the second region. A third region of the second conduction type is disposed between the first region and the second region, and the first region and the third region are at different potentials.
    Type: Grant
    Filed: December 19, 1996
    Date of Patent: March 10, 1998
    Assignee: Siemens Aktiengesellschaft
    Inventors: Josef-Matthias Gantioler, Ludwig Leipold, Rainald Sander, Jens-Peer Stengl, Jenoe Tihanyi
  • Patent number: 5656968
    Abstract: In a circuit arrangement for regulating the load current of a power MOSFET, the drain-source voltage of the power MOSFET is imaged onto the input of a second MOSFET connected between a gate terminal and source terminal of the power MOSFET. When the input voltage exceeds the cut-off voltage, then the gate-source voltage at the power MOSFET is regulated back to a value that corresponds to the sum of the cut-off voltages of the second MOSFET and a third MOSFET. The gate terminals of third MOSFET and the power MOSFET are connected to one another.
    Type: Grant
    Filed: November 15, 1995
    Date of Patent: August 12, 1997
    Assignee: Siemens Aktiengesellschaft
    Inventors: Rainald Sander, Jenoe Tihanyi
  • Patent number: 5434521
    Abstract: An integrated comparator circuit includes two complementary MOSFETs having main current paths being connected together in a series circuit at a connecting point. An inverter stage has two complementary MOSFETs with gate terminals connected to the connecting point. First, second and third terminals are provided. The first and second terminals are for an operating voltage, and the second and third terminals are for a voltage to be compared. The series circuit is connected between the first and third terminals, and the inverter stage is connected between the first and second terminals. One of the MOSFETs of the series circuit connected to the first terminal and one of the MOSFETs of the inverter stage connected to the first terminal are of the same channel type. The other of the MOSFETs of the series circuit connected to the third terminal and the other of the MOSFETs of the inverter stage connected the second terminal are of the same channel type.
    Type: Grant
    Filed: November 19, 1992
    Date of Patent: July 18, 1995
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi
  • Patent number: 5371418
    Abstract: Power FETs having a load at the source side require a gate voltage lying above the drain voltage in order to be driven completely conductive. This can occur with a known pump circuit. In the drive circuit disclosed, the diode connected to the gate terminal of the power FET is a depletion FET whose substrate terminal is applied to the oscillating voltage that is required for the operation of the pump circuit. The cut off voltage is thus synchronously set relative to the oscillating voltage such that low losses arise when loading C.sub.GS and an adequately high inhibit voltage can be built up when loading the pump capacitor.
    Type: Grant
    Filed: July 23, 1993
    Date of Patent: December 6, 1994
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi
  • Patent number: 5272399
    Abstract: A circuit configuration for limiting current flowing through a power MOSFET includes a voltage divider being connected between drain and source terminals of the power MOSFET and having a node at which a voltage following a drain-to-source voltage of the power MOSFET drops. A control transistor has a load path connected between the gate terminal and the source terminal of the power MOSFET. The control transistor is made conducting as a function of the voltage at the node of the voltage divider if the drain-to-source voltage of the power MOSFET exceeds a predetermined value. A resistor is connected between the gate terminal of the control transistor and the gate terminal of the power MOSFET. A depletion FET has a drain terminal connected to the gate terminal of the control transistor. The source terminal of the depletion FET is connected to the node of the voltage divider. The gate terminal of the depletion FET is connected to the source terminal of the power MOSFET.
    Type: Grant
    Filed: January 15, 1993
    Date of Patent: December 21, 1993
    Assignee: Siemens Aktiengesellschaft
    Inventors: Jenoe Tihanyi, Ludwig Leipold, Rainald Sander
  • Patent number: 5266840
    Abstract: A circuit for detecting the non-operating condition of a load which is connected in series with an electronic switch wherein a comparator has a first input which is connected to the junction point between the load and the electronic switch and has a second input which is a reference voltage such that when the load fails the comparator produces an output to indicate such condition and wherein the reference voltage is lower than the normal voltage when the load is operating properly and is higher than when the load is in the inoperative condition.
    Type: Grant
    Filed: December 31, 1992
    Date of Patent: November 30, 1993
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber
  • Patent number: 5172290
    Abstract: The gate-source capacitance of a power MOSFET (1) can be protected against positive and negative excess voltages by two integrated Zener diodes (3, 4) the anodes of which are coupled to each other and the cathodes of which are respectively coupled to the gate and source terminals of the power MOSFET. However, when a control voltage is applied, the parasitic bipolar transistor associated with one of the Zener diodes is switched on and prevents the MOSFET from completely switching on. The parasitic bipolar transistor is rendered harmless by the fact that the anode terminal is coupled to a source terminal (S) MOSFET (1) when a gate-source voltage is applied.
    Type: Grant
    Filed: July 20, 1989
    Date of Patent: December 15, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Jenoe Tihanyi, Roland Weber, Rainald Sander
  • Patent number: 5160862
    Abstract: In order to rapidly reduce the magnetic energy of an inductive load (2), the driving voltage must be high. When the load (2) is disconnected via a MOSFET (3), then a premature activation of the MOSFET (3) given reversal of the voltage at the inductive load (2) must be prevented. A series circuit of a Zener diode and of a controllable switch (3) is connected between the gate and the load (2). A current source (depletion MOSFET 5) whose current is lower than the current that would flow upon Zener breakdown is connected between the gate and the source of the power MOSFET (1). The MOSFET (3) becomes conductive upon Zener breakdown and the energy is quickly reduced by a high voltage, essentially by the Zener voltage.
    Type: Grant
    Filed: November 6, 1991
    Date of Patent: November 3, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Hubert Rothleitner, Rainald Sander, Jenoe Tihanyi
  • Patent number: 5086364
    Abstract: The voltage (U.sub.DS) on a power MOSFET (1) is compared with a voltage (U.sub.V) derived from the sum of the voltages of a Zener diode (3) and the threshold voltage (U.sub.T) of a second MOSFET (5) to detect a short circuit in a load (2) in series with the power MOSFET (1). When this total voltage is exceeded, the second MOSFET conducts. Its load current is then evaluated as the short circuit signal.
    Type: Grant
    Filed: February 19, 1991
    Date of Patent: February 4, 1992
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber
  • Patent number: 4952827
    Abstract: A circuit arrangement for controlling load current of a power MOSFET wherein the load is connected at the source terminal includes a second FET having a defined threshold voltage connected with its drain-source path inserted between the gate and source of the power MOSFET. A third FET connects the gate terminal of the second FET to the drain voltage of the power MOSFET when the power MOSFET is in the conductive condition. When the drain-source voltage of the power MOSFET becomes higher than the threshold voltage of the second FET, the second FET becomes conductive and drives the gate-source voltage of the power MOSFET down.
    Type: Grant
    Filed: November 15, 1989
    Date of Patent: August 28, 1990
    Assignee: Siemens Aktiengellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber, Nance: Paul
  • Patent number: 4875131
    Abstract: A circuit for monitoring the temperature of a semiconductor structural component. The circuit includes a bipolar transistor (1) in thermal contact with a semiconductor structural element to be monitored, and a MOSFET (11) connected in series with a current source (12). The MOSFET (11) is maintained in a nonconducting state with two Zener diodes (13, 14) if the bipolar transistor (1) is the standard operating temperature of the semiconductor structural element. This circuit provides for a reduced zero current signal. The current flowing through the bipolar transistor (1) increases with temperature and the gate-source voltage of the MOSFET (11) is increases until it switches off. If the current flowing through the MOSFET (11) is greater than the impressed current of the current source (12) the potential across the current source takes a step increase a value near the supply voltage (V.sub.DD). This voltage step can then be detected as an excess-temperature signal.
    Type: Grant
    Filed: April 25, 1989
    Date of Patent: October 17, 1989
    Assignee: Siemens Aktiengesellschaft
    Inventors: Ludwig Leipold, Rainald Sander, Jenoe Tihanyi, Roland Weber