Patents by Inventor Rainald Sander

Rainald Sander has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9048838
    Abstract: In an embodiment, a switching circuit includes input drain, source and gate nodes, a high voltage depletion mode transistor including a current path coupled in series with a current path of a low voltage enhancement mode transistor, and a current sense circuit for sensing the current flowing through a current sense path.
    Type: Grant
    Filed: October 30, 2013
    Date of Patent: June 2, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Klaus Schiess, Rainald Sander
  • Publication number: 20150116025
    Abstract: In an embodiment, a switching circuit includes input drain, source and gate nodes, a high voltage depletion mode transistor including a current path coupled in series with a current path of a low voltage enhancement mode transistor, and a current sense circuit for sensing the current flowing through a current sense path.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Inventors: Ralf Otremba, Klaus Schiess, Rainald Sander
  • Publication number: 20150115324
    Abstract: In an embodiment, a switching circuit includes input drain, source and gate nodes, a high voltage depletion mode transistor including a current path coupled in series with a current path of a low voltage enhancement mode transistor, and an overheating detection circuit for detecting overheating of the switching circuit.
    Type: Application
    Filed: October 30, 2013
    Publication date: April 30, 2015
    Inventors: Ralf Otremba, Klaus Schiess, Rainald Sander
  • Publication number: 20150035385
    Abstract: A circuit includes an electronic switch with an isolated gate, a measuring device for determining a charge at the isolated gate, and an energy supply for providing charge to the isolated gate based on the charge determined by the measuring device.
    Type: Application
    Filed: July 30, 2013
    Publication date: February 5, 2015
    Inventors: Rainald SANDER, Veli KARTAL, Alfons GRAF
  • Patent number: 8710894
    Abstract: The present invention relates to a circuit arrangement having the following features: a load transistor having a control connection and a first and second load connection; a drive connection coupled to the control connection of the load transistor and serving for the application of a drive signal; a voltage limiting circuit connected between one of the load connections and the drive connection of the transistor; and a deactivation circuit connected to the voltage limiting circuit and serving for the deactivation of the voltage limiting circuit in a manner dependent on a deactivation signal, which is dependent on a load current through the load transistor and/or on a drive voltage of the load transistor.
    Type: Grant
    Filed: March 16, 2012
    Date of Patent: April 29, 2014
    Assignee: Infineon Technologies AG
    Inventors: Christian Arndt, Veli Kartal, Rainald Sander
  • Publication number: 20130026561
    Abstract: A transistor is disclosed that includes a semiconductor body having a first horizontal surface. A drift region is arranged in the semiconductor body. A plurality of gate electrodes is arranged in trenches of the semiconductor body. The trenches have a longitudinal direction and extending parallel relative to each other. The longitudinal direction of the trenches extends in a first lateral direction of the semiconductor body. The body regions and the source regions are arranged between the trenches. The body regions are arranged between the drift region and the source regions in a vertical direction of the semiconductor body. In the first horizontal surface, the source regions and the body regions are arranged alternately in the first lateral direction. A source electrode is electrically connected to the source regions and the body regions in the first horizontal surface.
    Type: Application
    Filed: July 29, 2011
    Publication date: January 31, 2013
    Applicant: Infineon Technologies Austria AG
    Inventors: Rainald Sander, Markus Winkler, Michael Asam, Matthias Stecher
  • Patent number: 8330252
    Abstract: An integrated circuit device includes a semiconductor chip and a control chip at different supply potentials. A lead chip island includes an electrically conductive partial region and an insulation layer. The semiconductor chip is arranged on the electrically conductive partial region of the lead chip island and the control chip is cohesively fixed on the insulation layer.
    Type: Grant
    Filed: October 10, 2007
    Date of Patent: December 11, 2012
    Assignee: Infineon Technologies AG
    Inventors: Joachim Mahler, Reimund Engl, Thomas Behrens, Wolfgang Kuebler, Rainald Sander
  • Publication number: 20120176164
    Abstract: The present invention relates to a circuit arrangement having the following features: a load transistor having a control connection and a first and second load connection, a drive connection coupled to the control connection of the load transistor and serving for the application of a drive signal, a voltage limiting circuit connected between one of the load connections and the drive connection of the transistor, a deactivation circuit connected to the voltage limiting circuit and serving for the deactivation of the voltage limiting circuit in a manner dependent on a deactivation signal, which is dependent on a load current through the load transistor and/or on a drive voltage of the load transistor.
    Type: Application
    Filed: March 16, 2012
    Publication date: July 12, 2012
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Christian Arndt, Veli Kartal, Rainald Sander
  • Patent number: 8169224
    Abstract: A power circuit includes a power transistor for feeding a load current to a load, a measuring transistor for coupling out a measurement current dependent on the load current, at least two coupling transistors for dividing the measurement current into an internal measurement current and into an external measurement current, wherein the external measurement current can be fed to an external evaluation circuit, and the internal measurement current is fed to an internal evaluation circuit for evaluation. A third coupling transistor can be coupled to the measuring transistor if a measuring device determines a non-coupled state, and the third coupling transistor can be decoupled from the measuring transistor if the measuring device determines a coupled state. The measuring device determines the coupled state if the external evaluation device is coupled to the power circuit, and the measuring device determines a non-coupled state if the external evaluation device is not coupled to the power circuit.
    Type: Grant
    Filed: July 8, 2009
    Date of Patent: May 1, 2012
    Assignee: Infineon Technologies Austria AG
    Inventors: Rainald Sander, Steffen Thiele, Markus Winkler
  • Patent number: 7843006
    Abstract: A semiconductor component arrangement includes a power transistor and a temperature measurement circuit. The power transistor includes a gate electrode, a source zone, a drain zone and a body zone. The body zone is arranged in a first semiconductor zone of a first conduction type. The temperature measuring circuit comprises a temperature-dependent resistor and an evaluation circuit coupled to the temperature-dependent resistor. The resistor is formed by a portion of said first semiconductor zone.
    Type: Grant
    Filed: February 1, 2007
    Date of Patent: November 30, 2010
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Markus Zundel
  • Publication number: 20100007328
    Abstract: A power circuit comprises a power transistor for feeding a load current to a load, a measuring transistor for coupling out a measurement current dependent on the load current, at least two coupling transistors for dividing the measurement current into an internal measurement current and into an external measurement current, wherein the external measurement current can be fed to an external evaluation circuit, and the internal measurement current is fed to an internal evaluation circuit for evaluation. A third coupling transistor can be coupled to the measuring transistor if a measuring device determines a non-coupled state, and the third coupling transistor can be decoupled from the measuring transistor if the measuring device determines a coupled state. The measuring device determines the coupled state if the external evaluation device is coupled to the power circuit, and the measuring device determines a non-coupled state if the external evaluation device is not coupled to the power circuit.
    Type: Application
    Filed: July 8, 2009
    Publication date: January 14, 2010
    Inventors: Rainald Sander, Steffen Thiele, Markus Winkler
  • Patent number: 7626795
    Abstract: A device and a method for protecting a controllable current consumer is provided wherein the current through the current consumer is detected and the control signal is altered when exceeding a threshold current such that the current through the current consumer will be altered. Thus, the circuit is implemented such that the current consumer is at the same time protected against overheating.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: December 1, 2009
    Assignee: Infineon Technologies AG
    Inventor: Rainald Sander
  • Patent number: 7449778
    Abstract: A power semiconductor module (41) as H-bridge circuit (42) has four power semiconductor chips (N1, N2, P1, P2) and a semiconductor control chip (IC). The semiconductor chips (N1, N2, P1, P2, IC) are arranged on three mutually separate large-area lead chip contact areas (43 to 45) of a lead plane (80). The semiconductor control chip (IC) is arranged on a centrally arranged lead chip contact area (45). An n-channel power semiconductor chip (N1, N2) as low-side switch (58, 59) and a p-channel power semiconductor chip (P1, P2) as high-side switch (48, 49) are in each case arranged on two laterally arranged lead chip contact areas (43, 44). The n-channel power semiconductor chips (N1, N2) are jointly at an earth potential (50) and the p-channel power semiconductor chips (P1, P2) are electrically connected to separate supply voltage sources (VS1, VS2).
    Type: Grant
    Filed: April 26, 2007
    Date of Patent: November 11, 2008
    Assignee: Infineon Technologies Austria AG
    Inventor: Rainald Sander
  • Patent number: 7439579
    Abstract: A trench transistor is described. In one aspect, the trench transistor has a cell array having a plurality of cell array trenches and a plurality of mesa zones arranged between the cell array trenches, and a semiconductor functional element formed in one of the mesa zones. A current flow guiding structure is provided in the mesa zone in which the semiconductor functional element is formed, said structure being formed at least partly below the semiconductor functional element and being configured such that vertically oriented current flows out of the semiconductor functional element or into the semiconductor functional element are made more difficult and horizontally oriented current flows through the semiconductor functional element are promoted.
    Type: Grant
    Filed: May 26, 2005
    Date of Patent: October 21, 2008
    Assignee: Infineon Technologies AG
    Inventors: Rainald Sander, Markus Zundel
  • Publication number: 20080246137
    Abstract: An integrated circuit device includes a semiconductor chip and a control chip at different supply potentials. A lead chip island includes an electrically conductive partial region and an insulation layer. The semiconductor chip is arranged on the electrically conductive partial region of the lead chip island and the control chip is cohesively fixed on the insulation layer.
    Type: Application
    Filed: October 10, 2007
    Publication date: October 9, 2008
    Applicant: Infineon Technologies AG
    Inventors: Joachim Mahler, Reimund Engl, Thomas Behrens, Wolfgang Kuebler, Rainald Sander
  • Patent number: 7408398
    Abstract: Circuit arrangement having a power transistor and a drive circuit for the power transistor The invention relates to a circuit arrangement having the following features: a power transistor (T) having a control terminal (G) and also a first and second load path terminal (D, S), the first load path terminal (D) of which is connected to a terminal for supply potential (V1) via an inductance-exhibiting line terminal (1) and the second load path terminal (S) of which serves for connecting a load (Z), and a first drive unit (10) for off-state driving of the power transistor (T) having an output (11) connected to the control terminal (G) of the power transistor (T1), and having a first current source arrangement (Iq1) connected between the output (AK) and a first drive potential (GND), in which case the first drive unit has a second current source arrangement (S2off, Iq2; S2off, Iq2, Iq21), which is connected to the output (AK) and which provides a current (I2; I2, I21) that is dependent on a temporal change in a
    Type: Grant
    Filed: April 19, 2005
    Date of Patent: August 5, 2008
    Assignee: Infineon Technologies AG
    Inventor: Rainald Sander
  • Patent number: 7339393
    Abstract: The invention relates to a gate drive circuit for, and in combination with, an insulated gate power transistor. The drive circuit is connected to the gate terminal of the transistor for the purpose of supplying a gate drive signal and being combined with the power transistor in the same chip housing. The drive circuit is set up to carry out a test mode which has been adapted for the purpose of testing the quality of the gate oxide of the power transistor.
    Type: Grant
    Filed: December 9, 2005
    Date of Patent: March 4, 2008
    Assignee: Infineon Technologies AG
    Inventor: Rainald Sander
  • Publication number: 20070252265
    Abstract: A power semiconductor module (41) as H-bridge circuit (42) has four power semiconductor chips (N1, N2, P1, P2) and a semiconductor control chip (IC). The semiconductor chips (N1, N2, P1, P2, IC) are arranged on three mutually separate large-area lead chip contact areas (43 to 45) of a lead plane (80). The semiconductor control chip (IC) is arranged on a centrally arranged lead chip contact area (45). An n-channel power semiconductor chip (N1, N2) as low-side switch (58, 59) and a p-channel power semiconductor chip (P1, P2) as high-side switch (48, 49) are in each case arranged on two laterally arranged lead chip contact areas (43, 44). The n-channel power semiconductor chips (N1, N2) are jointly at an earth potential (50) and the p-channel power semiconductor chips (P1, P2) are electrically connected to separate supply voltage sources (VS1, VS2).
    Type: Application
    Filed: April 26, 2007
    Publication date: November 1, 2007
    Inventor: Rainald Sander
  • Publication number: 20070205464
    Abstract: A semiconductor component arrangement includes a power transistor and a temperature measurement circuit. The power transistor includes a gate electrode, a source zone, a drain zone and a body zone. The body zone is arranged in a first semiconductor zone of a first conduction type. The temperature measuring circuit comprises a temperature-dependent resistor and an evaluation circuit coupled to the temperature-dependent resistor. The resistor is formed by a portion of said first semiconductor zone.
    Type: Application
    Filed: February 1, 2007
    Publication date: September 6, 2007
    Applicant: Infineon Technologies AG
    Inventors: Rainald Sander, Markus Zundel
  • Publication number: 20070195476
    Abstract: A device and a method for protecting a controllable current consumer is provided wherein the current through the current consumer is detected and the control signal is altered when exceeding a threshold current such that the current through the current consumer will be altered. Thus, the circuit is implemented such that the current consumer is at the same time protected against overheating, i.e. when reaching a temperature threshold, the ignition signal will be altered such that the current through the current consumer decreases.
    Type: Application
    Filed: February 22, 2007
    Publication date: August 23, 2007
    Inventor: Rainald Sander