Patents by Inventor Rajashree Baskaran

Rajashree Baskaran has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150309070
    Abstract: Briefly, in accordance with one or more embodiments, a method to test one or more sensors of a device under test may comprise capturing visual motion data of the device under test disposed on an arm of a pendulum apparatus while the arm of the pendulum apparatus is in motion, capturing data from the one or more sensors while the arm of the pending apparatus is in motion, and comparing the visual motion data with the data from the one or more sensors to determine a relationship between the visual motion data and the data from the one or more sensors.
    Type: Application
    Filed: April 29, 2014
    Publication date: October 29, 2015
    Inventors: Rajashree Baskaran, Neil Goodey
  • Publication number: 20150271408
    Abstract: Various embodiments are generally directed to an apparatus and method for determining when an eye is focused on a display scene and determining movement of the eye based on image information when the eye is focused on the display scene. Various embodiments may also include detecting motion of an apparatus based on motion information and adjusting at least one of a position and a size of a frame in the display scene based on at least one of the movement of the eye and the motion of the apparatus.
    Type: Application
    Filed: March 20, 2014
    Publication date: September 24, 2015
    Inventors: Ramon Cancel Olmo, Kunjal Parikh, Rajashree Baskaran, Daniel Zhang
  • Publication number: 20150266725
    Abstract: Methods of forming integrated MEMS structures are described. Those methods and structures may include forming at least one MEMS structure on a first substrate, forming a first bonding layer on a top surface of the first substrate, and then coupling the first bonding layer disposed on the first substrate to a second substrate, wherein the second substrate comprises a device layer. The bonding may comprise a layer transfer process, wherein an integrated MEMS device is formed.
    Type: Application
    Filed: June 8, 2015
    Publication date: September 24, 2015
    Inventor: Rajashree Baskaran
  • Patent number: 9061890
    Abstract: Methods of forming integrated MEMS structures are described. Those methods and structures may include forming at least one MEMS structure on a first substrate, forming a first bonding layer on a top surface of the first substrate, and then coupling the first bonding layer disposed on the first substrate to a second substrate, wherein the second substrate comprises a device layer. The bonding may comprise a layer transfer process, wherein an integrated MEMS device is formed.
    Type: Grant
    Filed: March 13, 2013
    Date of Patent: June 23, 2015
    Assignee: Intel Corporation
    Inventor: Rajashree Baskaran
  • Publication number: 20140292429
    Abstract: An embodiment includes an oscillator comprising an amplifier formed on a substrate; a multiple gate resonant channel array, formed on the substrate, including: (a) transistors including fins, each of the fins having a channel between source and drain nodes, coupled to common source and drain contacts; and (b) common first and second tri-gates coupled to each of the fins and located between the source and drain contacts; wherein the fins mechanically resonate at a first frequency when one of the first and second tri-gates is periodically activated to produce periodic downward forces on the fins. Other embodiments include a non planar transistor with a channel between the source and drain nodes and a tri-gate on the fin; wherein the fin mechanically resonates when the first tri-gate is periodically activated to produce periodic downward forces on the fin. Other embodiments are described herein.
    Type: Application
    Filed: March 28, 2013
    Publication date: October 2, 2014
    Inventors: Sasikanth Manipatruni, Raseong Kim, Rajashree Baskaran, Rajeev K. Dokania, Ian A. Young
  • Publication number: 20140264643
    Abstract: Methods of forming integrated MEMS structures are described. Those methods and structures may include forming at least one MEMS structure on a first substrate, forming a first bonding layer on a top surface of the first substrate, and then coupling the first bonding layer disposed on the first substrate to a second substrate, wherein the second substrate comprises a device layer. The bonding may comprise a layer transfer process, wherein an integrated MEMS device is formed.
    Type: Application
    Filed: March 13, 2013
    Publication date: September 18, 2014
    Inventor: Rajashree Baskaran
  • Publication number: 20140117470
    Abstract: An integrated circuit device that comprises a single semiconductor substrate, a device layer formed on a frontside of the single semiconductor substrate, a redistribution layer formed on a backside of the single semiconductor substrate, a through silicon via (TSV) formed within the single semiconductor substrate that is electrically coupled to the device layer and to the redistribution layer, a logic-memory interface (LMI) formed on a backside of the single semiconductor substrate that is electrically coupled to the redistribution layer, and a MEMS device formed on the backside of the single semiconductor substrate that is electrically coupled to the redistribution layer.
    Type: Application
    Filed: December 28, 2011
    Publication date: May 1, 2014
    Inventors: Rajashree Baskaran, Christopher M. Pelto
  • Publication number: 20130344659
    Abstract: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
    Type: Application
    Filed: August 22, 2013
    Publication date: December 26, 2013
    Inventors: Daoqiang Lu, Chuan Hu, Gilroy J. Vandentop, Shriram Ramanathan, Rajashree Baskaran, Valery M. Dubin
  • Patent number: 8541876
    Abstract: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.
    Type: Grant
    Filed: September 30, 2005
    Date of Patent: September 24, 2013
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Chuan Hu, Gilroy J. Vandentop, Shriram Ramanathan, Rajashree Baskaran, Valery M. Dubin
  • Publication number: 20130000117
    Abstract: Embodiments of the invention provide methods for forming electrical connections using liquid metals. Electrical connections that employ liquid metals are useful for testing and validation of semiconductor devices. Electrical connections are formed between the probes of a testing interface and the electronic interface of a device under test through a liquid metal region. In embodiments of the invention, liquid metal interconnects are comprised of gallium or liquid metal alloys of gallium. The use of liquid metal contacts does not require a predetermined amount of force be applied in order to reliably make an electrical connection.
    Type: Application
    Filed: June 30, 2011
    Publication date: January 3, 2013
    Inventors: Rajashree Baskaran, Kimin Jun, Ting Zhong, Roy E. Swart, Paul B. Fischer
  • Patent number: 7902617
    Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings.
    Type: Grant
    Filed: April 18, 2008
    Date of Patent: March 8, 2011
    Assignee: Intel Corporation
    Inventor: Rajashree Baskaran
  • Patent number: 7875934
    Abstract: Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices formed from such a substrate. A diamond island can form part of the thermal solution for an integrated circuit formed on the substrate, and the diamond island can also provide part of a stress engineering solution to improve performance of the integrated circuit. Other embodiments are described and claimed.
    Type: Grant
    Filed: November 7, 2008
    Date of Patent: January 25, 2011
    Assignee: Intel Corporation
    Inventors: Rajashree Baskaran, Kramadhati V. Ravi
  • Patent number: 7833816
    Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings.
    Type: Grant
    Filed: December 7, 2005
    Date of Patent: November 16, 2010
    Assignee: Intel Corporation
    Inventor: Rajashree Baskaran
  • Patent number: 7821073
    Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.
    Type: Grant
    Filed: April 3, 2008
    Date of Patent: October 26, 2010
    Assignee: Intel Corporation
    Inventors: Gilroy J. Vandentop, Rajashree Baskaran
  • Patent number: 7723759
    Abstract: An apparatus includes a metallization region including a plurality of metal layers on a device layer of a substrate, a via extending through the substrate and the device layer, and a heat spreading and stress engineering region in the substrate and adjacent to the device layer. The via contacts a metal layer in the metallization region.
    Type: Grant
    Filed: October 24, 2005
    Date of Patent: May 25, 2010
    Assignee: Intel Corporation
    Inventors: Rajashree Baskaran, Shriram Ramanathan, Patrick R. Morrow
  • Patent number: 7666714
    Abstract: In one embodiment, a method comprises coupling a coreless substrate panel to a pressure cover plate of a carrier, applying flux to the coreless substrate panel, placing at least one die on the coreless substrate panel, reflowing solder onto the coreless substrate panel, defluxing the coreless substrate panel, underfilling the coreless substrate panel, and attaching at least one heat spreader to the coreless substrate panel.
    Type: Grant
    Filed: December 29, 2006
    Date of Patent: February 23, 2010
    Assignee: Intel Corporation
    Inventors: Daoqiang Lu, Rajashree Baskaran, Charan Gurumurthy
  • Patent number: 7557438
    Abstract: A stacked die package includes a substrate (210, 310), a first die (220, 320) above the substrate, a spacer (230, 330) above the first die, a second die (240, 340) above the spacer, and a mold compound (250, 370) disposed around at least a portion of the first die, the spacer, and the second die. The spacer includes a heat transfer conduit (231, 331, 333, 351, 353) representing a path of lower overall thermal resistance than that offered by the mold compound itself. The heat transfer path created by the heat transfer conduit may result in better thermal performance, higher power dissipation rates, and/or lower operating temperatures for the stacked die package.
    Type: Grant
    Filed: April 27, 2006
    Date of Patent: July 7, 2009
    Assignee: Intel Corporation
    Inventors: Gregory M. Chrysler, Rajashree Baskaran
  • Patent number: 7517228
    Abstract: An integrated circuit may be coupled to a printed circuit board through a split socket. The integrated circuit may be packaged with a package substrate electrically coupled to a socket which, in turn, is electrically coupled to a printed circuit board. Between the printed circuit board and the package substrate, on the same side as the package substrate as the socket, may be positioned a flexible substrate. The flexible substrate may include a flexible sheet-like member made of a polymer, in one embodiment, and a plurality of microscale springs which electrically couple said flexible substrate to the package substrate.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: April 14, 2009
    Assignee: Intel Corporation
    Inventors: Rajashree Baskaran, Henning Braunisch
  • Publication number: 20090065788
    Abstract: Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices formed from such a substrate. A diamond island can form part of the thermal solution for an integrated circuit formed on the substrate, and the diamond island can also provide part of a stress engineering solution to improve performance of the integrated circuit. Other embodiments are described and claimed.
    Type: Application
    Filed: November 7, 2008
    Publication date: March 12, 2009
    Inventors: Rajashree Baskaran, Kramadhati V. Ravi
  • Publication number: 20090034206
    Abstract: An embodiment of the present invention is a technique to fabricate a package. A heat spreader (HS) array on a HS support substrate is formed. The HS array has a plurality of heat spreaders. A diced wafer supported by a wafer support substrate (WSS) is formed. The diced wafer has a plurality of thin dice. The thin dice in the diced wafer are bonded to the heat spreaders in the HS array to form HS-bonded thin dice between the HS support substrate and the WSS.
    Type: Application
    Filed: October 7, 2008
    Publication date: February 5, 2009
    Applicant: Intel Corporation
    Inventors: Daoqiang Lu, Rajashree Baskaran, Chuan Hu