Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings.

Abstract: In one embodiment, a method comprises coupling a coreless substrate panel to a pressure cover plate of a carrier, applying flux to the coreless substrate panel, placing at least one die on the coreless substrate panel, reflowing solder onto the coreless substrate panel, defluxing the coreless substrate panel, underfilling the coreless substrate panel, and attaching at least one heat spreader to the coreless substrate panel.

Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.

Abstract: An embodiment of the present invention is a technique to fabricate a package. A heat spreader (HS) array on a HS support substrate is formed. The HS array has a plurality of heat spreaders. A diced wafer supported by a wafer support substrate (WSS) is formed. The diced wafer has a plurality of thin dice. The thin dice in the diced wafer are bonded to the heat spreaders in the HS array to form HS-bonded thin dice between the HS support substrate and the WSS.

Abstract: A stacked die package includes a substrate (210, 310), a first die (220, 320) above the substrate, a spacer (230, 330) above the first die, a second die (240, 340) above the spacer, and a mold compound (250, 370) disposed around at least a portion of the first die, the spacer, and the second die. The spacer includes a heat transfer conduit (231, 331, 333, 351, 353) representing a path of lower overall thermal resistance than that offered by the mold compound itself. The heat transfer path created by the heat transfer conduit may result in better thermal performance, higher power dissipation rates, and/or lower operating temperatures for the stacked die package.

Abstract: An integrated circuit may be coupled to a printed circuit board through a split socket. The integrated circuit may be packaged with a package substrate electrically coupled to a socket which, in turn, is electrically coupled to a printed circuit board. Between the printed circuit board and the package substrate, on the same side as the package substrate as the socket, may be positioned a flexible substrate. The flexible substrate may include a flexible sheet-like member made of a polymer, in one embodiment, and a plurality of microscale springs which electrically couple said flexible substrate to the package substrate.

Abstract: Methods of forming a microelectronic structure are described. Embodiments of those methods include forming a first plurality of openings through a first surface of a substrate, forming a p-type TFTEC material within the first plurality of openings, forming a second plurality of openings substantially adjacent to the first plurality of openings through the first surface of the substrate, and then forming an n-type TFTEC material within the second plurality of openings.

Abstract: Some embodiments of the present invention include apparatuses and methods relating to stacked wafer or die packaging with enhanced thermal and device performance.

Abstract: A method of fabricating a microelectronic package having a direct contact heat spreader, a package formed according to the method, a die-heat spreader combination formed according to the method, and a system incorporating the package. The method comprises metallizing a backside of a microelectronic die to form a heat spreader body directly contacting and fixed to the backside of the die thus yielding a die-heat spreader combination. The package includes the die-heat spreader combination and a substrate bonded to the die.

Abstract: Disclosed is a method of forming a substrate having islands of diamond (or other material, such as diamond-like carbon), as well as integrated circuit devices formed from such a substrate. A diamond island can form part of the thermal solution for an integrated circuit formed on the substrate, and the diamond island can also provide part of a stress engineering solution to improve performance of the integrated circuit. Other embodiments are described and claimed.

Abstract: A self-assembled thin film thermoelectric device useful for thermal management of semiconductor devices, for medical treatment, or for other applications where precise, efficient, and controlled heating or cooling may be useful. TEC elements, including n-type TEC elements and p-type TEC elements may be self-assembled to binding sites on a substrate, and alternating TEC element types may be electrically coupled to each other with metallization in a serial circuit arrangement. A substrate suitable for self-assembly of a TFTEC device may include heat generating devices, cooling devices, or thermally neutral devices. Binding sites may be provided or activated so that TEC elements may be attracted to, aligned with, or attached to the binding sites.

Abstract: A packaged integrated circuit (IC) is described having an integrated circuit that is electrically coupled to its package's wiring with Carbon nanotubes (CNTs) placed within an electrically conductive material.

Abstract: Some embodiments of the present invention include selectively inducing back side stress opposite transistor regions to optimize transistor performance.