Abstract: Techniques and apparatus for allowing a network fabric to accept network devices associated with other fabric networks are described. An example technique involves establishing a communication session between a first network node and a first control plane of the network fabric, wherein the first network node supports a second control plane different from the first control plane; First routing information from the first network node is imported into a first routing table of the first control plane. Second routing information from a second network node is imported into a second routing table of the first network node.

Abstract: Methods, systems, and devices for wireless communications are described. A user equipment (UE) may communicate with a network entity within a wireless communications network. The UE may transmit a request for information to the network entity and, in response to the request, the UE may receive the requested information from the network entity. For example, the UE may request data from one or more data repositories associated with the network entity. In some examples, the information request may be associated with one or more measurements associated with operations of the network. In some instances, the UE may use a machine learning model to perform training or inference based on the information associated with the one or more measurements.

Abstract: A system for modulating a graphical user interface (GUI) comprises a user device in communication with a system controller. The user device comprises a display interface for displaying the GUI. The GUI defines a frame boundary a GUI size, and comprises content displayed via the display interface. The user device, the system controller and/or a synergistic combination thereof execute computer implementable steps for detecting a real-time status, determining the real-time status, and modulating the GUI on the basis of the determined real-time status. The real-time status is selected from the group consisting of a device user status, a device status, an auxiliary device status, a content status, and a combination thereof. The real-time status is determined based on status criteria stored within the memory of the system controller and/or the user device.

Abstract: A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.

Abstract: A new class of logic gates are presented that use non-linear polar material. The logic gates include multi-input majority gates. Input signals in the form of digital signals are driven to non-linear input capacitors on their respective first terminals. The second terminals of the non-linear input capacitors are coupled a summing node which provides a majority function of the inputs. In the multi-input majority or minority gates, the non-linear charge response from the non-linear input capacitors results in output voltages close to or at rail-to-rail voltage levels. In some examples, the nodes of the non-linear input capacitors are conditioned once in a while to preserve function of the multi-input majority gates.

Abstract: A system and method for providing technical support when using an application that includes recording and/or otherwise capturing a problem as a video file or screen image while using the application and sending the file or image to a technician from the application. The system includes a back-end server operating the online application and having a processor for processing data and information, a communications interface communicatively coupled to the processor, and a memory device storing data and executable code. When the code is executed, the processor can allow a user to record the problem that the user encounters while using the application as a file, send the file to a technical support team to be reviewed, and allow the user to correspond with a technician about the file.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may receive, from a first node, a quality of experience (QoE) configuration. The UE may receive, from the first node, a message indicating a handover to a second node that does not support the QoE configuration. The UE may perform, after completion of the handover to the second node. QoE measurements in accordance with the QoE configuration. Numerous other aspects are described.

Abstract: A ferroelectric memory chiplet in a multi-dimensional packaging. The multi-dimensional packaging includes a first die comprising a switch and a first plurality of input-output transceivers. The multi-dimensional packaging includes a second die comprising a processor, wherein the second die includes a second plurality of input-output transceivers coupled to the first plurality of input-output transceivers. The multi-dimensional packaging includes a third die comprising a coherent cache or memory-side buffer, wherein the coherent cache or memory-side buffer comprises ferroelectric memory cells, wherein the coherent cache or memory-side buffer is coupled to the second die via I/Os. The dies are wafer-to-wafer bonded or coupled via micro-bumps, copper-to-copper hybrid bond, or wire bond, Flip-chip ball grid array routing, chip-on-wafer substrate, or embedded multi-die interconnect bridge.

Abstract: A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.

Abstract: A disturb mitigation scheme is described for a 1TnC or multi-element ferroelectric gain bit-cell where after writing to a selected capacitor of the bit-cell, a cure phase is initiated. Between the cure phase and the write phase, there may be zero or more cycles where the selected word-line, bit-line, and plate-lines are pulled-down to ground. The cure phase may occur immediately before the write phase. In the cure phase, the word-line is asserted again just like in the write phase. In the cure phase, the voltage on bit-line is inverted compared to the voltage on the bit-line in the write phase. By programming a value in a selected capacitor to be opposite of the value written in the write phase of that selected capacitor, time accumulation of disturb is negated. This allows to substantially zero out disturb field on the unselected capacitors of the same bit-cell and/or other unselected bit-cells.

Abstract: A memory device includes a first electrode comprising a first conductive nonlinear polar material, where the first conductive nonlinear polar material comprises a first average grain length. The memory device further includes a dielectric layer comprising a perovskite material on the first electrode, where the perovskite material includes a second average grain length. A second electrode comprising a second conductive nonlinear polar material is on the dielectric layer, where the second conductive nonlinear polar material includes a third grain average length that is less than or equal to the first average grain length or the second average grain length.

Abstract: An adder with first and second majority gates. For a 1-bit adder, output from a 3-input majority gate is inverted and input two times to a 5-input majority gate. Other inputs to the 5-input majority gate are same as those of the 3-input majority gate. The output of the 5-input majority gate is a sum while the output of the 3-input majority gate is the carry. Multiple 1-bit adders are concatenated to form an N-bit adder. The input signals are driven to first terminals of non-ferroelectric capacitors while the second terminals are coupled to form a majority node. Majority function of the input signals occurs on this node. The majority node is then coupled to a first terminal of a non-linear polar capacitor. The second terminal of the capacitor provides the output of the logic gate. A reset mechanism initializes the non-linear polar capacitor before addition function is performed.

Abstract: A ferroelectric memory chiplet in a multi-dimensional packaging. The multi-dimensional packaging includes a first die comprising a switch and a first plurality of input-output transceivers. The multi-dimensional packaging includes a second die comprising a processor, wherein the second die includes a second plurality of input-output transceivers coupled to the first plurality of input-output transceivers. The multi-dimensional packaging includes a third die comprising a coherent cache or memory-side buffer, wherein the coherent cache or memory-side buffer comprises ferroelectric memory cells, wherein the coherent cache or memory-side buffer is coupled to the second die via I/Os. The dies are wafer-to-wafer bonded or coupled via micro-bumps, copper-to-copper hybrid bond, or wire bond, Flip-chip ball grid array routing, chip-on-wafer substrate, or embedded multi-die interconnect bridge.

Abstract: Certain aspects of the present disclosure provide techniques and apparatus for determining neural network functions (NNFs) and configuring and using corresponding machine learning (ML) models for performing one or more ML-based wireless communications management procedures. An example method performed by a user equipment includes transmitting, to a base station (BS), UE capability information indicating at least one radio capability of the UE and at least one machine learning (ML) capability of the UE and receiving, from the BS based on the UE capability information, ML configuration information indicating at least one neural network function (NNF) and at least one ML model corresponding to the at least one NNF.

Abstract: A configuration for efficiently placing a group of capacitors with one terminal connected to a common node is described. The capacitors are stacked and folded along the common node. In a stack and fold configuration, devices are stacked vertically (directly or with a horizontal offset) with one terminal of the devices being shared to a common node, and further the capacitors are placed along both sides of the common node. The common node is a point of fold. In one example, the devices are capacitors. N number of capacitors can be divided in L number of stack layers such that there are N/L capacitors in each stacked layer. The N/L capacitors are shorted together with an electrode (e.g., bottom electrode). The electrode can be metal, a conducting oxide, or a combination of a conducting oxide and a barrier material. The capacitors can be planar, non-planar or replaced by memory elements.

Abstract: A ferroelectric memory chiplet in a multi-dimensional packaging. The multi-dimensional packaging includes a first die comprising a switch and a first plurality of input-output transceivers. The multi-dimensional packaging includes a second die comprising a processor, wherein the second die includes a second plurality of input-output transceivers coupled to the first plurality of input-output transceivers. The multi-dimensional packaging includes a third die comprising a coherent cache or memory-side buffer, wherein the coherent cache or memory-side buffer comprises ferroelectric memory cells, wherein the coherent cache or memory-side buffer is coupled to the second die via I/Os. The dies are wafer-to-wafer bonded or coupled via micro-bumps, copper-to-copper hybrid bond, or wire bond, Flip-chip ball grid array routing, chip-on-wafer substrate, or embedded multi-die interconnect bridge.

Abstract: Aspects present herein relate to methods and devices for wireless communication including an apparatus, e.g., a UE and/or a base station. The apparatus may receive, from a base station, a logged measurement configuration including a PLMN ID and a NID, the logged measurement configuration further including at least one of a trace reference, a logging area, a MDT PLMN list, or a MDT NPN list. The apparatus may also store the PLMN ID and the NID based on the received logged measurement configuration. Additionally, the apparatus may compare the PLMN ID and the NID to an MDT SNPN list to identify if the PLMN ID and the NID are included in the MDT SNPN list. The apparatus may also transmit, to the base station, an availability indicator if the PLMN ID and the NID are included in the MDT SNPN list.

Abstract: Aspects of the present disclosure provide apparatus, methods, processing systems, and computer readable mediums for a nested conditional mobility procedure. In some cases, a method for wireless communications by a UE generally includes receiving configuration information configuring the UE for conditional handover (CHO) from a source master node (S-MN) to a target master node (T-MN) and for conditional primary secondary cell (PSCell) addition or change (CPAC) and performing a nested procedure based on an evaluation of conditions for both CHO and CPAAC in accordance with the configuration information.

Abstract: Various aspects of the present disclosure generally relate to wireless communication. In some aspects, a user equipment (UE) may transmit an indication of functionalities associated with artificial intelligence or machine learning (AI/ML) models supported by the UE. The UE may receive one or more AI/ML models associated with the functionalities. Numerous other aspects are described.

Abstract: A method for adapting text message communications in electronic financial transactions to accommodate users with color vision deficiency. During a registration process, a primary account number, a selection of an enrollment in a color vision deficiency accommodation service, a selection of a preferred critical text color, and an electronic device identifier are received from a user. During a subsequent electronic card present transaction process, the primary account number and the electronic device identifier are received from the user via a payment gateway webpage. During an adaptation process, a text of a message containing a critical text element communicated to the user regarding the transaction is adapted by presenting the critical text element in the preferred critical text color previously selected by the user. The message may be adapted within a template, or the message may be dynamically adapted by searching the message and identifying the critical text element.