Patents by Inventor Rajesh Khamankar

Rajesh Khamankar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20040142570
    Abstract: The present invention provides a method for fabricating a dual gate semiconductor device. In one aspect, the method comprises forming a nitridated, high voltage gate dielectric layer over a semiconductor substrate, patterning a photoresist over the nitridated, high voltage gate dielectric layer to expose the nitridated, high voltage dielectric within a low voltage region wherein the patterning leaves an accelerant residue on the exposed nitridated, high voltage gate dielectric layer. The method further includes subjecting the exposed nitridated, high voltage dielectric to a plasma to remove the accelerant residue.
    Type: Application
    Filed: January 6, 2004
    Publication date: July 22, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Brian K. Kirkpatrick, Rajesh Khamankar, Malcolm J. Bevan, April Gurba, Husam N. Alshareef, Clinton L. Montgomery, Mark H. Somervell
  • Publication number: 20040102010
    Abstract: Dual gate dielectric layers are formed on a semiconductor substrate for MOS transistor fabrication. A first dielectric layer (30) is formed on a semiconductor substrate (10). A first plasma nitridation process is performed on said first dielectric layer. The first dielectric layer (30) is removed in regions of the substrate and a second dielectric layer (50) is formed in these regions. A second plasma nitridation process is performed on the first dielectric layer and the second dielectric layer. MOS transistors (160, 170) are then fabricated using the dielectric layers (30, 50).
    Type: Application
    Filed: November 6, 2003
    Publication date: May 27, 2004
    Inventors: Rajesh Khamankar, Douglas T. Grider, Hiroaki Niimi, April Gurba, Toan Tran, James J. Chambers
  • Patent number: 6730566
    Abstract: A method is provided for non-thermally nitrided gate formation of high voltage transistor devices. The non-thermally nitrided gate formation is useful in the formation of dual thickness gate dielectric structures. The non-thermally nitrided gate formation comprises nitridation to introduce nitrogen atoms into the gate dielectric layer of the high voltage transistor devices to mitigate leakage associated with the high voltage transistor devices. The nitridation of the gate dielectric layer damages the surface of the gate dielectric layer. The damaged surface of the gate dielectric layer is removed by a relatively low temperature re-oxidation process. The low temperature re-oxidation process minimizes nitrogen loss during a subsequent photoresist stripping process and mitigates film densification, such that the structure can be readily etched by standard etching chemicals in subsequent processing.
    Type: Grant
    Filed: October 4, 2002
    Date of Patent: May 4, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Rajesh Khamankar, Husam N. Alshareef
  • Publication number: 20040067619
    Abstract: A method is provided for non-thermally nitrided gate formation of high voltage transistor devices. The non-thermally nitrided gate formation is useful in the formation of dual thickness gate dielectric structures. The non-thermally nitrided gate formation comprises nitridation to introduce nitrogen atoms into the gate dielectric layer of the high voltage transistor devices to mitigate leakage associated with the high voltage transistor devices. The nitridation of the gate dielectric layer damages the surface of the gate dielectric layer. The damaged surface of the gate dielectric layer is removed by a relatively low temperature re-oxidation process. The low temperature re-oxidation process minimizes nitrogen loss during a subsequent photoresist stripping process and mitigates film densification, such that the structure can be readily etched by standard etching chemicals in subsequent processing.
    Type: Application
    Filed: October 4, 2002
    Publication date: April 8, 2004
    Inventors: Hiroaki Niimi, Rajesh Khamankar, Husam N. Alshareef
  • Publication number: 20040067631
    Abstract: Seed layer roughness can be reduced in conjunction with formation of a SiGe gate electrode. Surface characteristics of a gate dielectric can be modified, such by use of a nitrogen containing gas, prior to deposition of the seed layer on to the dielectric. The modifications in surface characteristics enable a thin seed layer to be formed overlying the gate dielectric with a reduced roughness relative to many conventional approaches.
    Type: Application
    Filed: October 3, 2002
    Publication date: April 8, 2004
    Inventors: Haowen Bu, Stephanie Watts Butler, Rajesh Khamankar, Hiroaki Niimi
  • Publication number: 20040029391
    Abstract: The present invention provides a method for improving a physical property of a substrate, a method for manufacturing an integrated circuit, and an integrated circuit manufactured using the aforementioned method. In one aspect of the invention, the method for improving a physical property of a substrate includes subjecting the substrate to effects of a plasma process 830, wherein the substrate has a physical property defect value associated therewith subsequent to the plasma process. The method further includes exposing the substrate to an ultraviolet (UV) energy source 840 to improve the physical property defect value.
    Type: Application
    Filed: August 8, 2003
    Publication date: February 12, 2004
    Applicant: Texas Instruments Incorporated
    Inventors: Brian K. Kirkpatrick, Mercer Brugler, Eddie Breashears, Jon Holt, Corbett Zabierek, Rajesh Khamankar
  • Patent number: 6632747
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer by providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density. This annealing step is selected from a group of four re-oxidizing techniques: Consecutive annealing in a mixture of H2 and N2 (preferably less than 20% H2), and then a mixture of O2 and N2 (preferably less than 20% 02); annealing by a spike-like temperature rise (preferably less than 1 s at 1000 to 1150° C.) in nitrogen-comprising atmosphere (preferably N2/O2 or N2O/H2); annealing by rapid thermal heating in ammonia of reduced pressure (preferably at 600 to 1000° C.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: October 14, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Douglas T. Grider, Rajesh Khamankar, Sunil Hattangady
  • Publication number: 20030164525
    Abstract: A MOSFET structure including silicate gate dielectrics with nitridation treatments of the gate dielectric prior to gate material deposition.
    Type: Application
    Filed: January 23, 2003
    Publication date: September 4, 2003
    Inventors: Antonio L. P. Rotondaro, Luigi Colombo, Mark R. Visokay, Rajesh Khamankar, Douglas E. Mercer
  • Patent number: 6610614
    Abstract: A method of forming an ultra-thin dielectric layer, including the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: August 26, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Sunil Hattangady, Rajesh Khamankar
  • Publication number: 20030157773
    Abstract: A method for manufacturing a semiconductor device includes forming a first layer adjacent a semiconductor substrate. The first layer may comprise oxygen. The first layer may be subjected to a material comprising nitrogen to form a second layer. The second layer may be oxidized to form a dielectric layer which may have a relatively uniform nitrogen profile. Rapid thermal oxidation may be used to form the dielectric layer. The dielectric layer may have a physical thickness greater than a physical thickness of the second layer.
    Type: Application
    Filed: March 13, 2003
    Publication date: August 21, 2003
    Inventors: Jerry Hu, Paul E. Nicollian, Kwame N. Eason, Rajesh Khamankar, Mark S. Rodder, Sunil Hattangady
  • Patent number: 6600183
    Abstract: An electrode structure for a capacitor. The electrode structure includes a contact plug comprising an oxidation barrier 208 and a bottom electrode comprising a conductive adhesion-promoting portion 210 and an oxidation-resistant portion 204, the adhesion-promoting portion contacting the oxidation barrier of the contact plug. In further embodiments, the oxidation barrier and adhesion-promoting portion comprise Ti—Al—N.
    Type: Grant
    Filed: June 26, 1998
    Date of Patent: July 29, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Mark R. Visokay, Luigi Colombo, Rajesh Khamankar, Mark A. Kressley
  • Publication number: 20030109146
    Abstract: A method (20) of forming a semiconductor device (30). The method provides a semiconductor substrate (32), and the method forms (22) a non-stoichiometric silicon oxide layer (34b) in a fixed relationship relative to the semiconductor substrate and having a thickness of three monolayers or greater. The non-stoichiometric silicon oxide layer comprises SizOy and the ratio of y/z is less than two. The method also performs (24) a nitridation of the non-stoichiometric silicon oxide layer.
    Type: Application
    Filed: January 31, 2002
    Publication date: June 12, 2003
    Inventors: Luigi Colombo, Rajesh Khamankar, Antonio L.P. Rotondaro
  • Publication number: 20030080389
    Abstract: A method for manufacturing a semiconductor device includes forming a first layer adjacent a semiconductor substrate. The first layer may comprise oxygen. The first layer may be subjected to a material comprising nitrogen to form a second layer. The second layer may be oxidized to form a dielectric layer which may have a relatively uniform nitrogen profile. Rapid thermal oxidation may be used to form the dielectric layer. The dielectric layer may have a physical thickness greater than a physical thickness of the second layer.
    Type: Application
    Filed: October 31, 2001
    Publication date: May 1, 2003
    Inventors: Jerry Hu, Kwame N. Eason, Rajesh Khamankar, Mark S. Rodder, Paul E. Nicollian, Sunil Hattangady
  • Patent number: 6555431
    Abstract: A method for etching a feature in a platinum layer 834 overlying a second material 818 without substantially etching the second material. The method includes the the steps of: forming an adhesion-promoting layer 824 between the platinum layer and the second material; forming a hardmask layer 829 over the platinum layer; patterning and etching the hardmask layer in accordance with desired dimensions of the feature; and etching portions of the platinum layer not covered by the hardmask layer 832, the etching stopping on the adhesion-promoting layer. In further embodiments the adhesion-promoting and hardmask layers are Ti—Al—N including at least 1% of aluminum.
    Type: Grant
    Filed: November 16, 2000
    Date of Patent: April 29, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Guoqiang Xing, Scott R. Summerfelt, Rajesh Khamankar
  • Patent number: 6548366
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: April 15, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, Douglas T. Grider, Rajesh Khamankar
  • Patent number: 6503846
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density. This annealing step is selected from a group of four re-oxidizing techniques: Consecutive annealing in a mixture of H2 and N2 (preferably less than 20% H2), and then a mixture of O2 and N2 (preferably less than 20% O2); annealing by a spike-like temperature rise (preferably less than 1 s at 1000 to 1150° C.
    Type: Grant
    Filed: June 20, 2001
    Date of Patent: January 7, 2003
    Assignee: Texas Instruments Incorporated
    Inventors: Hiroaki Niimi, James J. Chambers, Rajesh Khamankar, Douglas T. Grider
  • Publication number: 20020197882
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Hiroaki Niimi, James J. Chambers, Rajesh Khamankar, Douglas T. Grider
  • Publication number: 20020197880
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Hiroaki Niimi, Sunil Hattangady, Rajesh Khamankar
  • Publication number: 20020197884
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Hiroaki Niimi, Douglas T. Grider, Rajesh Khamankar
  • Publication number: 20020197883
    Abstract: An embodiment of the present invention is a method of forming an ultra-thin dielectric layer, the method comprising the steps of: providing a substrate having a semiconductor surface; forming an oxygen-containing layer on the semiconductor surface; exposing the oxygen-containing layer to a nitrogen-containing plasma to create a uniform nitrogen distribution throughout the oxygen-containing layer; and re-oxidizing and annealing the layer to stabilize the nitrogen distribution, heal plasma-induced damage, and reduce interfacial defect density.
    Type: Application
    Filed: June 20, 2001
    Publication date: December 26, 2002
    Inventors: Hiroaki Niimi, Douglas T. Grider, Rajesh Khamankar, Sunil Hattangady