Patents by Inventor Rajesh Narwal
Rajesh Narwal has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 10336823Abstract: Provided herein are methods of treating B7-H1-expressing tumors comprising administering an effective amount of MEDI4736 or an antigen-binding fragment thereof.Type: GrantFiled: September 11, 2014Date of Patent: July 2, 2019Assignee: MedImmune LimitedInventors: Rajesh Narwal, David Fairman, Paul Robbins, Meina Liang, Amy Schneider, Carlos Chavez, Carina Herl, Min Pak, Hong Lu, Marlon Rebelatto, Keith Steele, Anmarie Boutrin, Li Shi, Shengyan Hong, Brandon Higgs, Lorin Roskos
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Patent number: 10232040Abstract: Provided herein are methods of treating non-small cell lung cancers comprising administering an effective amount of MEDI4736 or an antigen-binding fragment thereof and tremelimumab or an antigen-binding fragment thereof.Type: GrantFiled: May 12, 2015Date of Patent: March 19, 2019Assignee: MEDIMMUNE, LLCInventors: Rajesh Narwal, Paul Robbins, Joyson Karakunnel, Mohammed Dar
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Publication number: 20180175606Abstract: A circuit includes an input terminal and a regulated supply line for supplying an electronic device with an electrostatic discharge protection and driver circuit for the electronic device. The supply line is coupled to the input terminal via the circuitry, so that current injected into the input terminal may produce a voltage increase on the regulated supply line. A comparator sensitive to the voltage at the input terminal and the voltage on the supply line is provided. A current sink coupled with the supply line and being activatable to sink current from the supply line is also provided. The comparator is configured for activating the current sink as a result of the voltage at the input terminal exceeding the voltage on the supply line of a certain intervention threshold.Type: ApplicationFiled: June 29, 2017Publication date: June 21, 2018Inventors: Mauro Giacomini, Rajesh Narwal, Pravesh Kumar Saini
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Patent number: 9971372Abstract: A voltage regulator provides an output voltage, the voltage regulator configured to receive one of a plurality of different regulator reference voltages and a controller configured to provide a selection signal, the selection signal being used to control which of the regulator reference voltages the voltage regulator receives.Type: GrantFiled: August 24, 2017Date of Patent: May 15, 2018Assignee: STMicroelectronics International N.V.Inventor: Rajesh Narwal
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Publication number: 20170351289Abstract: A voltage regulator provides an output voltage, the voltage regulator configured to receive one of a plurality of different regulator reference voltages and a controller configured to provide a selection signal, the selection signal being used to control which of the regulator reference voltages the voltage regulator receives.Type: ApplicationFiled: August 24, 2017Publication date: December 7, 2017Inventor: Rajesh Narwal
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Patent number: 9753480Abstract: An embodiment of an arrangement includes a voltage regulator configured to provide an output voltage, said voltage regulator configured to receive one of a plurality of different regulator reference voltages and a controller configured to provide a selection signal, said selection signal being used to control which of said regulator reference voltages said voltage regulator receives.Type: GrantFiled: August 9, 2013Date of Patent: September 5, 2017Assignee: STMicroelectronics international N.V.Inventor: Rajesh Narwal
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Publication number: 20160222120Abstract: Provided herein are methods of treating B7-H1-expressing tumors comprising administering an effective amount of MEDI4736 or an antigen-binding fragment thereof.Type: ApplicationFiled: September 11, 2014Publication date: August 4, 2016Applicant: Medlmmune LimitedInventors: Rajesh Narwal, David Fairman, Paul Robbins, Meina Liang, Amy Schneider, Carlos Chavez, Carina Herl, Min Pak, Hong Lu, Marlon Rebelatto, Keith Steele, Anmarie Boutrin, Li Shi, Shengyan Hong, Brandon Higgs, Lorin Roskos
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Publication number: 20160060344Abstract: The present invention features methods of treating lung cancer (e.g., NSCLC) with an anti-PD-L1 antibody and tremelimumab in a subject identified as having a PD-L1 negative tumor.Type: ApplicationFiled: August 28, 2015Publication date: March 3, 2016Inventors: Rajesh Narwal, Marlon C. Rebelatto, Keith Steele, Paul Robbins, Ross Anthony Stewart, John A. Blake-Haskins, Joyson J. Karakunnel, Ramy Ibrahim, Aiman Shalabi, Alessandra Di Pietro, Li Shi, Shengyan Hong, Paul Stockman, Marc Ballas, Mohammed M. Dar
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Publication number: 20150328311Abstract: Provided herein are methods of treating non-small cell lung cancers comprising administering an effective amount of MEDI4736 or an antigen-binding fragment thereof and tremelimumab or an antigen-binding fragment thereof.Type: ApplicationFiled: May 12, 2015Publication date: November 19, 2015Inventors: Rajesh NARWAL, Paul Robbins, Joyson Karakunnel, Mohammed Dar
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System and method for switching between a first supply voltage and a second supply voltage of a load
Patent number: 9136733Abstract: A system switches between application of a first supply voltage and a second supply voltage to a load. The second supply voltage is a regulated voltage that is generated from the first supply voltage, or is alternatively generated from a reference voltage, such as bandgap. When the load is supplied from the first supply voltage, the regulated voltage is also generated from the first supply voltage. At or after switching the load to the second supply voltage, the regulated voltage is generated instead from the reference voltage. The load is a clock circuit, such as an oscillator. The controlled switching of the supply voltage for the load in the manner described addresses concerns over introducing errors in the output clock signal when the clock circuit's supply voltage is changed.Type: GrantFiled: June 23, 2011Date of Patent: September 15, 2015Assignee: STMicroelectronics International N.V.Inventors: Rajesh Narwal, Shantanu Goel -
Publication number: 20150042301Abstract: An embodiment of an arrangement includes a voltage regulator configured to provide an output voltage, said voltage regulator configured to receive one of a plurality of different regulator reference voltages and a controller configured to provide a selection signal, said selection signal being used to control which of said regulator reference voltages said voltage regulator receives.Type: ApplicationFiled: August 9, 2013Publication date: February 12, 2015Applicant: STMicroelectronics International N.V.Inventor: Rajesh NARWAL
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Patent number: 8502559Abstract: A circuit has an input configured to receive a periodic signal having a first value. First circuitry is provided to generate a pulse when said periodic signal has a rising edge and a pulse when said periodic signal has a falling edge. Second circuitry is configured to receive said pulses and responsive thereto to provide an output signal, said output signal having a same duty cycle as said input signal and having a second value.Type: GrantFiled: November 17, 2011Date of Patent: August 6, 2013Assignee: STMicroelectronics International N.V.Inventor: Rajesh Narwal
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Publication number: 20130127514Abstract: A circuit has an input configured to receive a periodic signal having a first value. First circuitry is provided to generate a pulse when said periodic signal has a rising edge and a pulse when said periodic signal has a falling edge. Second circuitry is configured to receive said pulses and responsive thereto to provide an output signal, said output signal having a same duty cycle as said input signal and having a second value.Type: ApplicationFiled: November 17, 2011Publication date: May 23, 2013Applicant: STMICROELECTRONICS PVT. LTD.Inventor: Rajesh Narwal
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SYSTEM AND METHOD FOR SWITCHING BETWEEN A FIRST SUPPLY VOLTAGE AND A SECOND SUPPLY VOLTAGE OF A LOAD
Publication number: 20120326517Abstract: A system switches between application of a first supply voltage and a second supply voltage to a load. The second supply voltage is a regulated voltage that is generated from the first supply voltage, or is alternatively generated from a reference voltage, such as bandgap. When the load is supplied from the first supply voltage, the regulated voltage is also generated from the first supply voltage. At or after switching the load to the second supply voltage, the regulated voltage is generated instead from the reference voltage. The load is a clock circuit, such as an oscillator. The controlled switching of the supply voltage for the load in the manner described addresses concerns over introducing errors in the output clock signal when the clock circuit's supply voltage is changed.Type: ApplicationFiled: June 23, 2011Publication date: December 27, 2012Applicant: STMICROELECTRONICS PVT. LTD.Inventors: Rajesh Narwal, Shantanu Goel -
Patent number: 7999573Abstract: An embodiment of a low-to-high-level voltage translator is proposed. This translator translates the low voltage swing signals for the core into high voltage swing signals of the I/O blocks. This translator may be particularly useful for high-speed application where the difference between the core and the I/O supply voltage is very large, e.g., the core is working at 0.8V and the I/O is working at 3.6V or higher without little or no static power dissipation. The proposed translator may give improved transition times and propagation delays as compared to conventional translators. The proposed translator may also use less hardware in comparison to other such translators.Type: GrantFiled: January 3, 2007Date of Patent: August 16, 2011Assignee: STMicroelectronics Pvt. Ltd.Inventors: Rajesh Narwal, Manoj Kumar
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Patent number: 7394291Abstract: A high voltage tolerant output buffer uses a substrate voltage control circuit to control the voltage at the substrate of the transistors in the output buffer. The circuitry of output buffer is such that the voltage between any two terminals of any of the transistors is not allowed to exceed the supply voltage of the output buffer. At the same time, the voltage at the source or drain of transistors of output buffer is not allowed to increase beyond its substrate voltage. The proposed circuit for output buffer can tolerate voltages higher than the voltage at which it is operated. The novel circuitry uses less hardware and prevents power dissipation in the circuit.Type: GrantFiled: December 22, 2006Date of Patent: July 1, 2008Assignee: STMicroelectronics Pvt. Ltd.Inventors: Rajesh Narwal, Manoj Kumar
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Publication number: 20070188193Abstract: An embodiment of a low-to-high-level voltage translator is proposed. This translator translates the low voltage swing signals for the core into high voltage swing signals of the I/O blocks. This translator may be particularly useful for high-speed application where the difference between the core and the I/O supply voltage is very large, e.g., the core is working at 0.8V and the I/O is working at 3.6V or higher without little or no static power dissipation. The proposed translator may give improved transition times and propagation delays as compared to conventional translators. The proposed translator may also use less hardware in comparison to other such translators.Type: ApplicationFiled: January 3, 2007Publication date: August 16, 2007Inventors: Rajesh Narwal, Manoj Kumar
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Publication number: 20070170955Abstract: A high voltage tolerant output buffer uses a substrate voltage control circuit to control the voltage at the substrate of the transistors in the output buffer. The circuitry of output buffer is such that the voltage between any two terminals of any of the transistors is not allowed to exceed the supply voltage of the output buffer. At the same time, the voltage at the source or drain of transistors of output buffer is not allowed to increase beyond its substrate voltage. The proposed circuit for output buffer can tolerate voltages higher than the voltage at which it is operated. The novel circuitry uses less hardware and prevents power dissipation in the circuit.Type: ApplicationFiled: December 22, 2006Publication date: July 26, 2007Applicant: STMICROELECTRONICS PVT. LTD.Inventors: Rajesh Narwal, Manoj Kumar
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Patent number: 7064595Abstract: The differential input receiver provides constant symmetrical hysteresis over a wide input signal range. The differential input receiver includes a pair of complementary differential comparators having common input terminals, a pair of series connected complementary current mirrors each having source terminals driven by the output terminals of the corresponding differential comparator, a pair of transistors connected in series across each differential pair transistor in each differential comparator to form a potential divider across it, and a pair of series connected inverting buffers connected to a common output of the differential comparators to provide the final output. The individual buffer outputs are fed back to the control terminals of the series connected transistors in a manner that provides positive feedback thereby providing equal rise-time, fall-delay and transition times in the output signal.Type: GrantFiled: December 21, 2004Date of Patent: June 20, 2006Assignee: STMicroelectronics PVT Ltd.Inventors: Manoj Kumar Sharma, Sunil Chandra Kasanyal, Rajesh Narwal
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Publication number: 20050184782Abstract: The differential input receiver provides constant symmetrical hysteresis over a wide input signal range. The differential input receiver includes a pair of complementary differential comparators having common input terminals, a pair of series connected complementary current mirrors each having source terminals driven by the output terminals of the corresponding differential comparator, a pair of transistors connected in series across each differential pair transistor in each differential comparator to form a potential divider across it, and a pair of series connected inverting buffers connected to a common output of the differential comparators to provide the final output. The individual buffer outputs are fed back to the control terminals of the series connected transistors in a manner that provides positive feedback thereby providing equal rise-time, fall-delay and transition times in the output signal.Type: ApplicationFiled: December 21, 2004Publication date: August 25, 2005Applicant: STMicroelectronics Pvt.Ltd.Inventors: Manoj Sharma, Sunil Kasanyal, Rajesh Narwal