Patents by Inventor Rakesh Jain

Rakesh Jain has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11611011
    Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: March 21, 2023
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
  • Patent number: 11595245
    Abstract: A device is configured to detect a triggering event within a network that is associated with a communication error between a first network device and a second network device. The device is further configured to identify a first node in a computer network map corresponding with the first network device and to identify node properties for the first node. The device is further configured to identify the error correction instructions in the node properties for the first node that include an address for rerouting data traffic to a third network device. The device is further configured to apply the error correction instructions where applying the error correction instructions suspends data traffic to the second network device and reroutes data traffic to the third network device.
    Type: Grant
    Filed: March 27, 2022
    Date of Patent: February 28, 2023
    Assignee: Bank of America Corporation
    Inventors: Sunny Bhattacharjee, Rakesh Jain, Adi Narayana Rao Garaga, Sidhan Ponnanakal
  • Patent number: 11508871
    Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The electron blocking layer is located between the active region and the p-type contact layer. In an embodiment, the electron blocking layer can include a plurality of sublayers that vary in composition.
    Type: Grant
    Filed: October 1, 2020
    Date of Patent: November 22, 2022
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
  • Publication number: 20220306672
    Abstract: The invention relates to non-systemic TGR5 agonist useful in the treatment of chemotherapy-induced diarrhea, diabetes, Type II diabetes, gestational diabetes, impaired fasting glucose, impaired glucose tolerance, insulin resistance, hyperglycemia, obesity, metabolic syndrome, ulcerative colitis, Crohn's disease, disorders associated with parenteral nutrition especially during short bowel syndrome, and irritable bowel syndrome (IBS), and other TGR5 associated diseases and disorders, having the Formula: where R1, R2, R2?, R3, R4, X1, X2, X3, X4, Q, and n are described herein.
    Type: Application
    Filed: February 25, 2021
    Publication date: September 29, 2022
    Applicant: Ardelyx, Inc.
    Inventors: Jason G. Lewis, Michael Robert Leadbetter, Jeremy Caldwell, Dean Dragoli, Noah Bell, Jeffrey W. Jacobs, Patricia Finn, Rakesh Jain, Tao Chen, Matthew Siegel
  • Publication number: 20220308869
    Abstract: A plurality of executing microservices associated with respective features of an application are managed using a computer. The microservices are operating within a container orchestrator platform. Calls made to a plurality of microservices related to an application running on a container orchestrator platform are traces by the computer. A status map is generated by the computer of the plurality of microservices related to the application based on the tracing of the calls. The status map is published such that the status map is accessible to the plurality of microservices, and an action by one of the microservices of the plurality of microservices in response to the status map is initiated.
    Type: Application
    Filed: March 26, 2021
    Publication date: September 29, 2022
    Inventors: Rakesh Jain, Nitin Ramchandani, Thomas Downes Griffin, Divyesh Jadav
  • Publication number: 20220165909
    Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.
    Type: Application
    Filed: February 9, 2022
    Publication date: May 26, 2022
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
  • Publication number: 20220165910
    Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.
    Type: Application
    Filed: February 9, 2022
    Publication date: May 26, 2022
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
  • Publication number: 20220083669
    Abstract: An apparatus includes a memory and a hardware processor. The memory stores a plurality of conversion rules. The processor receives a first log from a server. The first log indicates that the server attempted to install a software patch. The processor converts, based on the plurality of conversion rules, the first log into a different format to produce a second log. The processor also determines, based on the second log, that the software patch install failed and determines a cause for the software patch install failure. The processor further determines a series of steps to remedy the cause and perform the series of steps to remedy the cause.
    Type: Application
    Filed: November 29, 2021
    Publication date: March 17, 2022
    Inventors: Hitendra Kumar, Scott Bolduc, Rakesh Jain
  • Patent number: 11244058
    Abstract: An apparatus includes a memory and a hardware processor. The memory stores a plurality of conversion rules. The processor receives a first log from a server. The first log indicates that the server attempted to install a software patch. The processor converts, based on the plurality of conversion rules, the first log into a different format to produce a second log and extracts a plurality of words from the second log. The processor also determines, based on the extracted words, that the software patch install failed and determines, based on the extracted words, a cause for the software patch install failure. The processor further determines a series of steps to remedy the cause and perform the series of steps to remedy the cause.
    Type: Grant
    Filed: September 18, 2019
    Date of Patent: February 8, 2022
    Assignee: Bank of America Corporation
    Inventors: Hitendra Kumar, Scott Bolduc, Rakesh Jain
  • Publication number: 20210300927
    Abstract: The disclosure relates to activators of FXR useful in the treatment of autoimmune disorders, liver disease, intestinal disease, kidney disease, cancer, and other diseases in which FXR plays a role, having the Formula (I): wherein L1, L2, A, B, R1, R2, R3, and R4 are described herein.
    Type: Application
    Filed: April 7, 2021
    Publication date: September 30, 2021
    Applicant: ARDELYX, INC.
    Inventors: Jianhua Chao, Rakesh Jain, Lily Hu, Jason Gustaf Lewis, Helene Baribault, Jeremy Caldwell
  • Patent number: 11091482
    Abstract: The disclosure relates to activators of FXR useful in the treatment of autoimmune disorders, liver disease, intestinal disease, kidney disease, cancer, and other diseases in which FXR plays a role, having the Formula (I): wherein L1, L2, A, B, R1, R2, R3, and R4 are described herein.
    Type: Grant
    Filed: August 23, 2017
    Date of Patent: August 17, 2021
    Assignee: ARDELYX, INC.
    Inventors: Jianhua Chao, Rakesh Jain, Lily Hu, Jason Gustaf Lewis, Helene Baribault, Jeremy Caldwell
  • Patent number: 11053514
    Abstract: Soybean plants comprising event SYHT0H2, methods of detecting and using the same, and soybean plants comprising a heterologous insert at the same site as SYHT0H2.
    Type: Grant
    Filed: October 25, 2018
    Date of Patent: July 6, 2021
    Assignee: Syngenta Participations AG
    Inventors: John Daniel Hipskind, Kristina Burgin, Rakesh Jain, Karolyn Terpstra, Marina Sigareva, Annick Jeanne De Framond, Becky Breitinger, Vance Cary Kramer, Weining Gu
  • Patent number: 10968246
    Abstract: The invention relates to non-systemic TGR5 agonist useful in the treatment of chemotherapy-induced diarrhea, diabetes, Type II diabetes, gestational diabetes, impaired fasting glucose, impaired glucose tolerance, insulin resistance, hyperglycemia, obesity, metabolic syndrome, ulcerative colitis, Crohn's disease, disorders associated with parenteral nutrition especially during short bowel syndrome, and irritable bowel syndrome (IBS), and other TGR5 associated diseases and disorders, having the Formula: where R1, R2, R2?, R3, R4, X1, X2, X3, X4, Q, and n are described herein.
    Type: Grant
    Filed: June 28, 2019
    Date of Patent: April 6, 2021
    Assignee: Ardelyx, Inc.
    Inventors: Jason G. Lewis, Michael Robert Leadbetter, Jeremy Caldwell, Dean Dragoli, Noah Bell, Jeffrey W. Jacobs, Patricia Finn, Rakesh Jain, Tao Chen, Matthew Siegel
  • Patent number: 10972540
    Abstract: Provided are a method, system and program for requesting storage performance models for a configuration pattern of storage resources to deploy at a client computing environment. A determination is made of a new configuration pattern of storage resources to deploy. A request is sent to a service provider with information on the new configuration pattern. A result set is received from the service provider having at least one provided configuration pattern having a degree of similarity to the new configuration pattern and a storage performance model for each of the provided configuration patterns. Each of the storage performance models indicate workload and performance characteristics for one of the provided configuration patterns. One of the provided configuration patterns is selected from the result set and the storage performance model for the selected configuration pattern is used to model performance at the client.
    Type: Grant
    Filed: July 15, 2019
    Date of Patent: April 6, 2021
    Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
    Inventors: Rakesh Jain, Ramani R. Routray, Sumant Padbidri, Yang Song
  • Publication number: 20210081540
    Abstract: An apparatus includes a memory and a hardware processor. The memory stores a plurality of conversion rules. The processor receives a first log from a server. The first log indicates that the server attempted to install a software patch. The processor converts, based on the plurality of conversion rules, the first log into a different format to produce a second log and extracts a plurality of words from the second log. The processor also determines, based on the extracted words, that the software patch install failed and determines, based on the extracted words, a cause for the software patch install failure. The processor further determines a series of steps to remedy the cause and perform the series of steps to remedy the cause.
    Type: Application
    Filed: September 18, 2019
    Publication date: March 18, 2021
    Inventors: Hitendra Kumar, Scott Bolduc, Rakesh Jain
  • Patent number: 10949569
    Abstract: A computer-implemented method according to one embodiment includes receiving a data object from a first application running on a computing device, a unique identifier (ID) of the data object assigned by the first application, and an access permission for the data object from the first application. The computer-implemented method also includes storing the data object, the unique ID, and the access permission in a data repository in a data distributor layer on the computing device. The computer-implemented method also includes receiving, at an access controller layer of the computing device, a request for the data object from a second application, the request including the unique ID, and retrieving, by the access controller layer, the data object from the data distributor layer using the unique ID in response to the request. The computer-implemented method includes providing, by the access controller layer, the data object to the second application.
    Type: Grant
    Filed: October 17, 2018
    Date of Patent: March 16, 2021
    Assignee: International Business Machines Corporation
    Inventors: Sunhwan Lee, Rakesh Jain, Mu Qiao, Divyesh Jadav, Luis Angel Bathen, Ramani R. Routray
  • Patent number: 10944827
    Abstract: Provided are a method, system and program for publishing configuration patterns for storage resources and storage performance models from client systems to share with client systems in a network computing environment. A determination is made of a configuration pattern of storage resources within the client computing environment and storage performance metrics for the configuration pattern of storage resources within the client. At least one storage performance model is created based on the determined storage performance metrics. Information on the at least one storage performance model and the configuration pattern of the storage resources for which the storage performance metrics were determined are published to the service provider.
    Type: Grant
    Filed: June 12, 2019
    Date of Patent: March 9, 2021
    Assignee: International Business Machines Corporation
    Inventors: Rakesh Jain, Ramani R. Routray, Sumant Padbidri, Yang Song
  • Patent number: 10923623
    Abstract: A device comprising a semiconductor layer including a plurality of compositional inhomogeneous regions is provided. The difference between an average band gap for the plurality of compositional inhomogeneous regions and an average band gap for a remaining portion of the semiconductor layer can be at least thermal energy. Additionally, a characteristic size of the plurality of compositional inhomogeneous regions can be smaller than an inverse of a dislocation density for the semiconductor layer.
    Type: Grant
    Filed: March 12, 2019
    Date of Patent: February 16, 2021
    Assignee: Sensor Electronic Technology, Inc.
    Inventors: Michael Shur, Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Jinwei Yang, Remigijus Gaska, Mikhail Gaevski
  • Publication number: 20210028326
    Abstract: An improved heterostructure for an optoelectronic device is provided. The heterostructure includes an active region, an electron blocking layer, and a p-type contact layer. The heterostructure can include a p-type interlayer located between the electron blocking layer and the p-type contact layer. In an embodiment, the electron blocking layer can have a region of graded transition. The p-type interlayer can also include a region of graded transition.
    Type: Application
    Filed: October 1, 2020
    Publication date: January 28, 2021
    Applicant: Sensor Electronic Technology, Inc.
    Inventors: Rakesh Jain, Maxim S. Shatalov, Alexander Dobrinsky, Michael Shur
  • Patent number: RE48943
    Abstract: Heterostructures for use in optoelectronic devices are described. One or more parameters of the heterostructure can be configured to improve the reliability of the corresponding optoelectronic device. The materials used to create the active structure of the device can be considered in configuring various parameters the n-type and/or p-type sides of the heterostructure.
    Type: Grant
    Filed: March 10, 2020
    Date of Patent: February 22, 2022
    Assignee: SENSOR ELECTRONIC TECHNOLOGY, INC.
    Inventors: Rakesh Jain, Maxim S. Shatalov, Jinwei Yang, Alexander Dobrinsky, Michael Shur, Remigijus Gaska