Patents by Inventor Rakesh Kumar

Rakesh Kumar has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 12026039
    Abstract: An apparatus comprises a processing device configured to receive a request for access to a first computing device and to determine, utilizing a time-varying password generation algorithm, a password for a repair mode user account on the first computing device, the repair mode user account having restricted access to user data stored on the first computing device. The processing device is also configured to access, utilizing the determined password, the repair mode user account on the first computing device. The processing device is further configured to record one or more actions performed on the first computing device while the first computing device is being accessed using the repair mode user account, and to provide the recorded one or more actions for viewing on a second computing device different than the first computing device.
    Type: Grant
    Filed: August 16, 2022
    Date of Patent: July 2, 2024
    Assignee: Dell Products L.P.
    Inventors: Subramanya Padubidri, Vasuda CS, Rakesh Kumar, Amit Swami
  • Publication number: 20240208720
    Abstract: The invention relates to a system for collecting objects that includes a bin defining a space therewithin and a bin splitter assembly positioned within the bin. The bin splitter assembly may include a support stem oriented vertically and a plurality of bin splitters. Each of the plurality of bin splitters may be configured to be pivotably coupled with the support stem. Further, each of the plurality of bin splitters may define a wall extending radially away from the support stem and configured to split the space defined by the bin and create a pair of cabins with the bin across the wall. The support stem may be configured to rotate the plurality of bin splitters thereabout to reposition the plurality of bin splitters within the space defined by the bin to create different configurations of cabins within the bin.
    Type: Application
    Filed: December 22, 2023
    Publication date: June 27, 2024
    Inventors: RAKESH KUMAR SIDHARTHAN, J HARIPRASATH, SIVA SAKTHIVEL S, SUJEET KUMAR
  • Patent number: 12011356
    Abstract: Disclosed herein is a humeral head and cup trials, a system for humeral trialing, and a method for removing a humeral head and cup trial from a humeral stem. The humeral trial may include a first portion, a second portion, and a post extending from the second portion. The first portion may define an articular surface. The post may define a first length in a first configuration and a second length in a second configuration. The first length may be greater than the second length. The post may change from the first configuration to the second configuration by moving the first portion with respect to the second portion.
    Type: Grant
    Filed: May 17, 2021
    Date of Patent: June 18, 2024
    Assignee: Howmedica Osteonics Corp.
    Inventors: Pranoti Patkar, Ashish Mehta, Sunny Shorabh, Rakesh Kumar, Rajan Yadav, Shashank Verma
  • Publication number: 20240180899
    Abstract: Compounds of Formula (I) are provided herein. Such compounds, as well as pharmaceutically acceptable salts and compositions thereof, are useful for treating diseases or conditions, including conditions characterized by excessive cellular proliferation, such as cancer and tumors, as well as viral infections such as HIV.
    Type: Application
    Filed: September 20, 2023
    Publication date: June 6, 2024
    Inventors: Joseph Robert Pinchman, Peter Qinhua Huang, Kevin Duane Bunker, Rakesh Kumar Sit, Ahmed Abdi Samatar
  • Publication number: 20240184738
    Abstract: A densely integrated and chiplet/dielet based networked memory pool with very high intra-pool bandwidth is provided. Chiplets are used to provide a common interface to the network. This means all memories (even those built with different process technologies) look the same from the network's perspective and vice versa: memory can be assembled in many different configurations while only changing the configuration at a high level of abstraction. The memory pool can easily be scaled in capacity and custom configurations that were previously impossible to achieve because of incompatibility of different technologies or level of integration are made possible.
    Type: Application
    Filed: April 13, 2022
    Publication date: June 6, 2024
    Applicants: The Regents of the University of California, The Board of Trustees of the University of Illinois
    Inventors: Saptadeep PAL, Matthew TOMEI, Puneet GUPTA, Rakesh KUMAR
  • Publication number: 20240180096
    Abstract: The present invention provides novel melon plants and plant parts, seed, fruit, and tissue culture therefrom. The invention also provides methods for producing a melon plant by crossing the melon plants of the invention with themselves or another melon plant. The invention also provides plants produced from such a crossing as well as plant parts, seed, fruit, and tissue culture therefrom.
    Type: Application
    Filed: December 6, 2022
    Publication date: June 6, 2024
    Applicant: Syngenta Crop Protection AG
    Inventor: Rakesh Kumar
  • Patent number: 11990790
    Abstract: A microgrid includes a power system configured to output system power and an automatic transfer switch (ATS). The ATS includes a normal terminal that is electrically connected to a grid power line configured to receive grid power from a power utility, an emergency terminal that is electrically connected to a system power line configured to receive system power from the power system, and a load terminal that is electrically connected to a critical load line configured to provide power to a critical load. The microgrid also includes a bypass line electrically connected to the system power line and the critical load line, so as to bypass the ATS, and a circuit breaker configured to control power flow through the bypass line.
    Type: Grant
    Filed: March 4, 2022
    Date of Patent: May 21, 2024
    Assignee: BLOOM ENERGY CORPORATION
    Inventors: Prasad Pmsvvsv, Mehdi Ebad, Ranganathan Gurunathan, Vishal Anand Gopalakrishnan, Jayanth Moodliar, Saravana Narayanasamy, Rakesh Kumar Roy, Deepak Balakrishnan
  • Patent number: 11991077
    Abstract: In general, techniques are described for deploying a logically-related group of one or more containers (“pod”) that supports the Data Plane Development Kit (DPDK) to support fast path packet communication on a data channel between a virtual router and the pod. In an example, a computing device comprises a virtual router comprising processing circuitry and configured to implement, in a computing infrastructure that includes the computing device, a virtual network to enable communications among virtual network endpoints connected via the virtual network. The computing devices comprises a pod comprising a containerized application, wherein the virtual router and the pod are configured to create a Unix domain socket using a file system resource that is accessible by the pod and by the virtual router and is not accessible by any other pods deployed to the computing device.
    Type: Grant
    Filed: February 23, 2022
    Date of Patent: May 21, 2024
    Assignee: Juniper Networks, Inc.
    Inventors: Yuvaraja Mariappan, Rudhraraju Narasimha Kishore Varma, Shailender Sharma, Rakesh Kumar Reddy Varimalla, Jude Pragash Vedam
  • Publication number: 20240160283
    Abstract: There is provided a system for modulating user commands via command input images displayed on a graphical user interface based on a user viewing direction relative to the displayed command input images and the graphical user interface. The system uses an image capturing device for capturing real time images of a user's face, eyes and irises and determines the eye orientation. The system separates the graphical user interface into interface portions and determines a correlation between the eye orientation and one or more portions to determine if any of the foregoing are viewed portions. The system determines whether a viewed portion contains a command input image and only allows user input commands via the command input image to be processed if the image is within a viewed portion.
    Type: Application
    Filed: January 22, 2024
    Publication date: May 16, 2024
    Inventors: Rajeev KUMAR, Rakesh KUMAR
  • Publication number: 20240159412
    Abstract: An HVAC system that includes an air handling unit (AHU), indoor air quality (IAQ) sensors installed in one or more zones within an indoor environment, and a control device. The control device controls the IAQ sensors to measure a first set of IAQ values when air circulation to the one or more zones is turned off and controls the IAQ sensors to measure a second set of IAQ values when the air circulation to the one or more zones is turned on. The control device further compares the first set of measured IAQ values with the second set of measured IAQ values and detects at least one contaminated duct based on a result of the comparison. The control device further notifies, on a display screen or on a GUI of an application using a communication interface, a message indicating the at least one contaminated duct to a user.
    Type: Application
    Filed: November 15, 2023
    Publication date: May 16, 2024
    Inventors: Kanna Selvakani, Rakesh Annavaram, Rakesh Kumar Arepalli, Jagadish Reddy Putta
  • Publication number: 20240154617
    Abstract: Clock generation circuit generating multiple divided signals satisfying respective desired offsets. A phase locked loop (PLL) is used to generate a PLL output having a frequency which is a desired multiple of that of a reference clock. The circuit divides the PLL output by a corresponding divisor to generate a corresponding divided signal, wherein each divided signal is offset from a common reference by at least an associated desired time offset. The common reference is timed with respect to the reference clock when the reference clock is available and with respect to a time reference signal otherwise. This arrangement is extended to use the internal time reference signal even for the cases where the reference clock is present by blocking the reference clock while the output systems across PLLs are aligned using the internal time reference signal to ensure desired offsets across different PLLs with a small uncertainty.
    Type: Application
    Filed: January 10, 2024
    Publication date: May 9, 2024
    Inventors: Raja Prabhu J, Ankit Seedher, Srinath Sridharan, Rakesh Kumar Gupta, Nitesh Naidu, Shivam Agrawal, Jeevabharathi G, Purva Choudhary
  • Patent number: 11979712
    Abstract: A piezoelectric microelectromechanical system microphone comprises a frame, a film of piezoelectric material including slits defining a plurality of independently displaceable piezoelectric elements within an area defined by a perimeter of the frame, bases of the plurality of piezoelectric elements mechanically secured to the frame, tips of the plurality of piezoelectric elements being free to be displaced in a direction perpendicular to a plane defined by the frame responsive to impingement of sound waves on the plurality of piezoelectric elements, and edge extensions extending from edges of the plurality of piezoelectric elements in the direction perpendicular to the plane defined by the frame to reduce a 3 dB roll-off frequency of the piezoelectric microelectromechanical system microphone.
    Type: Grant
    Filed: July 1, 2022
    Date of Patent: May 7, 2024
    Assignee: SKYWORKS SOLUTIONS, INC.
    Inventors: You Qian, Rakesh Kumar, Guofeng Chen
  • Patent number: 11967965
    Abstract: Clock generation circuit generating multiple divided signals satisfying respective desired offsets. A phase locked loop (PLL) is used to generate a PLL output having a frequency which is a desired multiple of that of a reference clock. The circuit divides the PLL output by a corresponding divisor to generate a corresponding divided signal, wherein each divided signal is offset from a common reference by at least an associated desired time offset. The common reference is timed with respect to the reference clock when the reference clock is available and with respect to a time reference signal otherwise. This arrangement is extended to use the internal time reference signal even for the cases where the reference clock is present by blocking the reference clock while the output systems across PLLs are aligned using the internal time reference signal to ensure desired offsets across different PLLs with a small uncertainty.
    Type: Grant
    Filed: June 14, 2022
    Date of Patent: April 23, 2024
    Assignee: Shaoxing Yuanfang Semiconductor Co., Ltd.
    Inventors: Raja Prabhu J, Ankit Seedher, Srinath Sridharan, Rakesh Kumar Gupta, Nitesh Naidu, Shivam Agrawal, Jeevabharathi G, Purva Choudhary
  • Publication number: 20240126666
    Abstract: The present disclosure provides a system (100) and a method (200) for real-time debugging of a processor (102). The system includes a debugging unit (104) configured to receive a first set of instructions from the processor. The first set of instructions includes a set of function calls and/or a set of jump instructions. The debugging unit further includes a skip list unit (106) including a skip set of instructions. The skip list unit is configured to remove, from the first set of instructions, the skip set of instructions to generate a second set of instructions. The debugging unit includes a loop exclusion unit (108) configured to determine loops of instructions based on loop unrolling of the second set of instructions to generate a third set of instructions by removing loops of instructions from the second set of instructions. The debugging unit is configured to store the third set of instructions.
    Type: Application
    Filed: February 15, 2023
    Publication date: April 18, 2024
    Inventors: Rakesh Kumar POLASA, Vinay Sadrhalli Nagendra PATEL, Shubham PALIWAL, Alagesan MANI
  • Patent number: 11963452
    Abstract: A method of forming a piezoelectric microphone with an interlock/stopper and a micro-bump and a resulting device are provided. Embodiments include forming a membrane over a Si substrate having a first and second sacrificial layer disposed on opposite surfaces thereof, the membrane being formed on the first sacrificial layer, forming a first HM over the membrane, forming first and second vias through the first HM, forming a first pad layer in the first and second vias and over an exposed top thin film, forming a trench to the first sacrificial layer between the first and second vias and a gap between the trench and second via, patterning a second HM over the membrane, in the first and second vias, the trench and the gap, and forming a second pad layer over the second HM and in exposed areas around the first and second vias to form pad structures.
    Type: Grant
    Filed: November 24, 2020
    Date of Patent: April 16, 2024
    Assignee: VANGUARD INTERNATIONAL SEMICONDUCTOR SINGAPORE PTE. LTD.
    Inventors: Jia Jie Xia, Rakesh Kumar, Minu Prabhachandran Nair, Nagarajan Ranganathan
  • Patent number: 11960994
    Abstract: A method, apparatus and system for artificial intelligence-based HDRL planning and control for coordinating a team of platforms includes implementing a global planning layer for determining a collective goal and determining, by applying at least one machine learning process, at least one respective platform goal to be achieved by at least one platform, implementing a platform planning layer for determining, by applying at least one machine learning process, at least one respective action to be performed by the at least one of the platforms to achieve the respective platform goal, and implementing a platform control layer for determining at least one respective function to be performed by the at least one of the platforms. In the method, apparatus and system despite the fact that information is shared between at least two of the layers, the global planning layer, the platform planning layer, and the platform control layer are trained separately.
    Type: Grant
    Filed: January 18, 2021
    Date of Patent: April 16, 2024
    Assignee: SRI International
    Inventors: Han-Pang Chiu, Jonathan D. Brookshire, Zachary Seymour, Niluthpol C. Mithun, Supun Samarasekera, Rakesh Kumar, Qiao Wang
  • Patent number: 11957815
    Abstract: An artificial tissue construct for nerve repair and regeneration includes a biocompatible and biodegradable nerve guidance matrix comprising a plurality of biopolymers that include chitosan, gelatin, collagen and hyaluronic acid. A cross-linker includes glutaraldehyde. The nerve guidance matrix is formed as a three-dimensional scaffold polyelectrolyte complex (PEC). A subconfluent and grown monolayer of at least one of human mesenchymal stem cells, mesenchymal stem cells, differentiated Schwann cells and neuronal cells is on the biocompatible and biodegradable nerve guidance matrix for direct implantation or delivery. A method of making the artificial tissue construct is disclosed.
    Type: Grant
    Filed: November 12, 2020
    Date of Patent: April 16, 2024
    Assignee: DATT LIFE SCIENCES PRIVATE LIMITED
    Inventors: Rajan Datt, Siddharth Pandey, Poonam Meena, Mukesh Kumar, Nitin Khatri, Rakesh Kumar Nagar
  • Patent number: 11951687
    Abstract: A method is provided for manufacturing an adhesively bonded structure including first and second components including first and second outer surfaces, respectively, at least the first component being a first metal component, the first and second outer surfaces facing one another and partially overlapping, and the adhesively bonded structure including an adhesive layer received between overlapping portions of the first and second outer surfaces. The method includes deforming the first outer surface of the first metal component along a first isolated path extending beside the first edge of the adhesive layer along at least a majority of a length of the first edge of the adhesive layer.
    Type: Grant
    Filed: January 7, 2021
    Date of Patent: April 9, 2024
    Assignee: Deere & Company
    Inventors: Nathan Tortorella, Rakesh Kumar Goyal
  • Patent number: 11953602
    Abstract: A computer-implemented method for detecting one or more three-dimensional structures in a proximity of a vehicle at runtime includes generating, by a processor, a birds-eye-view (BEV) camera image of the proximity of the vehicle, the BEV camera image comprising two-dimensional coordinates of one or more structures in the proximity. The method further includes generating, by the processor, a BEV height image of the proximity of the vehicle, the BEV height image providing height of the one or more structures in the proximity. The method further includes detecting one or more edges of the three-dimensional structures based on the BEV camera image and the BEV height image. The method further includes generating models of the three-dimensional structures by plane-fitting based on the edges of the one or more three-dimensional structures. The method further includes reconfiguring a navigation system receiver based on the models of the three-dimensional structures.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: April 9, 2024
    Assignee: GM GLOBAL TECHNOLOGY OPERATIONS LLC
    Inventors: Brent N. Bacchus, Rakesh Kumar, Keun Jae Kim
  • Publication number: 20240102116
    Abstract: The present invention is directed towards a process of RT-PCR based diagnosis of SARS-CoV2 and other related respiratory viruses without storing and transporting the naso-pharyngeal and oro-pharyngeal swabs in Viral Testing Media directly after extracting the viral particles from the swabs in a suitable buffer, and using these extracts directly, without involving any steps of RNA isolation/extraction, for RT-PCR based diagnosis of SARS-CoV2. The present invention is also directed towards kits for time and cost-efficient diagnosis of SARS-CoV2 and other related respiratory viruses at efficacies matching or better than the efficacies of the gold-standard RT-PCR method starting from VTM transported swabs for diagnosing the same. The present invention also directs to variant process wherein the viral particles eluted in suitable buffers are further subjected to the conventional steps of RNA extraction before qRT-PCR.
    Type: Application
    Filed: March 3, 2021
    Publication date: March 28, 2024
    Inventors: Sai Uday Kiran Peddapuvala, Gokulan Coimbatore Gurumoorthy, Santosh Kumar Kuncha, Karthik Bharadwaj Tallapaka, Rakesh Kumar Mishra