Abstract: A piezoelectric micromachined ultrasonic transducer (PMUT) includes a substrate, a stopper, and a membrane, where the substrate and the stopper are composed of same single-crystalline material. The substrate has a cavity penetrating the substrate, and the stopper protrudes from a top surface of the substrate and surrounds the edge of the cavity. The membrane is disposed over the cavity and attached to the stopper.

Abstract: Methods, systems and computer program products generating diverse and representative set of samples from a large amount of transaction data are disclosed. A data sampling system receives transaction records. Each transaction record has multiple text segments. The system selects a subset of transaction records that contain least frequently appeared text segments. The system determines a respective vector representation for each selected transaction record. The system can measure similarity between transaction records based on the vector representations. The system assigns the selected transaction records to multiple clusters based on the vector representations and designated dimensions of importance. The system identifies one or more anchors that include transaction records on boundaries between clusters. The system filters the subset of transaction records by removing transaction records that are close to the anchors.

Abstract: Data caching may include storing data associated with DRAM transaction requests in data storage structures organized in a manner corresponding to the DRAM bank, bank group and rank organization. Data may be selected for transfer to the DRAM by selecting among the data storage structures.

Abstract: Alpha-Synuclein mutants and uses thereofare disclosed herein. The mutants of the present invention are non-self-aggregating forms of Alpha-Synuclein which make them a suitable candidate for use as substrates in aggregation assay for evaluating the presence of misfolded ?-Syn protein. Also disclosed are kits and method for detection of synucleinopathies in individuals, using the mutants of the present invention.

Abstract: An Augmented Reality (AR)-enabled Automated Teller Machine (ATM) receives a request to dispense cash equal to amount of an AR document. The AR document comprises an AR check. The AR-enabled ATM fetches a first AR check image from a memory. The AR-enabled ATM extracts a first set of features from the first AR check image. The AR-enabled ATM receives a second AR check image from a computing device associated with the receiver. The AR-enabled ATM extracts a second set of features from the second AR check image. The AR-enabled ATM compares the first AR check image with the second AR check image. The AR-enabled ATM determines whether the first AR check image corresponds to the second AR check image. In response to determining that the first AR check image corresponds to the second AR check image, the AR-enabled ATM dispenses cash equal to the amount.

Abstract: A system for Augmented Reality (AR) document generation receives a request to generate an AR document with a particular amount directed to a particular receiver. The AR document comprises an AR check. The system generates a unique code for the AR check by converting a name of a sender, a name of the particular receiver, the amount, and a serial number associated with the AR check into a hexadecimal format. The system generates the AR check by taking the unique code as an input and writing the name of the sender, name of the particular receiver, the amount, and the serial number on the AR check extracted from the unique code. The system transmits an image of the AR check to a computing device associated with the particular receiver.

Abstract: There is provided a system and for simultaneously displaying multiple graphical user interfaces via the same display. The multiple graphical user interfaces are hosted by one or more remote host controllers. A user device is in operative communication with the one or more remote host controllers and comprises an interface display for displaying one or more of the multiple graphical user interfaces. A system controller is in operative communication with the user display device. The system controller has a processor with an associated memory of processor executable code that when executed provides the controller with performing computer-implementable steps comprising separating the interface display in two or more interface display portions and selectively providing for two or more of the graphical user interfaces to be simultaneously displayed via respective ones of the two or more interface display portions.

Abstract: Example methods and systems for capability-aware service request distribution are described. In one example, a network element may obtain a set of capability information associated with multiple load balancers capable of service request handling and identify varying capability levels among the multiple load balancers. The network element may assign unequal path cost information to the multiple load balancers to indicate the varying capability levels. The unequal path cost information may include (a) a first path cost that is assigned to the first load balancer; and (b) a second path cost that is assigned to the second load balancer and different to the first path cost to indicate the lower capability level of the second load balancer compared to the first load balancer. In response to detecting a service request, the service request may be steered towards one of the multiple load balancers based on the unequal path cost information.

Abstract: Systems and methods for frequency reference generation are described. In an embodiment, a frequency reference circuit, includes: a bandgap proportional to temperature (PTAT) generator circuit that generates a bandgap PTAT current; a resistor complementary to temperature (CTAT) generator circuit that generates a resistor CTAT current; an adder that adds the PTAT current and the CTAT current to generate a constant current Icons; a switched-resistor (switched-R) circuit that receives the constant current Icons and a previously generated output clock and generates an output; a bandgap voltage reference generator circuit that generates a bandgap voltage VBG; an integrator circuit that receives the output of the switched-R circuit and the bandgap voltage VBG and generates an output; and a voltage-controlled oscillator (VCO) circuit that receives the output of the integrator circuit and generates a frequency reference.

Abstract: A device may receive policy information associated with a first application group and a second application group. The device may receive network topology information associated with a network. The device may generate a first policy based on the policy information and the network topology information, and generate a second policy based on the policy information and the network topology information. The device may provide, to the virtual network device, information associated with the first policy to permit the virtual network device to implement the first policy in association with network traffic transferred between the first application group and the second application group. The device may provide, to the physical network device, information associated with the second policy to permit the physical network device to implement the second policy in association with network traffic transferred between the first application group and the second application group.

Abstract: An embodiment may involve obtaining a specification of connectivity between a plurality of electronic components, a property library of logical validations, and a set of restrictions for an execution environment of the electronic components, wherein each of the electronic components is associated with at least one of the logical validations; determining that, according to properties in the property library applied to their associated electronic components, a subset of the electronic components exhibit invariance within the execution environment; based on the subset of the electronic components that exhibit invariance within the execution environment, rewiring the connectivity between the plurality of electronic components; and performing logic synthesis on the connectivity between the plurality of electronic components as rewired to simplify at least some of the subset of the electronic components that exhibit invariance within the execution environment.

Abstract: A system for Augmented Reality (AR) document realization receivers a request to transfer an amount of an AR document into account of a receiver. The AR document comprises an AR check. The system fetches a first AR check image from a memory. The system extracts a first set of features from the first AR check image. The system receives a second AR check image from a computing device associated with the receiver. The system extracts a second set of features from the second AR check image. The system compares the first AR check image with the second AR check image. The system determines whether the first AR check image corresponds to the second AR check image. In response to determining that the first AR check image corresponds to the second AR check image, the system transfers the amount into the account of the receiver.

Abstract: The present disclosure relates a hydrogen-annealed bimetallic oxide of Formula I: AxO2—ByOz, wherein the A is a metal selected from Hf, Ti, or Zr; B is a metal selected from Ce, Zn, Fe or Co; x is in the range of 1-2; y is in the range of 1-4; and z is in the range of 1-6. The present disclosure further relates to a convenient process for preparing the hydrogen-annealed bimetallic oxide and a method for catalytically treating an exhaust stream is also disclosed herein.

Abstract: The present disclosure relates to a system for real-time debugging of microcontroller, the system includes a microcontroller configured in an embedded device to execute a set of instructions, the microcontroller includes a counter unit that generates a set of values for the executed set of instructions. An on-chip debugger (OCD) fetches a selective set of data packets of the set of instructions from the microcontroller. An encoder encodes the selective set of data packets to store the encoded set of data packets in a storage unit, wherein encoding of the set of data packets is performed to compress the data for minimal information size such that the external debugger unit (EDU) receives the encoded set of data packets with minimal information size through the external interface.

Abstract: A microgrid includes a power system configured to output system power and an automatic transfer switch (ATS). The ATS includes a normal terminal that is electrically connected to a grid power line configured to receive grid power from a power utility, an emergency terminal that is electrically connected to a system power line configured to receive system power from the power system, and a load terminal that is electrically connected to a critical load line configured to provide power to a critical load. The microgrid also includes a bypass line electrically connected to the system power line and the critical load line, so as to bypass the ATS, and a circuit breaker configured to control power flow through the bypass line.

Abstract: The present disclosure relates to a system for real-time debugging of microcontroller, the system includes a microcontroller configured in an embedded device to execute a set of instructions, the microcontroller includes a counter unit that generates a set of values for the executed set of instructions. An on-chip debugger (OCD) fetches a selective set of data packets of the set of instructions from the microcontroller. An encoder encodes the selective set of data packets to store the encoded set of data packets in a storage unit, wherein encoding of the set of data packets is performed to compress the data for minimal information size such that the external debugger unit (EDU) receives the encoded set of data packets with minimal information size through the external interface.

Abstract: The invention provides systems, methods and computer program products for implementing a prepaid currency transaction. The invention comprises (i) receiving a payment instruction for incrementing or debiting a prepaid currency value stored in a first payment account, (ii) implementing the payment instruction, (iii) identifying a set of POS terminals for implementing a memory update memory within each POS terminal in the identified set of POS terminals, wherein the memory update comprises recording an incremented or decremented prepaid currency value stored in the first payment account as a result of implementing the payment instruction, and (iv) performing the memory update within each POS terminal in the identified set of POS terminals.

Abstract: In general, techniques are described for deploying a logically-related group of one or more containers (“pod”) that supports the Data Plane Development Kit (DPDK) to support fast path packet communication on a data channel between a virtual router and the pod. In an example, a computing device comprises a virtual router comprising processing circuitry and configured to implement, in a computing infrastructure that includes the computing device, a virtual network to enable communications among virtual network endpoints connected via the virtual network. The computing devices comprises a pod comprising a containerized application, wherein the virtual router and the pod are configured to create a Unix domain socket using a file system resource that is accessible by the pod and by the virtual router and is not accessible by any other pods deployed to the computing device.

Abstract: In general, techniques are described for a computing device including a virtual router, a pod comprising a container, and a network plugin. The virtual router includes a virtual router agent. The network plugin includes processing circuitry configured to receive, from the virtual router agent, an indication of an interface type for a virtual network for the pod and to configure, for the pod, a virtual network interface having the interface type, the virtual network interface for communicating on the virtual network.

Abstract: A piezoelectric microelectromechanical system microphone comprises a piezoelectric element configured to deform and generate an electrical potential responsive to impingement of sound waves on the piezoelectric element, a sensing electrode disposed on the piezoelectric element and configured to sense the electrical potential, and a dummy electrode electrically unconnected to the sensing electrode and disposed on a portion of the piezoelectric element that is free of the sensing electrode, the dummy electrode configured to reduce static deformation of the piezoelectric element caused by residual stresses in the piezoelectric element.