Abstract: A storage system and method for memory backlog hinting for variable capacity are provided. In one embodiment, a method for memory backlog hinting for variable capacity is provided that is performed in a storage system comprising a memory. The method comprises: sending information regarding a state of the memory to a host device; receiving an instruction from the host device to alter memory capacity in order to alter memory performance, wherein the instruction is based on the information regarding the state of the memory sent to the host device; and altering memory capacity in order to alter memory performance in response to receiving the instruction from the host device. Other embodiments are provided.

Abstract: A storage system and method for enabling host-driven regional performance in memory are provided. In one embodiment, a method is provided comprising receiving a directive from a host device as to a preferred logical region of a non-volatile memory in a storage system; and based on the directive, modifying a caching policy specifying which pages of a logical-to-physical address map stored in the non-volatile memory are to be cached in a volatile memory of the storage system. Other embodiments are provided, such as modifying a garbage collection policy of the storage system based on information from the host device regarding a preferred logical region of the memory.

Abstract: A storage system, host, and method for storage system calibration are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to: determine a pattern of host writes to the memory; determine whether the pattern of host writes matches a granularity of a logical-to-physical address map used by the storage system; and in response to determining that the pattern of host writes does not match the granularity of the logical-to-physical address map used by the storage system, change the granularity of the logical-to-physical address map used by the storage system. In another embodiment, the storage system calibration is done by host directive. Other embodiments are provided.

Abstract: A storage system, host, and method for storage system calibration are provided. In one embodiment, a storage system is provided comprising a memory and a controller. The controller is configured to: determine a pattern of host writes to the memory; determine whether the pattern of host writes matches a granularity of a logical-to-physical address map used by the storage system; and in response to determining that the pattern of host writes does not match the granularity of the logical-to-physical address map used by the storage system, change the granularity of the logical-to-physical address map used by the storage system. In another embodiment, the storage system calibration is done by host directive. Other embodiments are provided.

Abstract: Virtual physical erase of a memory of a data storage device. One example data storage device may include a flash memory. The data storage device further may include an electronic processor that may be configured to store a first portion of data in the flash memory, and receive a physical erase request from an access device. The electronic processor may be further configured to identify a first block of the flash memory and a memory fragment of the first block where the first portion of data is stored in the flash memory. The electronic processor may be further configured to, in response to receiving the physical erase request, program one or more cells corresponding to the memory fragment to an increased voltage state so as to obfuscate the first portion of data that is stored in the flash memory.

Abstract: A storage system and method for video frame segregation to optimize storage are provided. In one embodiment, a storage system is presented comprising a memory and a controller. The controller is configured to: receive a video stream from a host; identify a plurality of video frame types from the video stream; and store video frames of different video frame types in the memory using different storage options. Other embodiments are provided.

Abstract: A solid state drive system and method receives read commands, write commands, and/or file system updates. The solid state drive system then determines the latency estimate for performing each of those commands asynchronously. The solid state drive system may utilize internal processes to determine the latency estimate. The latency estimate may include random access latency, block erase time, outstanding workload latency, garbage collection time, metadata write time, etc. The latency estimate is then returned to the host device. The host device may utilize the latency estimate to workload balance solid state drive systems.

Abstract: One aspect of a storage device includes a non-volatile memory (NVM) comprising a plurality of memory locations each associated with a physical address, where the NVM is configured to store a logical-to-physical (L2P) mapping table associating a logical address with each of the physical addresses of the NVM; and a controller configured to support a scratchpad session by allocating one or more of the memory locations as scratchpad memory for a host, where the controller is further configured to disable updates to the L2P mapping table for the one or more memory locations allocated to the scratchpad memory across power cycles during the scratchpad session.

Abstract: An apparatus is provided that includes a non-volatile memory and a memory controller coupled to the non-volatile memory. The memory controller is configured to access a global address table (GAT) that maps logical addresses of a host to physical addresses of the non-volatile memory, receive a request from the host to write first data to the non-volatile memory, determine that the first data comprises fragmented data that are not aligned to a minimum write unit of the non-volatile memory, and create an unaligned GAT page, wherein the unaligned GAT page comprises a logical-to-physical mapping for the first data.

Abstract: A storage system and method for soft-decision-based command execution to enhance random write performance are provided. In one embodiment, the storage system comprises a memory and a controller. The controller comprises a command parser and a set of components in a path between the command parser and the memory, wherein the command parser is configured to receive a plurality of commands from a host and determine an order in which to send the plurality of commands to the set of components based on feedback from the set of components. Other embodiments are provided.

Abstract: A partial decoder and event detection logic are deployed in a non-volatile memory system to offload processing from a host system while maintaining high video recording performance and backward compatibility with conventional host system logic.

Abstract: A method for data consolidation in a memory system includes selecting a source block for data consolidation from a plurality of memory blocks in the memory system. The method further includes reading a physical-to-logical address mapping table associated with the source block to determine a first logical group in the source block. The method further includes loading a first logical-to-physical address mapping table associated with the first logical group. The method further includes identifying, using the first logical-to-physical address mapping table, valid memory fragments of the source block that are associated with the first logical group. The method further includes consolidating the identified valid memory fragments associated with the first logical group.

Abstract: Apparatuses, systems, methods, and computer program products for streamed program commands with periodic garbage collection are disclosed. A controller is configured to set up a data path between the controller and a memory device to initialize an open mode. A controller is configured to perform a plurality of program operations on a memory device in an open mode using a same set up data path. A controller is configured to, in response to exiting an open mode, perform a garbage collection operation on a memory device.

Abstract: Apparatus, systems, methods, and computer program products for buffering storage device data in a host memory buffer (HMB) are presented. A non-volatile memory and a controller are in communication with a non-volatile memory. A controller is configured to receive an input/output (I/O) operation including data. A controller is configured to transmit at least a portion of data to an HMB of a host device separate from a non-volatile memory and a controller for storage until a trigger event occurs.

Abstract: Apparatus, systems, methods, and computer program products for buffering storage device data in a host memory buffer (HMB) are presented. A non-volatile memory and a controller are in communication with a non-volatile memory. A controller is configured to receive an input/output (I/O) operation including data. A controller is configured to transmit at least a portion of data to an HMB of a host device separate from a non-volatile memory and a controller for storage until a trigger event occurs.

Abstract: A storage system and method for soft-decision-based command execution to enhance random write performance are provided. In one embodiment, the storage system comprises a memory and a controller. The controller comprises a command parser and a set of components in a path between the command parser and the memory, wherein the command parser is configured to receive a plurality of commands from a host and determine an order in which to send the plurality of commands to the set of components based on feedback from the set of components. Other embodiments are provided.

Abstract: One or more control circuits of a storage system are configured to consolidate the sensing of pre-pad and/or post-pad data for one unaligned write command with the transferring of previously sensed pre-pad and/or post-pad data for another unaligned write command. By consolidating the sensing and transferring, considerable time is saved when programming data for a set of two or more unaligned write commands. Also, in one aspect, a single programming operation is performed for multiple unaligned write commands. Some conventional solutions may need to perform a programming operation for each unaligned write command. Hence, considerable programming time is saved by the storage system. Moreover, write amplification may be reduced by the storage system.

Abstract: Apparatus, systems, methods, and computer program products for dynamic memory compaction are disclosed. A memory device comprises a plurality of memory blocks and a controller for the memory device. A controller is configured to generate an input/output command to write a data chunk to a first memory block of a plurality of memory blocks. A controller is configured to compact an amount of valid data in a second memory block of a plurality of memory blocks based on a size of an I/O command.

Abstract: Apparatuses, systems, methods, and computer program products for streamed program commands with periodic garbage collection are disclosed. A controller is configured to set up a data path between the controller and a memory device to initialize an open mode. A controller is configured to perform a plurality of program operations on a memory device in an open mode using a same set up data path. A controller is configured to, in response to exiting an open mode, perform a garbage collection operation on a memory device.

Abstract: One or more control circuits of a storage system are configured to consolidate the sensing of pre-pad and/or post-pad data for one unaligned write command with the transferring of previously sensed pre-pad and/or post-pad data for another unaligned write command. By consolidating the sensing and transferring, considerable time is saved when programming data for a set of two or more unaligned write commands. Also, in one aspect, a single programming operation is performed for multiple unaligned write commands. Some conventional solutions may need to perform a programming operation for each unaligned write command. Hence, considerable programming time is saved by the storage system. Moreover, write amplification may be reduced by the storage system.