Patents by Inventor Ramdas P. Kachare

Ramdas P. Kachare has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20190108158
    Abstract: A bridge device includes: a first interface configured to receive a first set of commands from an application running on a host computer; one or more command processors, each of the one or more command processors being configured to translate the first set of commands and generate a second set of commands based on the first set of commands; a second interface configured to provide the second set of commands to a data storage device; and a computing processor configured to issue an internal command to fetch data from the data storage device and write data to the data storage device in a background mode in an agnostic manner to the host computer while running the application.
    Type: Application
    Filed: April 3, 2018
    Publication date: April 11, 2019
    Inventors: Ramdas P. Kachare, Fred Worley
  • Patent number: 10255134
    Abstract: A system and method for providing erasure code protection across multiple storage devices. A data switch in a storage system connects a plurality of storage devices to a remote host. Each storage device is also connected to a controller, e.g., a baseboard management controller. During normal operation, read and write commands from the remote host are sent to respective storage devices through the data switch. When a write command is executed, the storage device executing the command sends a copy of the data to the controller, which generates and stores erasure codes, e.g., on a storage device that is dedicated to the storage of erasure codes, and invisible to the remote host. When a device fails or is removed, the controller reconfigures the data switch to redirect all traffic addressed to the failed or absent storage device to the controller, and the controller responds to host commands in its stead.
    Type: Grant
    Filed: March 27, 2017
    Date of Patent: April 9, 2019
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Sompong Paul Olarig, David Schwaderer, Ramdas P. Kachare
  • Publication number: 20190079680
    Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a host interface circuit connectable to a host. The controller may be configured to process a plurality of input/output requests to read/write to/from the memory, compute a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from the host, compute a second bandwidth of the memory that is available to the host through the host interface circuit based on the first bandwidth consumed by the controller, receive a hypothetical consumption of additional bandwidth by the host, update the second bandwidth based on the hypothetical consumption, and report the second bandwidth as updated to the host through the host interface circuit.
    Type: Application
    Filed: November 12, 2018
    Publication date: March 14, 2019
    Inventors: Timothy L. Canepa, Ramdas P. Kachare
  • Publication number: 20190050289
    Abstract: A system and method for distributed erasure coding. A plurality of storage devices is directly connected to one or more host computers, without an intervening central controller distributing data to the storage devices and providing data protection. Parity codes are stored in one or more dedicated storage devices or distributed over a plurality of the storage devices. When a storage device receives a write command, it calculates a partial parity code, and, if the parity code for the data being written is on another storage device, sends the partial parity code to the other storage device, which updates the parity code using the partial parity code.
    Type: Application
    Filed: October 20, 2017
    Publication date: February 14, 2019
    Inventors: Ramdas P. Kachare, Fred Worley, Stephen Fischer, Oscar Pinto
  • Publication number: 20190019107
    Abstract: A data storage system includes: a host including a processor and a memory; and a remote storage device separate from the host and configured to communicate with the host via an external network. The remote storage device includes: a non-volatile memory device; and a controller configured to control the non-volatile memory device. The controller is configured to create K-metadata objects corresponding to each file stored on the memory device independently of the host, and the K-metadata objects store data describing attributes of the corresponding file stored on the memory device.
    Type: Application
    Filed: September 15, 2017
    Publication date: January 17, 2019
    Inventors: Ramdas P. Kachare, Sompong Paul Olarig, David Schwaderer
  • Patent number: 10156999
    Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.
    Type: Grant
    Filed: March 28, 2016
    Date of Patent: December 18, 2018
    Assignee: SEAGATE TECHNOLOGY LLC
    Inventors: Timothy L. Canepa, Ramdas P. Kachare
  • Publication number: 20180359318
    Abstract: A method of transferring data to an end user via a content distribution network using an nonvolatile memory express over fabrics (NVMe-oF) device, the method including receiving a read request at the NVMe-oF device, translating a logical address corresponding to the data to a physical address, fetching the data from a flash storage of the NVMe-oF device, processing the data with a GPU that is either embedded in the NVMe-oF device, or on a same chassis as the NVMe-oF device, and transferring the data.
    Type: Application
    Filed: August 15, 2017
    Publication date: December 13, 2018
    Inventors: Harry Rogers, Sompong Paul Olarig, Ramdas P. Kachare
  • Publication number: 20180342039
    Abstract: In one aspect of the present disclosure, a data storage and processing system is provided. The system includes a host server and a storage unit. The storage unit includes a drive comprising a memory and a drive processor, an external switch configured to couple the host server to the drive to send and receive data between the host server and the memory of the drive and a graphics processing unit. The drive processor is configured to send processing instructions and data from the drive memory to the graphics processing unit and the graphics processing unit is configured to process the data according to the processing instructions to generate result data.
    Type: Application
    Filed: August 8, 2017
    Publication date: November 29, 2018
    Inventors: Ramdas P. Kachare, Sompong Paul Olarig, David Schwaderer
  • Publication number: 20180322285
    Abstract: A system and a method to detect malicious software written to an Ethernet solid-state drive (eSSD). The system includes an Ethernet switch, at least one SSD, and a baseboard management controller (BMC). The Ethernet switch receives write data from a communication network in response to a write command. The at least one SSD receives the write data from the Ethernet switch and stores the received write data. The BMC receives from the at least one SSD the received write data. The BMC determines whether the received write data contains malicious software. The received write data may be contained in a plurality of Ethernet packets in which case the BMC stores the received write data in a scan buffer in an order that is based on an assembled order of the received write data.
    Type: Application
    Filed: August 29, 2017
    Publication date: November 8, 2018
    Inventors: Sompong Paul OLARIG, Ramdas P. KACHARE, Son T. PHAM
  • Publication number: 20180307650
    Abstract: A method of low-latency direct data access to non-volatile flash memory in at least one NVMe-oF SSD device connected over Ethernet. The method includes transmitting, from a low-latency direct access (LL-DAX) block storage software layer at a host, a remote direct memory access (RDMA) write request to the flash memory. The RDMA write request includes data, a storage address, a length of a data transfer operation, and an operation code. The method also includes receiving, at the host, an RDMA level acknowledgement indicating that the data has been persisted to the flash memory. The method also includes transmitting, from the LL-DAX block storage software layer, an RDMA read request to the flash memory that includes a storage address, a length of a data transfer, and an operation code. The method also includes receiving, at the host, data packets from the flash memory corresponding to the RDMA read request.
    Type: Application
    Filed: July 20, 2017
    Publication date: October 25, 2018
    Inventors: Ramdas P. Kachare, Dong Gi Lee, Ajay Sundar Raj, Fred Worley
  • Publication number: 20180292992
    Abstract: A storage device is disclosed. The storage device may include storage to store data and a controller to manage reading data from and writing data to the storage. The controller may also include a receiver to receive a plurality of requests, information determination logic to determine information about the plurality of requests, storage for the information about a plurality of requests, and sharing logic to share the information with a management controller.
    Type: Application
    Filed: July 18, 2017
    Publication date: October 11, 2018
    Inventors: Ramdas P. KACHARE, Sompong Paul OLARIG, Wentao WU
  • Publication number: 20180284990
    Abstract: In a method of storage aggregation for NVMe Over Fabrics devices, the method includes: identifying an aggregation group as an aggregated Ethernet SSD comprising a plurality of NVMe-oF SSDs; selecting one of the NVMe-oF SSDs of the aggregation group as a primary NVMe-oF SSD; selecting others of the NVMe-oF SSDs of the aggregation group as secondary NVMe-oF SSDs; and initializing a Map Allocation Table in the primary NVMe-oF SSD with a processor for managing the NVMe-oF SSDs.
    Type: Application
    Filed: June 8, 2017
    Publication date: October 4, 2018
    Inventors: Ramdas P. Kachare, Sompong Paul Olarig, Fred Worley
  • Publication number: 20180239540
    Abstract: An Ethernet solid-state drive (eSSD) system includes a plurality of eSSDs, an Ethernet switch and a baseboard management controller. The Ethernet switch is coupled to each of the eSSDs, and the baseboard management controller is coupled to the each of the eSSDs and to the Ethernet switch. The baseboard management controller controls the Ethernet switch to provide to each eSSD a corresponding predetermined bandwidth that is based on bandwidth information for the eSSD that is stored in a policy table of the baseboard management controller. The at least one predetermined bandwidth may include a predetermined ingress bandwidth and a predetermined egress bandwidth for the corresponding eSSD. The at least one predetermined bandwidth may be based on a service level associated with the corresponding eSSD, and may be adaptively based on operating parameters of the corresponding eSSD.
    Type: Application
    Filed: April 13, 2017
    Publication date: August 23, 2018
    Inventors: Ramdas P. KACHARE, Sompong Paul OLARIG, Son T. PHAM
  • Publication number: 20180210785
    Abstract: A system and method for providing erasure code protection across multiple storage devices. A data switch in a storage system connects a plurality of storage devices to a remote host. Each storage device is also connected to a controller, e.g., a baseboard management controller. During normal operation, read and write commands from the remote host are sent to respective storage devices through the data switch. When a write command is executed, the storage device executing the command sends a copy of the data to the controller, which generates and stores erasure codes, e.g., on a storage device that is dedicated to the storage of erasure codes, and invisible to the remote host. When a device fails or is removed, the controller reconfigures the data switch to redirect all traffic addressed to the failed or absent storage device to the controller, and the controller responds to host commands in its stead.
    Type: Application
    Filed: March 27, 2017
    Publication date: July 26, 2018
    Inventors: Sompong Paul Olarig, David Schwaderer, Ramdas P. Kachare
  • Publication number: 20180173652
    Abstract: A management controller is disclosed. The management controller may include a receiver to receive a request from an initiator. A translator may translate the request received from the initiator into a command for a multi-mode single port device. A bridge may communicate with the multi-mode single port device and the initiator, sending the command to the multi-mode single port device and receiving a reply from the multi-mode single port device. The translator may then translate the reply to the command into a response for the initiator, whereupon a transmitter may transmit the response to the initiator.
    Type: Application
    Filed: March 1, 2017
    Publication date: June 21, 2018
    Inventors: Sompong Paul OLARIG, Son T. PHAM, Ramdas P. KACHARE
  • Publication number: 20170277444
    Abstract: An apparatus includes a memory and a controller. The memory may be configured to store data. The controller may have a plurality of tables. The controller is generally configured to process a plurality of input/output requests to read/write to/from the memory, track a plurality of statistics of the memory, index the plurality of tables with the plurality of statistics of the memory to determine a plurality of parameters, compute based on the plurality of parameters a first bandwidth consumed by the controller while servicing the memory with one or more tasks hidden from a host, and report to the host a second bandwidth of the memory that is available to the host based on the first bandwidth consumed by the controller.
    Type: Application
    Filed: March 28, 2016
    Publication date: September 28, 2017
    Inventors: Timothy L. Canepa, Ramdas P. Kachare