Patents by Inventor Ramin Shirani

Ramin Shirani has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 5577069
    Abstract: A high-speed out-of-band signalling technique for transferring information such as station status information between stations in a communication network, typically a local-area network, involves sequentially generating a plurality of n-bit sequence segments, where n is at least 3. Each bit is either a first binary value or a second binary value. Each sequence segment is coded with one of a plurality of different n-bit code groups divided into a first code group and a set of second code groups. The n bits in the first code group are all the first binary value--e.g., all "1s". None of the second code groups contain a pair of non-contiguous bits of the second binary value--e.g., none of the second code groups contains two "0s" separated by at least one other bit. The sequence segments are outputted in the order that they were generated to produce a special bit sequence which carries the desired information.
    Type: Grant
    Filed: December 9, 1994
    Date of Patent: November 19, 1996
    Assignee: National Semiconductor Corporation
    Inventors: Hung-Wah A. Lau, Ching Huang, Ramin Shirani, Michael J. Woodring
  • Patent number: 5245617
    Abstract: A media access controller is provided by the present invention. A feature of the media access controller of the present invention is a content addressable memory architecture whereby address filtering is provided for filtering physical, group and broadcast addresses on an Ethernet network. Another feature of the present invention is an interface architecture capable of supporting external address filters which in turn are capable of supporting spanning tree and source routing algorithms. Still another feature of the present invention is a CRC checker having improved testability such that burdensome computations for input bit test patterns are no longer required. Still another feature of the present invention is a first-in, first-out memory register having validity bits associated with each stored data byte, such that data bytes may be indiscriminately stored, regardless of their validity, and invalid data bytes are discarded during retrieval of the stored data bytes.
    Type: Grant
    Filed: March 6, 1992
    Date of Patent: September 14, 1993
    Assignee: National Semiconductor Corporation
    Inventors: Edwin Z. DeSouza, Daniel J. Cimino, Ramin Shirani, Mark R. Waggoner
  • Patent number: 5164943
    Abstract: A media access controller is provided by the present invention. A feature of the media access controller of the present invention is a content addressable memory architecture whereby address filtering is provided for filtering physical, group and broadcast addresses on an Ethernet network. Another feature of the present invention is an interface architecture capable of supporting external address filters which in turn are capable of supporting spanning tree and source routing algorithms. Still another feature of the present invention is a CRC checker having improved testability such that burdensome computations for input bit test patterns are no longer required. Still another feature of the present invention is a first-in, first-out memory register having validity bits associated with each stored data byte, such that data bytes may be indiscriminately stored, regardless of their validity, and invalid data bytes are discarded during retrieval of the stored data bytes.
    Type: Grant
    Filed: March 6, 1992
    Date of Patent: November 17, 1992
    Assignee: National Semiconductor Corporation
    Inventors: Edwin Z. DeSouza, Daniel J. Cimino, Ramin Shirani, Mark R. Waggoner