Patents by Inventor Ran KIM

Ran KIM has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250244621
    Abstract: A display device includes: a first substrate including a first area, a second area surrounding the first area, and a third area surrounding the second area; a second substrate facing the first substrate; a sealing member between the first substrate and the second substrate at the third area; a color filter layer under the second substrate; a low refractive index layer under the color filter layer, overlapping with the first area, and spaced from the sealing member; a protective layer covering the low refractive index layer, surrounding a side surface of the low refractive index layer, and including an inorganic material; and a color conversion layer under the protective layer, overlapping with the first area, and including a plurality of color conversion parts spaced from each other.
    Type: Application
    Filed: April 17, 2025
    Publication date: July 31, 2025
    Inventors: RAN KIM, JUWON LEE, KIHYUN KIM, YOUNGGIL PARK, SOOIM JEONG
  • Publication number: 20250228881
    Abstract: A novel multi-fused-ring compound and a composition for preventing or treating multiple myeloma comprising the same as an active ingredient is described herein. The compound is a derivative synthesized from the natural compound ginsenoside as a starting material, and shows no cytotoxicity to normal hematopoietic stem cells, while exhibiting a significant killing effect on various multiple myeloma cell lines, indicating that it may be administered for a long period of time without side effects. In addition, the compound exhibits a significant synergistic effect when co-administered with the immunomodulator thalidomide or its analog lenalidomide, and thus may be useful as an efficient therapeutic agent or therapeutic aid agent composition for multiple myeloma, an incurable disease.
    Type: Application
    Filed: November 17, 2022
    Publication date: July 17, 2025
    Inventors: Hye Ran KIM, Young Eun LEE, Myung Geun SHIN
  • Publication number: 20250229535
    Abstract: An inkjet printing apparatus includes a base portion, an inner pipe disposed in the base portion and through which ink moves, and a nozzle extending from the inner pipe and discharging the ink. The nozzle includes a coating layer disposed on an inner side surface of the nozzle and including AlOF.
    Type: Application
    Filed: August 22, 2024
    Publication date: July 17, 2025
    Applicant: Samsung Display Co., LTD.
    Inventors: Ran KIM, Sung Hwan YOUN, Ki Hyun KIM
  • Publication number: 20250221944
    Abstract: The present invention provides a novel compound having a chromanone or its ring-opening form, phenylpropenone, as backbone and compositions for the preventing or treating multiple myeloma, comprising the same. The compounds of the invention exhibit significant killing effects against various multiple myeloma cell lines and show in vivo anti-cancer effects that exceed those of lenalidomide, a commercially available immunomodulator widely used in the treatment of multiple myeloma and myelodysplastic syndromes. In addition, the compounds of the invention exhibit a significant synergistic effect when co-administered with the thalidomide or its analog lenalidomide, and thus are useful as an efficient therapeutic agent or therapeutic aid agent composition for multiple myeloma which is an incurable disease.
    Type: Application
    Filed: April 6, 2023
    Publication date: July 10, 2025
    Applicants: KBLUEBIO INC, Industry Foundation of Chonnam Nat'l. University
    Inventors: Hye Ran KIM, Young Eun LEE, Myung Geun SHIN
  • Patent number: 12340088
    Abstract: A memory device includes: a plurality of command and address (CA) samplers configured to receive, as a plurality of first CA signals, a command comprising a predetermined pattern via a CA bus based on an exit of a sleep mode, wherein each of the plurality of CA samplers further is configured to sample a corresponding first CA signal among the plurality of first CA signals; and a command decoder configured to check a parity error in the plurality of first CA signals sampled by the plurality of CA samplers.
    Type: Grant
    Filed: November 3, 2023
    Date of Patent: June 24, 2025
    Assignee: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye-Ran Kim, Taeyoung Oh
  • Patent number: 12334186
    Abstract: Provided is a memory system including: a memory device; and a memory controller configured to transmit a command and address (CA) signal and a data clock (WCK) signal to the memory device, and transmitting a data (DQ) signal to the memory device or receive the DQ signal from the memory device. The memory device may include a clock distribution network configured to generate a first division clock signal for sampling the CA signal and a second division clock signal for sampling the DQ signal from the data clock signal, a CA sampler configured to sample the CA signal based on the first division clock signal, and a CA parity check circuitry configured to output a parity error signal in response to a parity error occurring for the CA signal, and the memory controller may include processing circuitry configured to enter CA training in response to receiving the parity error signal.
    Type: Grant
    Filed: February 9, 2023
    Date of Patent: June 17, 2025
    Assignee: Samsung Electronics Co., Ltd.
    Inventors: Jaehyeok Baek, Hye-Ran Kim, Min Ho Maeing, SungYong Cho, MoonChul Choi
  • Publication number: 20250192124
    Abstract: A display device includes: a base substrate; a transistor on the base substrate and comprising a semiconductor pattern and a gate electrode; a gate insulating pattern layer on the semiconductor pattern; connection electrodes on the gate insulating pattern layer and connected to the semiconductor pattern via contact holes; and an insulating layer on the connection electrodes and the transistor, wherein the connection electrodes are on a same layer as the gate electrode, the insulating layer comprises a low transmittance layer having a light transmittance equal to or greater than 30% and equal to or smaller than 65%.
    Type: Application
    Filed: September 6, 2024
    Publication date: June 12, 2025
    Inventors: RAN KIM, KIHYUN KIM, SUNGHWAN YOUN
  • Patent number: 12319307
    Abstract: Provided are a method and apparatus for providing a driver interface. The method of providing a driver interface may include, based on a state of a vehicle, determining a main interface configured to display information regarding a vehicle operation service, and generating the determined main interface, wherein the generating of the main interface may include determining a before-starting-work interface as the main interface, in response to the state of the vehicle being switched to a moving-to-workplace state, determining a moving-to-workplace interface as the main interface, and in response to the state of the vehicle being switched to a standby-for-dispatch state, determining a standby-for-dispatch interface as the main interface.
    Type: Grant
    Filed: July 6, 2023
    Date of Patent: June 3, 2025
    Assignee: 42DOT INC.
    Inventors: Ji Hoon Kim, Tae Suk Kim, Mo Ran Kim, Jung Hee Son, Su Ho Kim, Yoo Ra Choi, Hyun Woo Choi, Dong Hoo Kim, Zzy Hyun Oh, Jae In Chang, Da Ye Kwon, Hyun Gul Roh, Man Gyu Park
  • Patent number: 12298613
    Abstract: A display device includes: a first substrate including a first area, a second area surrounding the first area, and a third area surrounding the second area; a second substrate facing the first substrate; a sealing member between the first substrate and the second substrate at the third area; a color filter layer under the second substrate; a low refractive index layer under the color filter layer, overlapping with the first area, and spaced from the sealing member; a protective layer covering the low refractive index layer, surrounding a side surface of the low refractive index layer, and including an inorganic material; and a color conversion layer under the protective layer, overlapping with the first area, and including a plurality of color conversion parts spaced from each other.
    Type: Grant
    Filed: November 20, 2023
    Date of Patent: May 13, 2025
    Assignee: Samsung Display Co., Ltd.
    Inventors: Ran Kim, Juwon Lee, Kihyun Kim, Younggil Park, Sooim Jeong
  • Publication number: 20250123920
    Abstract: A memory device and a method of operating the memory device are provided. The memory device includes a memory cell array including a plurality of memory cells to store data, an error correction code (ECC) circuit, and an error check and scrub (ECS) circuit. The ECC circuit reads the data from the memory cell array and corrects errors in the data. The ECS circuit performs a scrubbing operation on the memory cell array and transmits a signal for an error address detected based on the scrubbing operation to an external circuit and stores the error address which was transmitted.
    Type: Application
    Filed: July 5, 2024
    Publication date: April 17, 2025
    Inventors: Yujung Song, Sung-Rae Kim, Hye-Ran Kim
  • Publication number: 20250089476
    Abstract: A display device according to an embodiment includes a barrier layer on a substrate and including a trench, a first buffer layer on the barrier layer and arranged along a profile of the trench, a second buffer layer on the first buffer layer and arranged along a profile of the first buffer layer, a semiconductor layer on the second buffer layer and including a channel region overlapping the trench, a gate insulating layer on the semiconductor layer and overlapping the channel region, and a gate electrode on the gate insulating layer and overlapping the channel region, and a thickness of the first buffer layer is thinner than a thickness of the second buffer layer.
    Type: Application
    Filed: May 24, 2024
    Publication date: March 13, 2025
    Inventors: SUN WOO LEE, RAN KIM, UIYOUNG PARK
  • Publication number: 20250051525
    Abstract: The present invention relates to a hydroxylphenyl-terminated polysiloxane, a polysiloxane-polycarbonate copolymer comprising the same as repeating unit, and a method for preparing the copolymer, and more specifically, a polysiloxane of a specific structure having terminal silane unit comprising optionally substituted hydroxylphenyl group, and a polysiloxane-polycarbonate copolymer which comprises the polysiloxane and a polycarbonate block as repeating units, and thereby shows the same or more excellent transparency and significantly further improved flame retardancy as compared with the level of conventional polysiloxane-polycarbonate copolymer, and a method for preparing the same.
    Type: Application
    Filed: July 4, 2022
    Publication date: February 13, 2025
    Applicant: SAMYANG CORPORATION
    Inventors: Seong Hyen HEO, Mi Ran KIM, Kyung Moo SHIN, Yun Ju CHANG, Seung Pil JUNG, Jin Sik CHOI, YU IL KIM, Jong Yoon KIM, Seong Woo SEO
  • Publication number: 20240325871
    Abstract: Disclosed is a game method for a game machine for ticket output in which a puck dropped onto a rail unit through a puck feeder slides toward one end portion of the rail unit, in this case, when the puck is hit by a hitting device such that the puck is discharged to the other end portion of the rail unit, the puck slides along a score acquisition unit in proportion to a hitting force of the hitting device to fly into any one of a plurality of score holes, the number of tickets corresponding to the score hole into which the puck flies is displayed on a ticket output amount display, and the number of tickets displayed on the ticket output amount display is output trough a ticket output unit.
    Type: Application
    Filed: May 5, 2023
    Publication date: October 3, 2024
    Applicant: KOMUSE Co., Ltd.
    Inventors: Nam Ho KANG, Byeong Soo SEO, Ryeol BAEK, So Ran KIM
  • Publication number: 20240324291
    Abstract: A display device includes a transistor including a semiconductor layer and a gate electrode overlapping a channel area of the semiconductor layer and a storage capacitor electrically connected to the transistor, the storage capacitor including a first capacitor electrode disposed below the semiconductor layer, a second capacitor electrode disposed on the first capacitor electrode, and a third capacitor electrode disposed on the second capacitor electrode, the second capacitor electrode includes a lower layer, the lower layer and the semiconductor layer being disposed on a same layer, an intermediate layer disposed on the lower layer, and an upper layer disposed on the intermediate layer, and the upper layer of the second capacitor electrode includes an amorphous conductive oxide.
    Type: Application
    Filed: March 22, 2024
    Publication date: September 26, 2024
    Applicant: Samsung Display Co., Ltd.
    Inventors: Ran Kim, Kihyun Kim
  • Publication number: 20240318283
    Abstract: The present invention relates to a method of producing and refining carrier-free lutetium-177 using chromatography, and more specifically to a method of producing and refining carrier-free lutetium 1-77 using chromatography having excellent resolution of lutetium and ytterbium without a concentration gradient of an eluent.
    Type: Application
    Filed: December 21, 2021
    Publication date: September 26, 2024
    Applicant: KOREA ATOMIC ENERGY RESEARCH INSTITUTE
    Inventors: Kang Hyuk CHOI, Ul Jae PARK, Jun Sing LEE, A Ran KIM
  • Publication number: 20240324284
    Abstract: A display apparatus includes a substrate, a buffer layer located on the substrate, a first thin-film transistor located on the buffer layer, the first thin-film transistor including a first semiconductor layer and a first gate electrode insulated from the first semiconductor layer. The first semiconductor layer includes an oxide semiconductor. A first inorganic insulating layer is located between the first semiconductor layer and the first gate electrode, and emits at least 1×1019 mole/cm3 of hydrogen (H2).
    Type: Application
    Filed: January 10, 2024
    Publication date: September 26, 2024
    Inventors: Ran Kim, Sunwoo Lee
  • Publication number: 20240306421
    Abstract: A display device includes a light emitting structure disposed on a substrate, and a thin film encapsulation layer disposed on the light emitting structure and including an inorganic layer containing silicon oxynitride and an organic layer. A portion of the inorganic layer has a stress intensity factor of about 1.6 MPa or more.
    Type: Application
    Filed: May 14, 2024
    Publication date: September 12, 2024
    Inventors: JUWON LEE, OJUN KWON, RAN KIM, SOONMI CHOI
  • Patent number: 12085602
    Abstract: The test circuit monitoring positive bias temperature instability (PBTI) includes a PBTI monitoring unit driven according to a power voltage, the PBTI monitoring unit outputting an output voltage having a potential that is equal to or lower than a potential of the power voltage according to a PBTI degradation rate of an NMOS transistor; and a degradation determiner for determining the PBTI degradation rate by comparing the potential of the output voltage to the potential of the power voltage.
    Type: Grant
    Filed: December 12, 2022
    Date of Patent: September 10, 2024
    Assignee: SK hynix Inc.
    Inventors: Min Cheol Kim, Mi Ran Kim, Chang Hwi Lee
  • Publication number: 20240290371
    Abstract: A memory device includes a divide circuit configured to generate an internal data clock signal based on a data clock signal, wherein the data clock signal has a first voltage level for a first time period and toggles during a second time period consecutive to the first time period, a detect circuit configured to generate a feedback data corresponding to the first voltage level based on the internal data clock signal, and an input/output circuit configured to output the feedback data to an external device.
    Type: Application
    Filed: November 1, 2023
    Publication date: August 29, 2024
    Inventors: YOUNGDO UM, TAEYOUNG OH, HYE-RAN KIM
  • Publication number: 20240289018
    Abstract: A memory device includes: a plurality of command and address (CA) samplers configured to receive, as a plurality of first CA signals, a command comprising a predetermined pattern via a CA bus based on an exit of a sleep mode, wherein each of the plurality of CA samplers further is configured to sample a corresponding first CA signal among the plurality of first CA signals; and a command decoder configured to check a parity error in the plurality of first CA signals sampled by the plurality of CA samplers.
    Type: Application
    Filed: November 3, 2023
    Publication date: August 29, 2024
    Applicant: SAMSUNG ELECTRONICS CO., LTD.
    Inventors: Hye-Ran KIM, Taeyoung OH